Searched hist:"0 a31c16c9ce2639c8706b9f863724ba42a46f121" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/target/mips/tcg/ |
| H A D | meson.build | 0a31c16c9ce2639c8706b9f863724ba42a46f121 Sun Apr 18 08:16:06 CDT 2021 Philippe Mathieu-Daudé <f4bug@amsat.org> target/mips: Add simple user-mode mips_cpu_do_interrupt()
The #ifdef'ry hides that the user-mode implementation of
mips_cpu_do_interrupt() simply sets exception_index = EXCP_NONE.
Add this simple implementation to tcg/user/tlb_helper.c, and
the corresponding Meson machinery to build this file when user
emulation is configured.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-14-f4bug@amsat.org>
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| /openbmc/qemu/target/mips/ |
| H A D | meson.build | diff 0a31c16c9ce2639c8706b9f863724ba42a46f121 Sun Apr 18 08:16:06 CDT 2021 Philippe Mathieu-Daudé <f4bug@amsat.org> target/mips: Add simple user-mode mips_cpu_do_interrupt()
The #ifdef'ry hides that the user-mode implementation of
mips_cpu_do_interrupt() simply sets exception_index = EXCP_NONE.
Add this simple implementation to tcg/user/tlb_helper.c, and
the corresponding Meson machinery to build this file when user
emulation is configured.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-14-f4bug@amsat.org>
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