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| /openbmc/linux/drivers/clk/renesas/ |
| H A D | r8a7792-cpg-mssr.c | diff 0873305e68ac2a4665f1f3d27bb0b98a4312e5bd Thu Mar 29 04:02:42 CDT 2018 Geert Uytterhoeven <geert+renesas@glider.be> clk: renesas: r8a7792: Fix LB clock divider
The CLK_TYPE_GEN2_LB clock type is meant for SoCs like R-Car H2, where
the LB clock divider depends on the value of the MD18 pin.
On R-Car V2H, the LB clock divider is fixed to 24. Hence model the
clock as a fixed factor clock instead.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
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