Searched hist:"068258 bc15439c11a966e873f931cc8e513dca61" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/x86/pci/ |
| H A D | mmconfig_64.c | diff 068258bc15439c11a966e873f931cc8e513dca61 Thu Mar 19 22:55:35 CDT 2009 Yinghai Lu <yinghai@kernel.org> x86/PCI: host mmconfig detect clean up
Fix mmconfig detection to not assume a single mmconfig space in the
northbridge, paving the way for AMD fam10h + mcp55 CPUs. On those, the
MSR has some range, but the mcp55 pci config will have another one.
Also helps the mcp55 + io55 case, where every one will have one range.
If it is mcp55, exclude the range that is used by CPU MSR, in other
words , if the CPU claims busses 0-255, the range in mcp55 is dropped,
because CPU HW will not route those ranges to mcp55 mmconfig to handle
it.
Signed-off-by: Yinghai Lu <yinghai.lu@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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| H A D | mmconfig-shared.c | diff 068258bc15439c11a966e873f931cc8e513dca61 Thu Mar 19 22:55:35 CDT 2009 Yinghai Lu <yinghai@kernel.org> x86/PCI: host mmconfig detect clean up
Fix mmconfig detection to not assume a single mmconfig space in the
northbridge, paving the way for AMD fam10h + mcp55 CPUs. On those, the
MSR has some range, but the mcp55 pci config will have another one.
Also helps the mcp55 + io55 case, where every one will have one range.
If it is mcp55, exclude the range that is used by CPU MSR, in other
words , if the CPU claims busses 0-255, the range in mcp55 is dropped,
because CPU HW will not route those ranges to mcp55 mmconfig to handle
it.
Signed-off-by: Yinghai Lu <yinghai.lu@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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