Searched hist:"034 c2e69023007ac855a86ab5d91591f70506a62" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/include/hw/dma/ |
| H A D | xlnx-zynq-devcfg.h | 034c2e69023007ac855a86ab5d91591f70506a62 Mon Jul 04 07:06:37 CDT 2016 Alistair Francis <alistair.francis@xilinx.com> dma: Add Xilinx Zynq devcfg device model
Add a minimal model for the devcfg device which is part of Zynq.
This model supports DMA capabilities and interrupt generation.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 83df49d8fa2d203a421ca71620809e4b04754e65.1467053537.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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| /openbmc/qemu/hw/dma/ |
| H A D | xlnx-zynq-devcfg.c | 034c2e69023007ac855a86ab5d91591f70506a62 Mon Jul 04 07:06:37 CDT 2016 Alistair Francis <alistair.francis@xilinx.com> dma: Add Xilinx Zynq devcfg device model
Add a minimal model for the devcfg device which is part of Zynq.
This model supports DMA capabilities and interrupt generation.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 83df49d8fa2d203a421ca71620809e4b04754e65.1467053537.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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