Home
last modified time | relevance | path

Searched +full:wed +full:- +full:pcie (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/arm/mediatek/
H A Dmediatek,mt7986-wed-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wed-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek PCIE WED Controller for MT7986
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11 - Felix Fietkau <nbd@nbd.name>
14 The mediatek WED PCIE provides a configuration interface for PCIE
20 - enum:
21 - mediatek,mt7986-wed-pcie
[all …]
H A Dmediatek,mt7622-wed.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-wed.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11 - Felix Fietkau <nbd@nbd.name>
15 intercept and handle access to the WLAN DMA queues and PCIe interrupts
21 - enum:
22 - mediatek,mt7622-wed
23 - mediatek,mt7981-wed
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmediatek,net.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11 - Felix Fietkau <nbd@nbd.name>
20 - mediatek,mt2701-eth
21 - mediatek,mt7623-eth
22 - mediatek,mt7621-eth
23 - mediatek,mt7622-eth
24 - mediatek,mt7629-eth
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/mt7986-clk.h>
10 #include <dt-bindings/reset/mt7986-resets.h>
11 #include <dt-bindings/phy/phy.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
[all …]
H A Dmt7622.dtsi6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/mt7622-clk.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt7622-power.h>
14 #include <dt-bindings/reset/mt7622-reset.h>
15 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
[all …]
/openbmc/linux/drivers/net/ethernet/mediatek/
H A Dmtk_wed.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
55 regmap_update_bits(dev->hw->regs, reg, mask | val, val); in wed_m32()
91 return readl(dev->wlan.base + reg); in wifi_r32()
97 writel(val, dev->wlan.base + reg); in wifi_w32()
122 dev_err(dev->hw->dev, "rx reset failed\n"); in mtk_wdma_rx_reset()
127 for (i = 0; i < ARRAY_SIZE(dev->rx_wdma); i++) { in mtk_wdma_rx_reset()
128 if (dev->rx_wdma[i].desc) in mtk_wdma_rx_reset()
147 dev_err(dev->hw->dev, "tx reset failed\n"); in mtk_wdma_tx_reset()
152 for (i = 0; i < ARRAY_SIZE(dev->tx_wdma); i++) in mtk_wdma_tx_reset()
[all …]
/openbmc/linux/drivers/net/wireless/mediatek/mt76/mt7915/
H A Dpci.c1 // SPDX-License-Identifier: ISC
39 val = readl(hif->regs + MT_PCIE_RECOG_ID); in mt7915_pci_get_hif2()
44 get_device(hif->dev); in mt7915_pci_get_hif2()
60 put_device(hif->dev); in mt7915_put_hif2()
87 hif = devm_kzalloc(&pdev->dev, sizeof(*hif), GFP_KERNEL); in mt7915_pci_hif2_probe()
89 return -ENOMEM; in mt7915_pci_hif2_probe()
91 hif->dev = &pdev->dev; in mt7915_pci_hif2_probe()
92 hif->regs = pcim_iomap_table(pdev)[0]; in mt7915_pci_hif2_probe()
93 hif->irq = pdev->irq; in mt7915_pci_hif2_probe()
95 list_add(&hif->list, &hif_list); in mt7915_pci_hif2_probe()
[all …]
/openbmc/linux/Documentation/powerpc/
H A Dcxl.rst28 +----------+ +---------+
34 +----------+ +---------+
36 | +------+ | PSL |
37 | | CAPP |<------>| |
38 +---+------+ PCIE +---------+
41 unit which is part of the PCIe Host Bridge (PHB). This is managed
65 - POWER8 and PSL Version 8 are compliant to the CAIA Version 1.0.
66 - POWER9 and PSL Version 9 are compliant to the CAIA Version 2.0.
120 Work Element Descriptor (WED)
123 The WED is a 64-bit parameter passed to the AFU when a context is
[all …]
/openbmc/linux/drivers/misc/cxl/
H A Dcxl.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
21 #include <misc/cxl-base.h>
64 /* Configuration and Control area - CAIA 1&2 */
74 /* PSL Lookaside Buffer Management Area - CAIA 1 */
83 /* PSL registers - CAIA 1 */
94 /* PSL registers - CAIA 2 */
116 /* 0x7F00:7FFF Reserved PCIe MSI-X Pending Bit Array area */
117 /* 0x8000:FFFF Reserved PCIe MSI-X Table Area */
120 /* Configuration Area - CAIA 1&2 */
127 /* Memory Management and Lookaside Buffer Management - CAIA 1*/
[all …]
/openbmc/u-boot/doc/
H A DREADME.x861 # SPDX-License-Identifier: GPL-2.0+
6 U-Boot on x86
9 This document describes the information about U-Boot running on x86 targets,
13 ------
14 U-Boot supports running as a coreboot [1] payload on x86. So far only Link
17 most of the low-level details.
19 U-Boot is a main bootloader on Intel Edison board.
21 U-Boot also supports booting directly from x86 reset vector, without coreboot.
23 'bare metal', U-Boot acts like a BIOS replacement. The following platforms
26 - Bayley Bay CRB
[all …]
/openbmc/u-boot/
H A DREADME1 # SPDX-License-Identifier: GPL-2.0+
3 # (C) Copyright 2000 - 2013
9 This directory contains the source code for U-Boot, a boot loader for
15 The development of U-Boot is closely related to Linux: some parts of
37 scattered throughout the U-Boot source identifying the people or
41 actual U-Boot source tree; however, it can be created dynamically
51 U-Boot, you should send a message to the U-Boot mailing list at
52 <u-boot@lists.denx.de>. There is also an archive of previous traffic
53 on the mailing list - please search the archive before asking FAQ's.
54 Please see http://lists.denx.de/pipermail/u-boot and
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_clock_source.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
41 (clk_src->regs->reg)
44 clk_src->base.ctx
50 clk_src->cs_shift->field_name, clk_src->cs_mask->field_name
72 ss_parm = clk_src->dvi_ss_params; in get_ss_data_entry()
73 entrys_num = clk_src->dvi_ss_params_cnt; in get_ss_data_entry()
77 ss_parm = clk_src->hdmi_ss_params; in get_ss_data_entry()
78 entrys_num = clk_src->hdmi_ss_params_cnt; in get_ss_data_entry()
82 ss_parm = clk_src->lvds_ss_params; in get_ss_data_entry()
83 entrys_num = clk_src->lvds_ss_params_cnt; in get_ss_data_entry()
[all …]
/openbmc/linux/
H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
[all...]
H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
[all...]