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/openbmc/linux/tools/perf/arch/x86/tests/
H A Dinsn-x86-dat-src.c21 asm volatile("rdtsc"); /* Start here */ in main()
25 asm volatile("vcvtph2ps %xmm3,%ymm5"); in main()
31 asm volatile("cmovno %rax,%rbx"); in main()
32 asm volatile("cmovno 0x12345678(%rax),%rcx"); in main()
33 asm volatile("cmovno 0x12345678(%rax),%cx"); in main()
35 asm volatile("cmove %rax,%rbx"); in main()
36 asm volatile("cmove 0x12345678(%rax),%rcx"); in main()
37 asm volatile("cmove 0x12345678(%rax),%cx"); in main()
39 asm volatile("seto 0x12345678(%rax)"); in main()
40 asm volatile("setno 0x12345678(%rax)"); in main()
[all …]
/openbmc/linux/drivers/video/fbdev/kyro/
H A DSTG4000Reg.h76 volatile u32 Thread0Enable; /* 0x0000 */
77 volatile u32 Thread1Enable; /* 0x0004 */
78 volatile u32 Thread0Recover; /* 0x0008 */
79 volatile u32 Thread1Recover; /* 0x000C */
80 volatile u32 Thread0Step; /* 0x0010 */
81 volatile u32 Thread1Step; /* 0x0014 */
82 volatile u32 VideoInStatus; /* 0x0018 */
83 volatile u32 Core2InSignStart; /* 0x001C */
84 volatile u32 Core1ResetVector; /* 0x0020 */
85 volatile u32 Core1ROMOffset; /* 0x0024 */
[all …]
/openbmc/linux/lib/raid6/
H A Dsse2.c48 asm volatile("movdqa %0,%%xmm0" : : "m" (raid6_sse_constants.x1d[0])); in raid6_sse21_gen_syndrome()
49 asm volatile("pxor %xmm5,%xmm5"); /* Zero temp */ in raid6_sse21_gen_syndrome()
52 asm volatile("prefetchnta %0" : : "m" (dptr[z0][d])); in raid6_sse21_gen_syndrome()
53 asm volatile("movdqa %0,%%xmm2" : : "m" (dptr[z0][d])); /* P[0] */ in raid6_sse21_gen_syndrome()
54 asm volatile("prefetchnta %0" : : "m" (dptr[z0-1][d])); in raid6_sse21_gen_syndrome()
55 asm volatile("movdqa %xmm2,%xmm4"); /* Q[0] */ in raid6_sse21_gen_syndrome()
56 asm volatile("movdqa %0,%%xmm6" : : "m" (dptr[z0-1][d])); in raid6_sse21_gen_syndrome()
58 asm volatile("prefetchnta %0" : : "m" (dptr[z][d])); in raid6_sse21_gen_syndrome()
59 asm volatile("pcmpgtb %xmm4,%xmm5"); in raid6_sse21_gen_syndrome()
60 asm volatile("paddb %xmm4,%xmm4"); in raid6_sse21_gen_syndrome()
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H A Davx2.c46 asm volatile("vmovdqa %0,%%ymm0" : : "m" (raid6_avx2_constants.x1d[0])); in raid6_avx21_gen_syndrome()
47 asm volatile("vpxor %ymm3,%ymm3,%ymm3"); /* Zero temp */ in raid6_avx21_gen_syndrome()
50 asm volatile("prefetchnta %0" : : "m" (dptr[z0][d])); in raid6_avx21_gen_syndrome()
51 asm volatile("vmovdqa %0,%%ymm2" : : "m" (dptr[z0][d]));/* P[0] */ in raid6_avx21_gen_syndrome()
52 asm volatile("prefetchnta %0" : : "m" (dptr[z0-1][d])); in raid6_avx21_gen_syndrome()
53 asm volatile("vmovdqa %ymm2,%ymm4");/* Q[0] */ in raid6_avx21_gen_syndrome()
54 asm volatile("vmovdqa %0,%%ymm6" : : "m" (dptr[z0-1][d])); in raid6_avx21_gen_syndrome()
56 asm volatile("prefetchnta %0" : : "m" (dptr[z][d])); in raid6_avx21_gen_syndrome()
57 asm volatile("vpcmpgtb %ymm4,%ymm3,%ymm5"); in raid6_avx21_gen_syndrome()
58 asm volatile("vpaddb %ymm4,%ymm4,%ymm4"); in raid6_avx21_gen_syndrome()
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H A Drecov_ssse3.c54 asm volatile("movdqa %0,%%xmm7" : : "m" (x0f[0])); in raid6_2data_recov_ssse3()
57 asm volatile("movdqa %0,%%xmm6" : : "m" (qmul[0])); in raid6_2data_recov_ssse3()
58 asm volatile("movdqa %0,%%xmm14" : : "m" (pbmul[0])); in raid6_2data_recov_ssse3()
59 asm volatile("movdqa %0,%%xmm15" : : "m" (pbmul[16])); in raid6_2data_recov_ssse3()
67 asm volatile("movdqa %0,%%xmm1" : : "m" (q[0])); in raid6_2data_recov_ssse3()
68 asm volatile("movdqa %0,%%xmm9" : : "m" (q[16])); in raid6_2data_recov_ssse3()
69 asm volatile("movdqa %0,%%xmm0" : : "m" (p[0])); in raid6_2data_recov_ssse3()
70 asm volatile("movdqa %0,%%xmm8" : : "m" (p[16])); in raid6_2data_recov_ssse3()
71 asm volatile("pxor %0,%%xmm1" : : "m" (dq[0])); in raid6_2data_recov_ssse3()
72 asm volatile("pxor %0,%%xmm9" : : "m" (dq[16])); in raid6_2data_recov_ssse3()
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H A Drecov_loongarch_simd.c69 asm volatile("vld $vr20, %0" : : "m" (qmul[0])); in raid6_2data_recov_lsx()
70 asm volatile("vld $vr21, %0" : : "m" (qmul[16])); in raid6_2data_recov_lsx()
71 asm volatile("vld $vr22, %0" : : "m" (pbmul[0])); in raid6_2data_recov_lsx()
72 asm volatile("vld $vr23, %0" : : "m" (pbmul[16])); in raid6_2data_recov_lsx()
76 asm volatile("vld $vr4, %0" : : "m" (q[0])); in raid6_2data_recov_lsx()
77 asm volatile("vld $vr5, %0" : : "m" (q[16])); in raid6_2data_recov_lsx()
78 asm volatile("vld $vr6, %0" : : "m" (q[32])); in raid6_2data_recov_lsx()
79 asm volatile("vld $vr7, %0" : : "m" (q[48])); in raid6_2data_recov_lsx()
81 asm volatile("vld $vr8, %0" : : "m" (dq[0])); in raid6_2data_recov_lsx()
82 asm volatile("vld $vr9, %0" : : "m" (dq[16])); in raid6_2data_recov_lsx()
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H A Drecov_avx2.c53 asm volatile("vpbroadcastb %0, %%ymm7" : : "m" (x0f)); in raid6_2data_recov_avx2()
57 asm volatile("vmovdqa %0, %%ymm1" : : "m" (q[0])); in raid6_2data_recov_avx2()
58 asm volatile("vmovdqa %0, %%ymm9" : : "m" (q[32])); in raid6_2data_recov_avx2()
59 asm volatile("vmovdqa %0, %%ymm0" : : "m" (p[0])); in raid6_2data_recov_avx2()
60 asm volatile("vmovdqa %0, %%ymm8" : : "m" (p[32])); in raid6_2data_recov_avx2()
61 asm volatile("vpxor %0, %%ymm1, %%ymm1" : : "m" (dq[0])); in raid6_2data_recov_avx2()
62 asm volatile("vpxor %0, %%ymm9, %%ymm9" : : "m" (dq[32])); in raid6_2data_recov_avx2()
63 asm volatile("vpxor %0, %%ymm0, %%ymm0" : : "m" (dp[0])); in raid6_2data_recov_avx2()
64 asm volatile("vpxor %0, %%ymm8, %%ymm8" : : "m" (dp[32])); in raid6_2data_recov_avx2()
73 asm volatile("vbroadcasti128 %0, %%ymm4" : : "m" (qmul[0])); in raid6_2data_recov_avx2()
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H A Dloongarch_simd.c54 asm volatile("vld $vr0, %0" : : "m"(dptr[z0][d+0*NSIZE])); in raid6_lsx_gen_syndrome()
55 asm volatile("vld $vr1, %0" : : "m"(dptr[z0][d+1*NSIZE])); in raid6_lsx_gen_syndrome()
56 asm volatile("vld $vr2, %0" : : "m"(dptr[z0][d+2*NSIZE])); in raid6_lsx_gen_syndrome()
57 asm volatile("vld $vr3, %0" : : "m"(dptr[z0][d+3*NSIZE])); in raid6_lsx_gen_syndrome()
58 asm volatile("vori.b $vr4, $vr0, 0"); in raid6_lsx_gen_syndrome()
59 asm volatile("vori.b $vr5, $vr1, 0"); in raid6_lsx_gen_syndrome()
60 asm volatile("vori.b $vr6, $vr2, 0"); in raid6_lsx_gen_syndrome()
61 asm volatile("vori.b $vr7, $vr3, 0"); in raid6_lsx_gen_syndrome()
64 asm volatile("vld $vr8, %0" : : "m"(dptr[z][d+0*NSIZE])); in raid6_lsx_gen_syndrome()
65 asm volatile("vld $vr9, %0" : : "m"(dptr[z][d+1*NSIZE])); in raid6_lsx_gen_syndrome()
[all …]
H A Dsse1.c52 asm volatile("movq %0,%%mm0" : : "m" (raid6_mmx_constants.x1d)); in raid6_sse11_gen_syndrome()
53 asm volatile("pxor %mm5,%mm5"); /* Zero temp */ in raid6_sse11_gen_syndrome()
56 asm volatile("prefetchnta %0" : : "m" (dptr[z0][d])); in raid6_sse11_gen_syndrome()
57 asm volatile("movq %0,%%mm2" : : "m" (dptr[z0][d])); /* P[0] */ in raid6_sse11_gen_syndrome()
58 asm volatile("prefetchnta %0" : : "m" (dptr[z0-1][d])); in raid6_sse11_gen_syndrome()
59 asm volatile("movq %mm2,%mm4"); /* Q[0] */ in raid6_sse11_gen_syndrome()
60 asm volatile("movq %0,%%mm6" : : "m" (dptr[z0-1][d])); in raid6_sse11_gen_syndrome()
62 asm volatile("prefetchnta %0" : : "m" (dptr[z][d])); in raid6_sse11_gen_syndrome()
63 asm volatile("pcmpgtb %mm4,%mm5"); in raid6_sse11_gen_syndrome()
64 asm volatile("paddb %mm4,%mm4"); in raid6_sse11_gen_syndrome()
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H A Dmmx.c47 asm volatile("movq %0,%%mm0" : : "m" (raid6_mmx_constants.x1d)); in raid6_mmx1_gen_syndrome()
48 asm volatile("pxor %mm5,%mm5"); /* Zero temp */ in raid6_mmx1_gen_syndrome()
51 asm volatile("movq %0,%%mm2" : : "m" (dptr[z0][d])); /* P[0] */ in raid6_mmx1_gen_syndrome()
52 asm volatile("movq %mm2,%mm4"); /* Q[0] */ in raid6_mmx1_gen_syndrome()
54 asm volatile("movq %0,%%mm6" : : "m" (dptr[z][d])); in raid6_mmx1_gen_syndrome()
55 asm volatile("pcmpgtb %mm4,%mm5"); in raid6_mmx1_gen_syndrome()
56 asm volatile("paddb %mm4,%mm4"); in raid6_mmx1_gen_syndrome()
57 asm volatile("pand %mm0,%mm5"); in raid6_mmx1_gen_syndrome()
58 asm volatile("pxor %mm5,%mm4"); in raid6_mmx1_gen_syndrome()
59 asm volatile("pxor %mm5,%mm5"); in raid6_mmx1_gen_syndrome()
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/openbmc/qemu/tests/tcg/i386/
H A Dtest-i386-fp-exceptions.c12 volatile float f_res;
13 volatile double d_res;
14 volatile long double ld_res;
15 volatile long double ld_res2;
17 volatile union u ld_invalid_1 = { .s = { 1, 1234 } };
18 volatile float f_snan = __builtin_nansf("");
19 volatile double d_snan = __builtin_nans("");
20 volatile long double ld_third = 1.0L / 3.0L;
21 volatile long double ld_snan = __builtin_nansl("");
22 volatile long double ld_nan = __builtin_nanl("");
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H A Dtest-i386-sse-exceptions.c7 volatile float f_res;
8 volatile double d_res;
10 volatile float f_snan = __builtin_nansf("");
11 volatile float f_half = 0.5f;
12 volatile float f_third = 1.0f / 3.0f;
13 volatile float f_nan = __builtin_nanl("");
14 volatile float f_inf = __builtin_inff();
15 volatile float f_ninf = -__builtin_inff();
16 volatile float f_one = 1.0f;
17 volatile float f_two = 2.0f;
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H A Dtest-i386-fldcst.c6 volatile long double ld_res;
14 __asm__ volatile ("fnstcw %0" : "=m" (cw)); in main()
16 __asm__ volatile ("fldcw %0" : : "m" (cw)); in main()
17 __asm__ volatile ("fldl2t" : "=t" (ld_res)); in main()
23 __asm__ volatile ("fnstcw %0" : "=m" (cw)); in main()
25 __asm__ volatile ("fldcw %0" : : "m" (cw)); in main()
26 __asm__ volatile ("fldl2t" : "=t" (ld_res)); in main()
32 __asm__ volatile ("fnstcw %0" : "=m" (cw)); in main()
34 __asm__ volatile ("fldcw %0" : : "m" (cw)); in main()
35 __asm__ volatile ("fldl2t" : "=t" (ld_res)); in main()
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H A Dtest-i386-fxam.c11 volatile union u ld_pseudo_m16382 = { .s = { UINT64_C(1) << 63, 0 } };
12 volatile union u ld_pseudo_nm16382 = { .s = { UINT64_C(1) << 63, 0x8000 } };
13 volatile union u ld_invalid_1 = { .s = { 1, 1234 } };
14 volatile union u ld_invalid_2 = { .s = { 0, 1234 } };
15 volatile union u ld_invalid_3 = { .s = { 0, 0x7fff } };
16 volatile union u ld_invalid_4 = { .s = { (UINT64_C(1) << 63) - 1, 0x7fff } };
17 volatile union u ld_invalid_n1 = { .s = { 1, 0x8123 } };
18 volatile union u ld_invalid_n2 = { .s = { 0, 0x8123 } };
19 volatile union u ld_invalid_n3 = { .s = { 0, 0xffff } };
20 volatile union u ld_invalid_n4 = { .s = { (UINT64_C(1) << 63) - 1, 0xffff } };
[all …]
/openbmc/linux/arch/m68k/include/asm/
H A Dmvme147hw.h23 #define m147_rtc ((MK48T02 * volatile)0xfffe07f8)
27 volatile u_long dma_tadr;
28 volatile u_long dma_dadr;
29 volatile u_long dma_bcr;
30 volatile u_long dma_hr;
31 volatile u_short t1_preload;
32 volatile u_short t1_count;
33 volatile u_short t2_preload;
34 volatile u_short t2_count;
35 volatile u_char t1_int_cntrl;
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/openbmc/linux/arch/mips/include/asm/ip32/
H A Dmace.h24 volatile unsigned int error_addr;
25 volatile unsigned int error;
49 volatile unsigned int control;
70 volatile unsigned int rev;
72 volatile unsigned int config_addr;
74 volatile unsigned char b[4];
75 volatile unsigned short w[2];
76 volatile unsigned int l;
98 volatile u64 mac_ctrl;
99 volatile unsigned long int_stat;
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/openbmc/linux/arch/loongarch/include/asm/
H A Dloongson.h18 (*(volatile u32 *)((char *)TO_UNCACHE(LOONGSON_REG_BASE) + (x)))
43 static inline void xconf_writel(u32 val, volatile void __iomem *addr) in xconf_writel()
45 asm volatile ( in xconf_writel()
53 static inline void xconf_writeq(u64 val64, volatile void __iomem *addr) in xconf_writeq()
55 asm volatile ( in xconf_writeq()
76 #define LS7A_DMA_CFG (volatile void *)TO_UNCACHE(LS7A_CHIPCFG_REG_BASE + 0x041c)
80 #define LS7A_INT_MASK_REG (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x020)
81 #define LS7A_INT_EDGE_REG (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x060)
82 #define LS7A_INT_CLEAR_REG (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x080)
83 #define LS7A_INT_HTMSI_EN_REG (volatile void *)TO_UNCACHE(LS7A_PCH_REG_BASE + 0x040)
[all …]
/openbmc/linux/arch/ia64/include/uapi/asm/
H A Dgcc_intrin.h17 /* The "volatile" is due to gcc bugs */
18 #define ia64_barrier() asm volatile ("":::"memory")
20 #define ia64_stop() asm volatile (";;"::)
22 #define ia64_invala_gr(regnum) asm volatile ("invala.e r%0" :: "i"(regnum))
24 #define ia64_invala_fr(regnum) asm volatile ("invala.e f%0" :: "i"(regnum))
26 #define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
28 #define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
38 asm volatile ("mov psr.l=%0" :: "r"(val) : "memory"); \
41 asm volatile ("mov ar%0=%1" :: \
46 asm volatile ("mov cr%0=%1" :: \
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/openbmc/linux/arch/parisc/include/asm/
H A Dhardware.h43 volatile uint32_t nothing; /* reg 0 */
44 volatile uint32_t io_eim;
45 volatile uint32_t io_dc_adata;
46 volatile uint32_t io_ii_cdata;
47 volatile uint32_t io_dma_link; /* reg 4 */
48 volatile uint32_t io_dma_command;
49 volatile uint32_t io_dma_address;
50 volatile uint32_t io_dma_count;
51 volatile uint32_t io_flex; /* reg 8 */
52 volatile uint32_t io_spa_address;
[all …]
/openbmc/linux/include/video/
H A Dgbe.h12 volatile uint32_t ctrlstat; /* general control */
13 volatile uint32_t dotclock; /* dot clock PLL control */
14 volatile uint32_t i2c; /* crt I2C control */
15 volatile uint32_t sysclk; /* system clock PLL control */
16 volatile uint32_t i2cfp; /* flat panel I2C control */
17 volatile uint32_t id; /* device id/chip revision */
18 volatile uint32_t config; /* power on configuration [1] */
19 volatile uint32_t bist; /* internal bist status [1] */
21 volatile uint32_t vt_xy; /* current dot coords */
22 volatile uint32_t vt_xymax; /* maximum dot coords */
[all …]
/openbmc/linux/arch/s390/kernel/
H A Dfpu.c25 asm volatile("stfpc %0" : "=Q" (state->fpc)); in __kernel_fpu_begin()
30 asm volatile("std 0,%0" : "=Q" (state->fprs[0])); in __kernel_fpu_begin()
31 asm volatile("std 1,%0" : "=Q" (state->fprs[1])); in __kernel_fpu_begin()
32 asm volatile("std 2,%0" : "=Q" (state->fprs[2])); in __kernel_fpu_begin()
33 asm volatile("std 3,%0" : "=Q" (state->fprs[3])); in __kernel_fpu_begin()
34 asm volatile("std 4,%0" : "=Q" (state->fprs[4])); in __kernel_fpu_begin()
35 asm volatile("std 5,%0" : "=Q" (state->fprs[5])); in __kernel_fpu_begin()
36 asm volatile("std 6,%0" : "=Q" (state->fprs[6])); in __kernel_fpu_begin()
37 asm volatile("std 7,%0" : "=Q" (state->fprs[7])); in __kernel_fpu_begin()
38 asm volatile("std 8,%0" : "=Q" (state->fprs[8])); in __kernel_fpu_begin()
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/openbmc/linux/arch/alpha/include/asm/
H A Dio_trivial.h12 return __kernel_ldbu(*(const volatile u8 __force *)a); in IO_CONCAT()
18 return __kernel_ldwu(*(const volatile u16 __force *)a); in IO_CONCAT()
24 __kernel_stb(b, *(volatile u8 __force *)a); in IO_CONCAT()
30 __kernel_stw(b, *(volatile u16 __force *)a); in IO_CONCAT()
38 return *(const volatile u32 __force *)a; in IO_CONCAT()
44 *(volatile u32 __force *)a = b; in IO_CONCAT()
50 return *(const volatile u64 __force *)a; in IO_CONCAT()
56 *(volatile u64 __force *)a = b; in IO_CONCAT()
62 IO_CONCAT(__IO_PREFIX,readb)(const volatile void __iomem *a) in IO_CONCAT()
64 return __kernel_ldbu(*(const volatile u8 __force *)a); in IO_CONCAT()
[all …]
/openbmc/linux/arch/mips/include/asm/sgi/
H A Dmc.h18 volatile u32 cpuctrl0; /* CPU control register 0, readwrite */
39 volatile u32 cpuctrl1; /* CPU control register 1, readwrite */
49 volatile u32 watchdogt; /* Watchdog reg rdonly, write clears */
52 volatile u32 systemid; /* MC system ID register, readonly */
57 volatile u32 divider; /* Divider reg for RPSS */
68 volatile u32 rcntpre; /* Preload refresh counter */
71 volatile u32 rcounter; /* Readonly refresh counter */
74 volatile u32 giopar; /* Parameter word for GIO64 */
93 volatile u32 cputp; /* CPU bus arb time period */
96 volatile u32 lbursttp; /* Time period for long bursts */
[all …]
/openbmc/linux/arch/powerpc/kernel/
H A Dio.c27 void _insb(const volatile u8 __iomem *port, void *buf, long count) in _insb()
34 asm volatile("sync"); in _insb()
40 asm volatile("twi 0,%0,0; isync" : : "r" (tmp)); in _insb()
44 void _outsb(volatile u8 __iomem *port, const void *buf, long count) in _outsb()
50 asm volatile("sync"); in _outsb()
54 asm volatile("sync"); in _outsb()
58 void _insw_ns(const volatile u16 __iomem *port, void *buf, long count) in _insw_ns()
65 asm volatile("sync"); in _insw_ns()
71 asm volatile("twi 0,%0,0; isync" : : "r" (tmp)); in _insw_ns()
75 void _outsw_ns(volatile u16 __iomem *port, const void *buf, long count) in _outsw_ns()
[all …]
/openbmc/linux/tools/testing/selftests/bpf/progs/
H A Dverifier_sdiv.c15 asm volatile (" \ in sdiv32_non_zero_imm_1()
27 asm volatile (" \ in sdiv32_non_zero_imm_2()
39 asm volatile (" \ in sdiv32_non_zero_imm_3()
51 asm volatile (" \ in sdiv32_non_zero_imm_4()
63 asm volatile (" \ in sdiv32_non_zero_imm_5()
75 asm volatile (" \ in sdiv32_non_zero_imm_6()
87 asm volatile (" \ in sdiv32_non_zero_imm_7()
99 asm volatile (" \ in sdiv32_non_zero_imm_8()
111 asm volatile (" \ in sdiv32_non_zero_reg_1()
124 asm volatile (" \ in sdiv32_non_zero_reg_2()
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