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/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dvideo-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/media/video-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Video Multiplexer
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 Video multiplexers allow to select between multiple input ports. Video
20 const: video-mux
22 mux-controls:
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/openbmc/linux/Documentation/admin-guide/media/
H A Dimx7.rst1 .. SPDX-License-Identifier: GPL-2.0
3 i.MX7 Video Capture Driver
7 ------------
14 - CMOS Sensor Interface (CSI)
15 - Video Multiplexer
16 - MIPI CSI-2 Receiver
18 .. code-block:: none
20 MIPI Camera Input ---> MIPI CSI-2 --- > |\
24 | U | ------> CSI ---> Capture
27 Parallel Camera Input ----------------> | /
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H A Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
3 i.MX Video Capture Driver
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
23 memory. Various dedicated DMA channels exist for both video capture and
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H A Dplatform-cardlist.rst1 .. SPDX-License-Identifier: GPL-2.0
17 am437x-vpfe TI AM437x VPFE
18 aspeed-video Aspeed AST2400 and AST2500
19 atmel-isc ATMEL Image Sensor Controller (ISC)
20 atmel-isi ATMEL Image Sensor Interface (ISI)
24 cdns-csi2rx Cadence MIPI-CSI2 RX Controller
25 cdns-csi2tx Cadence MIPI-CSI2 TX Controller
26 coda-vpu Chips&Media Coda multi-standard codec IP
27 dm355_ccdc TI DM355 CCDC video capture
28 dm644x_ccdc TI DM6446 CCDC video capture
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/openbmc/linux/Documentation/devicetree/bindings/mux/
H A Dreg-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/reg-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic register bitfield-based multiplexer controller
10 - Peter Rosin <peda@axentia.se>
19 - reg-mux # parent device of mux controller is not syscon device
20 - mmio-mux # parent device of mux controller is syscon device
24 '#mux-control-cells':
27 mux-reg-masks:
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/openbmc/linux/drivers/media/platform/
H A Dvideo-mux.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * video stream multiplexer controlled via mux control
6 * Copyright (C) 2016-2017 Pengutronix, Philipp Zabel <kernel@pengutronix.de>
12 #include <linux/mux/consumer.h>
17 #include <media/v4l2-async.h>
18 #include <media/v4l2-device.h>
19 #include <media/v4l2-fwnode.h>
20 #include <media/v4l2-mc.h>
21 #include <media/v4l2-subdev.h>
27 struct mux_control *mux; member
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for the video capture/playback device drivers.
8 obj-y += allegro-dvt/
9 obj-y += amlogic/
10 obj-y += amphion/
11 obj-y += aspeed/
12 obj-y += atmel/
13 obj-y += cadence/
14 obj-y += chips-media/
15 obj-y += intel/
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/openbmc/u-boot/drivers/video/meson/
H A Dmeson_vpu.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Amlogic Meson Video Processing Unit driver
14 #include <video.h>
42 enum vpu_compatible compat = dev_get_driver_data(priv->dev); in meson_vpu_is_compatible()
48 writel_bits(mask, value, priv->hhi_base + offset)
51 writel(value, priv->hhi_base + offset)
54 readl(priv->hhi_base + offset)
57 writel_bits(mask, value, priv->dmc_base + offset)
60 writel(value, priv->dmc_base + offset)
63 readl(priv->dmc_base + offset)
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/openbmc/linux/drivers/gpu/drm/meson/
H A Dmeson_vpp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 /* Video Post Process */
15 /* Mux VIU/VPP to ENCL */
17 /* Mux VIU/VPP to ENCI */
19 /* Mux VIU/VPP to ENCP */
22 void meson_vpp_setup_mux(struct meson_drm *priv, unsigned int mux);
H A Dmeson_vpp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 * DOC: Video Post Processing
21 * - Postblend, Blends the OSD1 only
23 * - Vertical OSD Scaler for OSD1 only, we disable vertical scaler and
25 * - Intermediate FIFO with default Amlogic values
29 * - Preblend for video overlay pre-scaling
30 * - OSD2 support for cursor framebuffer
31 * - Video pre-scaling before postblend
32 * - Full Vertical/Horizontal OSD scaling to support TV overscan
33 * - HDR conversion
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/openbmc/linux/drivers/gpu/drm/bridge/
H A Dtc358764.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <video/mipi_display.h>
24 #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
39 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */
43 /* Video path registers */
44 #define VP_CTRL 0x0450 /* Video Path Control */
65 #define VP_VFUEN 0x0464 /* Video Frame Timing Update Enable */
68 #define LV_MX0003 0x0480 /* Mux input bit 0 to 3 */
69 #define LV_MX0407 0x0484 /* Mux input bit 4 to 7 */
70 #define LV_MX0811 0x0488 /* Mux input bit 8 to 11 */
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/openbmc/linux/Documentation/devicetree/bindings/media/i2c/
H A Dmaxim,max9286.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Jacopo Mondi <jacopo+renesas@jmondi.org>
12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
17 The MAX9286 deserializer receives video data on up to 4 Gigabit Multimedia
18 Serial Links (GMSL) and outputs them on a CSI-2 D-PHY port using up to 4 data
21 In addition to video data, the GMSL links carry a bidirectional control
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/openbmc/linux/Documentation/devicetree/bindings/media/xilinx/
H A Dxlnx,v-tpg.txt1 Xilinx Video Test Pattern Generator (TPG)
2 -----------------------------------------
6 - compatible: Must contain at least one of
8 "xlnx,v-tpg-5.0" (TPG version 5.0)
9 "xlnx,v-tpg-6.0" (TPG version 6.0)
11 TPG versions backward-compatible with previous versions should list all
14 - reg: Physical base address and length of the registers set for the device.
16 - clocks: Reference to the video core clock.
18 - xlnx,video-format, xlnx,video-width: Video format and width, as defined in
19 video.txt.
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/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun8i-a33.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
24 #include "ccu-sun8i-a23-a33.h"
37 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
48 * With sigma-delta modulation for fractional-N on the audio PLL,
62 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
72 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",
84 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
96 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0",
105 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph_clk, "pll-periph",
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H A Dccu-suniv-f1c100s.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
25 #include "ccu-suniv-f1c100s.h"
39 .hw.init = CLK_HW_INIT("pll-cpu", "osc24M",
55 static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
63 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",
75 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
87 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr",
103 .hw.init = CLK_HW_INIT("pll-periph", "osc24M",
109 "pll-cpu", "pll-cpu" };
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H A Dccu-sun8i-a23.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
25 #include "ccu-sun8i-a23-a33.h"
39 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
50 * With sigma-delta modulation for fractional-N on the audio PLL,
64 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
74 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",
86 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
98 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr_clk, "pll-ddr",
107 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph_clk, "pll-periph",
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/openbmc/linux/sound/soc/codecs/
H A Dstac9766.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * stac9766.c -- ALSA SoC STAC9766 codec support
8 * Features:-
78 static const char *stac9766_record_mux[] = {"Mic", "CD", "Video", "AUX",
110 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(master_tlv, -4650, 150, 0);
112 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(beep_tlv, -4500, 300, 0);
113 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(mix_tlv, -3450, 150, 0);
147 SOC_DOUBLE_TLV("Video Volume", AC97_VIDEO, 8, 0, 31, 1, mix_tlv),
148 SOC_SINGLE("Video Switch", AC97_VIDEO, 15, 1, 1),
156 SOC_ENUM("SPDIF Mux", stac9766_SPDIF_enum),
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/openbmc/u-boot/drivers/video/sunxi/
H A Dsunxi_de2.c1 // SPDX-License-Identifier: GPL-2.0+
15 #include <video.h>
20 #include <dm/device-internal.h>
21 #include <dm/uclass-internal.h>
41 /* set SRAM for video use (A64 only) */ in sunxi_de2_composer_init()
50 clrsetbits_le32(&ccm->de_clk_cfg, CCM_DE2_CTRL_PLL_MASK, in sunxi_de2_composer_init()
54 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_DE); in sunxi_de2_composer_init()
55 setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_DE); in sunxi_de2_composer_init()
58 setbits_le32(&ccm->de_clk_cfg, CCM_DE2_CTRL_GATE); in sunxi_de2_composer_init()
61 static void sunxi_de2_mode_set(int mux, const struct display_timing *mode, in sunxi_de2_mode_set() argument
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/openbmc/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos-mixer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-mixer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
22 - enum:
23 - samsung,exynos4210-mixer
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/openbmc/linux/drivers/clk/qcom/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 APCS is managing the mux and divider which feeds the CPUs.
64 APCS is managing the mux and divider which feeds the CPUs.
120 graphics, video encode/decode, camera, etc.
137 APSS clock controller manages the Mux and enable block that feeds the
290 graphics, video encode/decode, camera, etc.
317 graphics, video encode/decode, camera, etc.
334 graphics, video encode/decode, camera, etc.
358 graphics, video encode/decode, camera, etc.
384 graphics, video encode/decode, camera, etc.
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/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dnovatek,nt36672a.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sumit Semwal <sumit.semwal@linaro.org>
16 resolution of 1080x2246. It is a video mode DSI panel.
19 - $ref: panel-common.yaml#
24 - enum:
25 - tianma,fhd-video
26 - const: novatek,nt36672a
32 reset-gpios:
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/openbmc/linux/Documentation/driver-api/media/drivers/
H A Dbttv-devel.rst1 .. SPDX-License-Identifier: GPL-2.0
7 -------------------------
10 Making video work often is not a big deal, because this is handled
15 bttv-cards.c, which holds the information required for each board.
16 Sound will work only, if the correct entry is used (for video it often
24 example. The file Documentation/admin-guide/media/bttv-cardlist.rst has a list
48 Below is a do-it-yourself description for you.
61 to connect the mux chip.
74 gpiomask specifies which pins are used to control the audio mux chip.
82 mux.
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/openbmc/linux/drivers/media/pci/cx18/
H A Dcx23418.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #include <media/drv-intf/cx2341x.h>
19 IN[0] - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is
21 OUT[0] - Task handle. This handle is passed along with commands to
23 ReturnCode - One of the ERR_SYS_... */
27 IN[0] - Task handle. Hanlde of the task to destroy
28 ReturnCode - One of the ERR_SYS_... */
49 IN[0] - audio parameters (same as CX18_CPU_SET_AUDIO_PARAMETERS?)
50 IN[1] - caller buffer address, or 0
51 ReturnCode - ??? */
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6dl-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
23 operating-points = <
29 fsl,soc-operating-points = <
30 /* ARM kHz SOC-PU uV */
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/openbmc/u-boot/arch/arm/dts/
H A Dimx6dl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6dl-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
23 operating-points = <
29 fsl,soc-operating-points = <
30 /* ARM kHz SOC-PU uV */
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