Searched +full:vbb +full:- +full:supply (Results 1 – 7 of 7) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/opp/ |
H A D | ti,omap-opp-supply.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/ti,omap-opp-supply.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments OMAP compatible OPP supply 11 registers, which contain OPP-specific voltage information tailored 16 Also, some supplies may have an associated vbb-supply, an Adaptive 18 w.r.t the vdd-supply and clk when making an OPP transition. By 20 transitions, we can use the multi-regulator support implemented by 22 OPP core binding Documentation/devicetree/bindings/opp/opp-v2.yaml [all …]
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/openbmc/linux/drivers/opp/ |
H A D | ti-opp-supply.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ 5 * Dave Gerlach <d-gerlach@ti.com> 7 * TI OPP supply driver that provides override into the regulator control 25 * struct ti_opp_supply_optimum_voltage_table - optimized voltage table 35 * struct ti_opp_supply_data - OMAP specific opp supply data 38 * @vdd_absolute_max_voltage_uv: absolute maximum voltage in UV for the supply 53 * struct ti_opp_supply_of_data - device tree match data 54 * @flags: specific type of opp supply 56 * @efuse_voltage_uv: Are the efuse entries in micro-volts? if not, assume [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mfd/ |
H A D | tps65910.txt | 4 - compatible: "ti,tps65910" or "ti,tps65911" 5 - reg: I2C slave address 6 - interrupts: the interrupt outputs of the controller 7 - #gpio-cells: number of cells to describe a GPIO, this should be 2. 10 - gpio-controller: mark the device as a GPIO controller 11 - #interrupt-cells: the number of cells to describe an IRQ, this should be 2. 14 Documentation/devicetree/bindings/interrupt-controller/interrupts.txt 15 - regulators: This is the list of child nodes that specify the regulator 20 The regulator is matched with the regulator-compatible. 22 The valid regulator-compatible values are: [all …]
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap36xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/media/omap3-isp.h> 21 operating-points-v2 = <&cpu0_opp_table>; 23 vbb-supply = <&abb_mpu_iva>; 24 clock-latency = <300000>; /* From omap-cpufreq driver */ 25 #cooling-cells = <2>; 29 cpu0_opp_table: opp-table { 30 compatible = "operating-points-v2-ti-cpu"; [all …]
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H A D | dra74x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 16 compatible = "arm,cortex-a15"; 18 operating-points-v2 = <&cpu0_opp_table>; 21 clock-names = "cpu"; 23 clock-latency = <300000>; /* From omap-cpufreq driver */ 26 #cooling-cells = <2>; /* min followed by max */ 28 vbb-supply = <&abb_mpu>; 40 compatible = "arm,cortex-a15-pmu"; 41 interrupt-parent = <&wakeupgen>; [all …]
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H A D | dra7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/clock/dra7.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/dra.h> 12 #include <dt-bindings/clock/dra7.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 21 interrupt-parent = <&crossbar_mpu>; [all …]
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/openbmc/linux/drivers/regulator/ |
H A D | ti-abb-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 * Copyright (C) 2012-2013 Texas Instruments, Inc. 27 * FAST_OPP: sets ABB LDO to Forward Body-Bias 28 * SLOW_OPP: sets ABB LDO to Reverse Body-Bias 35 * struct ti_abb_info - ABB information per voltage setting 48 * struct ti_abb_reg - Register description for ABB block 51 * @sr2_wtcnt_value_mask: setup register- sr2_wtcnt_value mask 52 * @fbb_sel_mask: setup register- FBB sel mask 53 * @rbb_sel_mask: setup register- RBB sel mask 54 * @sr2_en_mask: setup register- enable mask [all …]
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