/openbmc/linux/Documentation/devicetree/bindings/hsi/ |
H A D | client-devices.txt | 15 - hsi-flow: RX flow type ("synchronized" or "pipeline") 38 hsi-flow = "synchronized";
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H A D | nokia-modem.txt | 43 hsi-flow = "synchronized";
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/openbmc/linux/sound/firewire/fireface/ |
H A D | ff-protocol-latter.c | 32 // 0x00000040: Synchronized to word clock on BNC interface 33 // 0x00000020: Synchronized to ADAT or S/PDIF on optical interface 34 // 0x00000010: Synchronized to S/PDIF on coaxial interface 52 // 0x00000080: Synchronized to ADAT-B on 2nd optical interface 53 // 0x00000040: Synchronized to ADAT-A on 1st optical interface 54 // 0x00000020: Synchronized to AES/EBU on XLR or 2nd optical interface 55 // 0x00000010: Synchronized to word clock on BNC interface
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/openbmc/linux/drivers/comedi/drivers/ |
H A D | adv_pci1720.c | 27 * The analog outputs can operate in two modes, immediate and synchronized. 28 * This driver currently does not support the synchronized output mode. 149 /* disable synchronized output, channels update when written */ in pci1720_auto_attach()
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/openbmc/linux/include/uapi/linux/ |
H A D | dma-buf.h | 146 * synchronized APIs such as Vulkan to inter-op with dma-buf consumers 158 * implicitly synchronized writes to this dma-buf will wait on this 162 * write fence. All subsequent implicitly synchronized access to
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H A D | timex.h | 198 #define TIME_OK 0 /* clock synchronized, no leap second */ 203 #define TIME_ERROR 5 /* clock not synchronized */
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/openbmc/linux/Documentation/devicetree/bindings/timer/ |
H A D | renesas,rz-mtu3.yaml | 43 complementary PWM and reset-synchronized PWM operation. 52 reset-synchronized PWM output is settable and allows the selection 70 to be started with any desired timing and to be synchronized with 87 The module supports PWM mode{1,2}, Reset-synchronized PWM mode and
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/openbmc/qemu/migration/ |
H A D | migration-stats.h | 42 * since we synchronized bitmaps. 50 * Number of times we have synchronized guest bitmaps.
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/openbmc/linux/arch/arm/mach-omap2/ |
H A D | dma.c | 101 * a. Channel i, hardware synchronized, is enabled in configure_dma_errata() 102 * b. Another channel (Channel x), software synchronized, is enabled. in configure_dma_errata() 106 * f. A third channel (Channel y), software synchronized, is enabled. in configure_dma_errata()
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/openbmc/linux/include/linux/ |
H A D | pvclock_gtod.h | 9 * and is used to keep guest time synchronized with host time.
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/openbmc/linux/sound/soc/sh/rcar/ |
H A D | ssiu.c | 181 * set synchronized bit here in rsnd_ssiu_init() 184 /* SSI4 is synchronized with SSI3 */ in rsnd_ssiu_init() 187 /* SSI012 are synchronized */ in rsnd_ssiu_init() 190 /* SSI0129 are synchronized */ in rsnd_ssiu_init()
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/openbmc/linux/Documentation/virt/kvm/x86/ |
H A D | timekeeping.rst | 347 determine offset information in SMP systems where TSCs are not synchronized. 370 practice, getting a perfectly synchronized TSC will not be possible unless all 378 may not have a TSC value that is synchronized with the rest of the system. 382 TSC is synchronized back to a state where TSC synchronization flaws, however 401 It is recommended not to trust the TSCs to remain synchronized on NUMA or 493 synchronized with real time. 551 the TSC as seen from other CPUs, even in an otherwise perfectly synchronized
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H A D | mmu.rst | 241 are synchronized when the guest executes invlpg or flushes its tlb by 257 emulations if the page needs to be write-protected (see "Synchronized 271 Synchronized and unsynchronized pages 305 - synchronized shadow pages are write protected (*)
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/openbmc/qemu/include/semihosting/ |
H A D | console.h | 24 * - CPUState is synchronized before calling this function
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/openbmc/linux/arch/ia64/kernel/ |
H A D | time.c | 324 /* On IA64 in an SMP configuration ITCs are never accurately synchronized. in ia64_init_itm() 339 * ITC is drifty and we have not synchronized the ITCs in smpboot.c. in ia64_init_itm() 406 * migrates to another CPU, that the ITC values are synchronized across
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/openbmc/openbmc/poky/meta/recipes-core/systemd/systemd-serialgetty/ |
H A D | serial-getty@.service | 20 # sure that this is synchronized before getty.target, even though
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/openbmc/openbmc/meta-ibm/recipes-support/chrony/chrony/huygens/ |
H A D | chrony.conf | 32 # Serve time even if not synchronized to any NTP server.
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/openbmc/linux/net/core/ |
H A D | dev_addr_lists.c | 415 * __hw_addr_ref_unsync_dev - Remove synchronized addresses and references on 417 * @list: address list to remove synchronized addresses (references on it) from 451 * __hw_addr_unsync_dev - Remove synchronized addresses from device 452 * @list: address list to remove synchronized addresses from 780 * dev_uc_unsync - Remove synchronized addresses from the destination device 1003 * dev_mc_unsync - Remove synchronized addresses from the destination device
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/openbmc/linux/arch/x86/include/asm/ |
H A D | tsc.h | 51 * Boot-time check whether the TSCs are synchronized across
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/openbmc/linux/tools/testing/selftests/drivers/net/ocelot/ |
H A D | psfp.sh | 182 # Set up swp1 as a master PHC for h1, synchronized to the local 187 # synchronizing h1 to swp1 via PTP, h2 is also implicitly synchronized
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/openbmc/openbmc/meta-openembedded/meta-networking/recipes-support/chrony/chrony/ |
H A D | chrony.conf | 41 # Serve time even if not synchronized to any NTP server.
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/openbmc/linux/arch/arm64/boot/dts/allwinner/ |
H A D | sun50i-h6-orangepi-lite2.dts | 43 * Before the kernel can support synchronized
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/openbmc/linux/Documentation/driver-api/ |
H A D | pps.rst | 77 synchronized with PPS through USB. With USB 2.0, jitter may decrease 203 computers' clock to be synchronized very tightly. One way to do this is to
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/openbmc/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_cdclk.h | 46 /* pipe to which cd2x update is synchronized */
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/openbmc/u-boot/common/ |
H A D | memsize.c | 14 * memory must be synchronized.
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