/openbmc/linux/Documentation/devicetree/bindings/dma/ |
H A D | adi,axi-dmac.txt | 1 Analog Devices AXI-DMAC DMA controller 4 - compatible: Must be "adi,axi-dmac-1.00.a". 5 - reg: Specification for the controllers memory mapped register map. 6 - interrupts: Specification for the controllers interrupt. 7 - clocks: Phandle and specifier to the controllers AXI interface clock 8 - #dma-cells: Must be 1. 10 Required sub-nodes: 11 - adi,channels: This sub-node must contain a sub-node for each DMA channel. For 12 the channel sub-nodes the following bindings apply. They must match the 15 Required properties for adi,channels sub-node: [all …]
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/openbmc/linux/Documentation/input/devices/ |
H A D | xpad.rst | 2 xpad - Linux USB driver for Xbox compatible controllers 5 This driver exposes all first-party and third-party Xbox compatible 6 controllers. It has a long history and has enjoyed considerable usage 11 This only affects Original Xbox controllers. All later controller models 14 Rumble is supported on some models of Xbox 360 controllers but not of 15 Original Xbox controllers nor on Xbox One controllers. As of writing 16 the Xbox One's rumble protocol has not been reverse-engineered but in 25 - if you are using a known controller 26 - if you are using a known dance pad 27 - if using an unknown device (one not listed below), what you set in the [all …]
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/openbmc/linux/Documentation/devicetree/bindings/powerpc/fsl/ |
H A D | srio-rmu.txt | 3 For SRIO controllers that implement the message unit as part of the controller 5 node is composed of three types of sub-nodes ("fsl-srio-msg-unit", 6 "fsl-srio-dbell-unit" and "fsl-srio-port-write-unit"). 10 - compatible 13 Definition: Must include "fsl,srio-rmu-vX.Y", "fsl,srio-rmu". 18 - reg 20 Value type: <prop-encoded-array> 25 - fsl,liodn 26 Usage: optional-but-recommended (for devices with PAMU) 27 Value type: <prop-encoded-array> [all …]
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/openbmc/linux/Documentation/PCI/endpoint/ |
H A D | pci-ntb-howto.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 PCI Non-Transparent Bridge (NTB) Endpoint Function (EPF) User Guide 9 This document is a guide to help users use pci-epf-ntb function driver 13 Documentation/PCI/endpoint/pci-ntb-function.rst 19 --------------------------- 27 2900000.pcie-ep 2910000.pcie-ep 31 # ls /sys/kernel/config/pci_ep/controllers 32 2900000.pcie-ep 2910000.pcie-ep 36 ------------------------- 40 # ls /sys/bus/pci-epf/drivers [all …]
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H A D | pci-vntb-howto.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 PCI Non-Transparent Bridge (NTB) Endpoint Function (EPF) User Guide 9 This document is a guide to help users use pci-epf-vntb function driver 13 Documentation/PCI/endpoint/pci-vntb-function.rst 19 --------------------------- 28 # ls /sys/kernel/config/pci_ep/controllers 32 ------------------------- 36 # ls /sys/bus/pci-epf/drivers 45 Creating pci-epf-vntb Device 46 ---------------------------- [all …]
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/openbmc/linux/Documentation/userspace-api/media/ |
H A D | glossary.rst | 1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later 51 **Field-programmable Gate Array** 56 See https://en.wikipedia.org/wiki/Field-programmable_gate_array. 65 together make a larger user-facing functional peripheral. For 73 **Inter-Integrated Circuit** 75 A multi-master, multi-slave, packet switched, single-ended, 77 like sub-device hardware components. 79 See http://www.nxp.com/docs/en/user-guide/UM10204.pdf. 113 - :term:`CEC API`; 114 - :term:`Digital TV API`; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mips/brcm/ |
H A D | soc.txt | 5 - compatible: "brcm,bcm3368", "brcm,bcm3384", "brcm,bcm33843" 6 "brcm,bcm3384-viper", "brcm,bcm33843-viper" 12 The experimental -viper variants are for running Linux on the 3384's 16 ---------------- 21 = Always-On control block (AON CTRL) 23 This hardware provides control registers for the "always-on" (even in low-power 27 - compatible : should be one of 28 "brcm,bcm7425-aon-ctrl" 29 "brcm,bcm7429-aon-ctrl" 30 "brcm,bcm7435-aon-ctrl" and [all …]
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/openbmc/linux/Documentation/admin-guide/ |
H A D | cgroup-v2.rst | 1 .. _cgroup-v2: 11 conventions of cgroup v2. It describes all userland-visible aspects 14 v1 is available under :ref:`Documentation/admin-guide/cgroup-v1/index.rst <cgroup-v1>`. 19 1-1. Terminology 20 1-2. What is cgroup? 22 2-1. Mounting 23 2-2. Organizing Processes and Threads 24 2-2-1. Processes 25 2-2-2. Threads 26 2-3. [Un]populated Notification [all …]
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/openbmc/linux/drivers/edac/ |
H A D | skx_common.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 32 #define SKX_NUM_IMC 2 /* Memory controllers per socket */ 61 * Table 15-10 "IA32_MCi_Status [15:0] Compound Error Code Encoding" 73 * Errors from either the memory of the 1-level memory system or the 74 * 2nd level memory (the slow "far" memory) of the 2-level memory system. 79 * of the 2-level memory system. 83 /* Max RRL register sets per {,sub-,pseudo-}channel. */ 89 * memory controllers on the die. 101 * Some server BIOS may hide certain memory controllers, and the 102 * EDAC driver skips those hidden memory controllers. However, the [all …]
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | img,pistachio-pinctrl.txt | 1 Imagination Technologies Pistachio SoC pin controllers 4 The pin controllers on Pistachio are a combined GPIO controller, (GPIO) 8 each. The GPIO banks are represented as sub-nodes of the pad controller node. 10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and 11 ../interrupt-controller/interrupts.txt for generic information regarding 15 -------------------------------------------- 16 - compatible: "img,pistachio-system-pinctrl". 17 - reg: Address range of the pinctrl registers. 19 Required properties for GPIO bank sub-nodes: 20 -------------------------------------------- [all …]
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/openbmc/linux/Documentation/devicetree/bindings/gpio/ |
H A D | sprd,gpio-eic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Orson Zhai <orsonzhai@gmail.com> 12 - Baolin Wang <baolin.wang7@gmail.com> 13 - Chunyan Zhang <zhang.lyra@gmail.com> 17 be used only in input mode. The Spreadtrum platform has 2 EIC controllers, 19 controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and 20 EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- [all …]
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ddr/ |
H A D | jedec,lpddr-channel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 16 - Julius Werner <jwerner@chromium.org> 21 - jedec,lpddr2-channel 22 - jedec,lpddr3-channel 23 - jedec,lpddr4-channel 24 - jedec,lpddr5-channel 26 io-width: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | arm,pl35x-smc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl35x-smc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Miquel Raynal <miquel.raynal@bootlin.com> 18 https://documentation-service.arm.com/static/5e8e2524fd977155116a58aa 26 - arm,pl353-smc-r2p1 27 - arm,pl354 29 - compatible 33 pattern: "^memory-controller@[0-9a-f]+$" [all …]
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H A D | mediatek,smi-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yong Wu <yong.wu@mediatek.com> 31 - enum: 32 - mediatek,mt2701-smi-common 33 - mediatek,mt2712-smi-common 34 - mediatek,mt6779-smi-common 35 - mediatek,mt6795-smi-common [all …]
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/openbmc/linux/Documentation/devicetree/bindings/leds/ |
H A D | leds-spi-byte.txt | 3 The driver can be used for controllers with a very simple SPI protocol: 4 - one LED is controlled by a single byte on MOSI 5 - the value of the byte gives the brightness between two values (lowest to 7 - no return value is necessary (no MISO signal) 16 configured in a sub-node in the device node. 19 - compatible: should be one of 20 * "ubnt,acb-spi-led" microcontroller (SONiX 8F26E611LA) based device 23 Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt 26 LED sub-node properties: 27 - label: [all …]
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/openbmc/u-boot/board/freescale/ls1021atwr/ |
H A D | README | 2 -------- 6 ------------------ 8 is built on Layerscape architecture, the industry's first software-aware, 9 core-agnostic networking architecture to offer unprecedented efficiency 12 A member of the value-performance tier, the QorIQ LS1021A processor provides 14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores 15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark 17 security features and the broadest array of high-speed interconnects and 18 optimized peripheral features ever offered in a sub-3 W processor. 23 protection on both L1 and L2 caches. The LS1021A processor is pin- and [all …]
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/openbmc/u-boot/board/freescale/ls1021aqds/ |
H A D | README | 2 -------- 6 ------------------ 8 is built on Layerscape architecture, the industry's first software-aware, 9 core-agnostic networking architecture to offer unprecedented efficiency 12 A member of the value-performance tier, the QorIQ LS1021A processor provides 14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores 15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark 17 security features and the broadest array of high-speed interconnects and 18 optimized peripheral features ever offered in a sub-3 W processor. 23 protection on both L1 and L2 caches. The LS1021A processor is pin- and [all …]
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/openbmc/linux/Documentation/devicetree/bindings/power/ |
H A D | power-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/power-domain.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rafael J. Wysocki <rjw@rjwysocki.net> 11 - Kevin Hilman <khilman@kernel.org> 12 - Ulf Hansson <ulf.hansson@linaro.org> 24 \#power-domain-cells property in the PM domain provider node. 28 pattern: "^(power-controller|power-domain)([@-].*)?$" 30 domain-idle-states: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mfd/ |
H A D | wm831x.txt | 7 - compatible : One of the following chip-specific strings: 16 - reg : I2C slave address when connected using I2C, chip select number 19 - gpio-controller : Indicates this device is a GPIO controller. 20 - #gpio-cells : Must be 2. The first cell is the pin number and the 23 - interrupts : The interrupt line the IRQ signal for the device is 26 - interrupt-controller : wm831x devices contain interrupt controllers and 28 - #interrupt-cells: Must be 2. The first cell is the IRQ number, and the 30 ../interrupt-controller/interrupts.txt 32 Optional sub-nodes: 33 - phys : Contains a phandle to the USB PHY. [all …]
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/openbmc/linux/Documentation/driver-api/usb/ |
H A D | usb.rst | 1 .. _usb-hostside-api: 4 The Linux-USB Host Side API 18 That master/slave asymmetry was designed-in for a number of reasons, one 22 distributed auto-configuration since the pre-designated master node 27 for each new generation of USB, various host controllers gained support, 37 USB Host-Side API Model 40 Host-side drivers for USB devices talk to the "usbcore" APIs. There are 41 two. One is intended for *general-purpose* drivers (exposed through 49 - USB supports four kinds of data transfers (control, bulk, interrupt, 54 - The device description model includes one or more "configurations" [all …]
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/openbmc/linux/Documentation/driver-api/media/ |
H A D | maintainer-entry-profile.rst | 5 -------- 8 capture, analog and digital TV streams, cameras, remote controllers, HDMI CEC 13 - drivers/media 14 - drivers/staging/media 15 - Documentation/admin-guide/media 16 - Documentation/driver-api/media 17 - Documentation/userspace-api/media 18 - Documentation/devicetree/bindings/media/\ [1]_ 19 - include/media 33 maintainership model is to have sub-maintainers that have a broad [all …]
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/openbmc/linux/Documentation/ABI/testing/ |
H A D | sysfs-class-mux | 6 The mux/ class sub-directory belongs to the Generic MUX 8 controllers.
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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | qcom,q6v5.txt | 6 - compatible: 10 "qcom,ipq8074-wcss-pil" 11 "qcom,qcs404-wcss-pil" 13 - reg: 15 Value type: <prop-encoded-array> 19 - reg-names: 24 - interrupts-extended: 26 Value type: <prop-encoded-array> 27 Definition: reference to the interrupts that match interrupt-names 29 - interrupt-names: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mtd/ |
H A D | atmel-nand.txt | 4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt). 11 - compatible: should be one of the following 12 "atmel,at91rm9200-nand-controller" 13 "atmel,at91sam9260-nand-controller" 14 "atmel,at91sam9261-nand-controller" 15 "atmel,at91sam9g45-nand-controller" 16 "atmel,sama5d3-nand-controller" 17 "microchip,sam9x60-nand-controller" 18 - ranges: empty ranges property to forward EBI ranges definitions. 19 - #address-cells: should be set to 2. [all …]
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | cpsw.txt | 2 ------------------------------------------------------ 5 - compatible : Should be one of the below:- 7 "ti,am335x-cpsw" for AM335x controllers 8 "ti,am4372-cpsw" for AM437x controllers 9 "ti,dra7-cpsw" for DRA7x controllers 10 - reg : physical base address and size of the cpsw 12 - interrupts : property with a value describing the interrupt 14 - cpdma_channels : Specifies number of channels in CPDMA 15 - ale_entries : Specifies No of entries ALE can hold 16 - bd_ram_size : Specifies internal descriptor RAM size [all …]
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