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/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Dst,stm32-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
15 - st,stm32-rtc
16 - st,stm32h7-rtc
17 - st,stm32mp1-rtc
26 clock-names:
28 - const: pclk
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/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Dst,stm32mp1.txt1 STMicroelectronics STM32MP1 clock tree initialization
7 -------------------------------
8 RCC CLOCK = st,stm32mp1-rcc-clk
9 -------------------------------
15 Please refer to ../mfd/st,stm32-rcc.txt for all the other properties common
20 - compatible: Should be "st,stm32mp1-rcc-clk"
22 - st,clksrc : The clock source in this order
25 MPU AXI MCU PLL12 PLL3 PLL4 RTC MCO1 MCO2
28 dt-bindings/clock/stm32mp1-clksrc.h: CLK_<NAME>_<SOURCE>
30 - st,clkdiv : The div parameters in this order
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/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-dhcom-pdk2.dts1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
5 * DHCOM STM32MP1 variant:
6 * DHCM-STM32MP157C-C065-R102-F0819-SPI-E2-CAN2-SDR104-RTC-WBT-T-DSI-I-01D2
7 * DHCOM PCB number: 587-200 or newer
8 * PDK2 PCB number: 516-400 or newer
10 /dts-v1/;
14 #include "stm32mp15xx-dhcom-som.dtsi"
15 #include "stm32mp15xx-dhcom-pdk2.dtsi"
19 compatible = "dh,stm32mp157c-dhcom-pdk2", "dh,stm32mp157c-dhcom-som",
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H A Dstm32mp157c-dhcom-picoitx.dts1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
5 * DHCOM STM32MP1 variant:
6 * DHCM-STM32MP157C-C065-R102-F0819-SPI-E-CAN2-SD-RTC-T-DSI-I-01D2
7 * DHCOM PCB number: 587-200 or newer
8 * PicoITX PCB number: 487-600 or newer
10 /dts-v1/;
14 #include "stm32mp15xx-dhcom-som.dtsi"
15 #include "stm32mp15xx-dhcom-picoitx.dtsi"
19 compatible = "dh,stm32mp157c-dhcom-picoitx", "dh,stm32mp157c-dhcom-som",
28 pinctrl-names = "default", "sleep";
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H A Dstm32mp153c-dhcom-drc02.dts1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
5 * DHCOM STM32MP1 variant:
6 * DHCM-STM32MP153C-C065-R102-F0819-SPI-E2-CAN2-RTC-I-01D2
7 * DHCOM PCB number: 587-200 or newer
8 * DRC02 PCB number: 568-100 or newer
10 /dts-v1/;
14 #include "stm32mp15xx-dhcom-som.dtsi"
15 #include "stm32mp15xx-dhcom-drc02.dtsi"
19 compatible = "dh,stm32mp153c-dhcom-drc02", "dh,stm32mp153c-dhcom-som",
28 pinctrl-names = "default", "sleep";
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H A Dstm32mp157a-dk1-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157a-dk1.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
14 compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157";
16 reserved-memory {
19 no-map;
59 /delete-property/ st,syscfg-holdboot;
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H A Dstm32mp157c-dk2-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157c-dk2.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
14 compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157";
16 reserved-memory {
19 no-map;
38 phy-dsi-supply = <&scmi_reg18>;
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H A Dstm32mp157c-ed1-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157c-ed1.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter";
14 compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157";
16 reserved-memory {
19 no-map;
64 /delete-property/ st,syscfg-holdboot;
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H A Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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H A Dstm32mp157c-ev1-scmi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
7 /dts-v1/;
9 #include "stm32mp157c-ev1.dts"
10 #include "stm32mp15-scmi.dtsi"
13 model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother";
14 compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157";
16 reserved-memory {
19 no-map;
38 phy-dsi-supply = <&scmi_reg18>;
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H A Dstm32mp157a-microgea-stm32mp1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
9 compatible = "engicam,microgea-stm32mp1", "st,stm32mp157";
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
30 no-map;
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H A Dstm32mp157a-icore-stm32mp1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
9 compatible = "engicam,icore-stm32mp1", "st,stm32mp157";
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
30 no-map;
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H A Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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H A Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
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/openbmc/u-boot/drivers/power/pmic/
H A DKconfig4 ---help---
5 This config enables the driver-model PMIC support.
6 UCLASS_PMIC - designed to provide an I/O interface for PMIC devices.
7 For the multi-function PMIC devices, this can be used as parent I/O
10 - 'drivers/power/pmic/pmic-uclass.c'
11 - 'include/power/pmic.h'
17 ---help---
21 U-Boot proper.
27 ---help---
35 bool "Enable support for the active-semi 8846 PMIC"
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/openbmc/linux/drivers/rtc/
H A Drtc-stm32.c1 // SPDX-License-Identifier: GPL-2.0
18 #include <linux/rtc.h>
91 /* Max STM32 RTC register offset is 0x3FC */
94 /* STM32 RTC driver time helpers */
119 void (*clear_events)(struct stm32_rtc *rtc, unsigned int flags);
137 static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc) in stm32_rtc_wpr_unlock() argument
139 const struct stm32_rtc_registers *regs = &rtc->data->regs; in stm32_rtc_wpr_unlock()
141 writel_relaxed(RTC_WPR_1ST_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock()
142 writel_relaxed(RTC_WPR_2ND_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock()
145 static void stm32_rtc_wpr_lock(struct stm32_rtc *rtc) in stm32_rtc_wpr_lock() argument
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/openbmc/u-boot/arch/arm/dts/
H A Dstm32mp157c-ed1-u-boot.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 #include <dt-bindings/clock/stm32mp1-clksrc.h>
7 #include "stm32mp157-u-boot.dtsi"
8 #include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
18 compatible = "gpio-leds";
23 default-state = "off";
28 default-state = "on";
33 default-state = "off";
47 u-boot,dm-pre-reloc;
49 u-boot,dm-pre-reloc;
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/openbmc/linux/drivers/clk/
H A Dclk-stm32mp1.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/clk-provider.h>
17 #include <linux/reset-controller.h>
21 #include <dt-bindings/clock/stm32mp1-clks.h>
167 "ck_hse", "pll4_r", "clk-hse-div2"
393 struct gate_cfg *gate_cfg = cfg->cfg; in _clk_hw_register_gate()
396 cfg->name, in _clk_hw_register_gate()
397 cfg->parent_name, in _clk_hw_register_gate()
398 cfg->flags, in _clk_hw_register_gate()
[all …]
/openbmc/u-boot/drivers/clk/
H A Dclk_stm32mp1.c1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
7 #include <clk-uclass.h>
15 #include <dt-bindings/clock/stm32mp1-clks.h>
16 #include <dt-bindings/clock/stm32mp1-clksrc.h>
136 /* used for most of DIVR register : max div for RTC */
745 (u32)priv->osc[idx], priv->osc[idx] / 1000); in stm32mp1_clk_get_fixed()
747 return priv->osc[idx]; in stm32mp1_clk_get_fixed()
752 const struct stm32mp1_clk_gate *gate = priv->data->gate; in stm32mp1_clk_get_id()
753 int i, nb_clks = priv->data->nb_gate; in stm32mp1_clk_get_id()
[all …]
/openbmc/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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/openbmc/
Dopengrok1.0.log1 2025-02-04 03:00:48.334-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-02-04 03:00:48.456-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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Dopengrok2.0.log1 2025-02-03 03:00:38.941-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-02-03 03:00:39.061-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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