/openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
H A D | st,stm32-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 ADC 10 STM32 ADC is a successive approximation analog-to-digital converter. 12 in single, continuous, scan or discontinuous mode. Result of the ADC is 13 stored in a left-aligned or right-aligned 32-bit data register. 17 voltage goes beyond the user-defined, higher or lower thresholds. 19 Each STM32 ADC block can have up to 3 ADC instances. [all …]
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H A D | st,stm32-dfsdm-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 DFSDM ADC device driver 10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com> 11 - Olivier Moysan <olivier.moysan@foss.st.com> 14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to 17 - Sigma delta modulators (motor control, metering...) 18 - PDM microphones (audio digital microphone) [all …]
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/openbmc/u-boot/doc/device-tree-bindings/adc/ |
H A D | st,stm32-adc.txt | 1 STMicroelectronics STM32 ADC device 3 STM32 ADC is a successive approximation analog-to-digital converter. 5 in single, continuous, scan or discontinuous mode. Result of the ADC is 6 stored in a left-aligned or right-aligned 32-bit data register. 10 voltage goes beyond the user-defined, higher or lower thresholds. 12 Each STM32 ADC block can have up to 3 ADC instances. 16 - regular conversion can be done in sequence, running in background 17 - injected conversions have higher priority, and so have the ability to 21 Contents of a stm32 adc root node: 22 ----------------------------------- [all …]
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/openbmc/linux/Documentation/devicetree/bindings/regulator/ |
H A D | st,stm32-booster.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/regulator/st,stm32-booster.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 booster for ADC analog input switches 10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com> 14 to supply ADC analog input switches. 17 - $ref: regulator.yaml# 22 - st,stm32h7-booster 23 - st,stm32mp1-booster [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | stm32mp157c.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp1-clks.h> 8 #include <dt-bindings/reset/stm32mp1-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | stm32mp151.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp1-clks.h> 8 #include <dt-bindings/reset/stm32mp1-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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H A D | stm32mp15xx-dhcom-drc02.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/pwm/pwm.h> 9 &adc { 24 rs485-rx-en-hog { 25 gpio-hog; 27 output-low; 28 line-name = "rs485-rx-en"; 33 gpio-line-names = "", "", "", "", 34 "", "", "DHCOM-B", "", [all …]
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H A D | stm32mp131.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp13-clks.h> 8 #include <dt-bindings/reset/stm32mp13-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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H A D | stm32mp157c-phycore-stm32mp15-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de> 4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/leds/leds-pca9532.h> 14 #include <dt-bindings/mfd/st,stpmic1.h> [all …]
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/openbmc/linux/drivers/iio/adc/ |
H A D | stm32-adc-core.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * This file is part of STM32 ADC driver 5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 8 * Inspired from: fsl-imx25-tsadc 29 #include "stm32-adc-core.h" 45 * struct stm32_adc_common_regs - stm32 common registers 50 * @ier: interrupt enable register offset for each adc 65 * struct stm32_adc_priv_cfg - stm32 core compatible configuration data 69 * @ipid: adc identification number 72 * @num_adcs: maximum number of ADC instances in the common registers [all …]
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H A D | stm32-adc-core.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * This file is part of STM32 ADC driver 5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 14 * STM32 - ADC global register map 17 * -------------------------------------------------------- 19 * -------------------------------------------------------- 21 * -------------------------------------------------------- 23 * -------------------------------------------------------- 25 * -------------------------------------------------------- 27 /* Maximum ADC instances number per ADC block for all supported SoCs */ [all …]
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H A D | stm32-adc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * This file is part of STM32 ADC driver 5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 12 #include <linux/dma-mapping.h> 16 #include <linux/iio/timer/stm32-lptim-trigger.h> 17 #include <linux/iio/timer/stm32-timer-trigger.h> 26 #include <linux/nvmem-consumer.h> 31 #include "stm32-adc-core.h" 36 /* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */ 58 /* extsel - trigger mux selection value */ [all …]
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/openbmc/u-boot/drivers/adc/ |
H A D | stm32-adc-core.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved 6 * Originally based on the Linux kernel v4.18 drivers/iio/adc/stm32-adc-core.c. 12 #include "stm32-adc-core.h" 14 /* STM32H7 - common registers for all ADC instances */ 17 /* STM32H7_ADC_CCR - bit fields */ 27 * struct stm32h7_adc_ck_spec - specification for stm32h7 adc clock 28 * @ckmode: ADC clock mode, Async or sync with prescaler. 65 /* stm32h7 bus clock is common for all ADC instances (mandatory) */ in stm32h7_adc_clk_sel() 66 if (!clk_valid(&common->bclk)) { in stm32h7_adc_clk_sel() [all …]
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H A D | stm32-adc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved 6 * Originally based on the Linux kernel v4.18 drivers/iio/adc/stm32-adc.c. 10 #include <adc.h> 13 #include "stm32-adc-core.h" 15 /* STM32H7 - Registers for each ADC instance */ 26 /* STM32H7_ADC_ISR - bit fields */ 31 /* STM32H7_ADC_CR - bit fields */ 43 /* STM32H7_ADC_SQR1 - bit fields */ 46 /* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */ [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mfd/ |
H A D | st,stm32-lptimer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Low-Power Timers 10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several 12 - PWM output (with programmable prescaler, configurable polarity) 13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT) 14 - Several counter modes: 15 - quadrature encoder to detect angular position and direction of rotary [all …]
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/openbmc/u-boot/drivers/power/pmic/ |
H A D | Kconfig | 4 ---help--- 5 This config enables the driver-model PMIC support. 6 UCLASS_PMIC - designed to provide an I/O interface for PMIC devices. 7 For the multi-function PMIC devices, this can be used as parent I/O 10 - 'drivers/power/pmic/pmic-uclass.c' 11 - 'include/power/pmic.h' 17 ---help--- 21 U-Boot proper. 27 ---help--- 35 bool "Enable support for the active-semi 8846 PMIC" [all …]
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/openbmc/u-boot/ |
H A D | MAINTAINERS | 8 W: Web-page with status/info 24 N: [^a-z]tegra all files whose path contains the word tegra 52 ----------------------------------- 57 L: uboot-snps-arc@synopsys.com 58 T: git git://git.denx.de/u-boot-arc.git 65 L: uboot-snps-arc@synopsys.com 66 F: drivers/clk/clk-hsdk-cgu.c 67 F: include/dt-bindings/clock/snps,hsdk-cgu.h 68 F: doc/device-tree-bindings/clock/snps,hsdk-cgu.txt 73 L: uboot-snps-arc@synopsys.com [all …]
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/openbmc/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
/openbmc/ |
D | opengrok1.0.log | 1 2025-03-15 03:00:37.236-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-03-15 03:00:37.352-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |
D | opengrok2.0.log | 1 2025-03-14 03:00:40.378-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-03-14 03:00:40.496-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |