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/openbmc/linux/tools/perf/pmu-events/arch/x86/amdzen3/
H A D	other.json	22 …oken Stall. Also counts cycles when the thread is not selected to dispatch but would have been sta… 28 …en Stall. Also counts cycles when the thread is not selected to dispatch but would have been stall… 34 …Stall. Also counts cycles when the thread is not selected to dispatch but would have been stalled … 40 …Stall. Also counts cycles when the thread is not selected to dispatch but would have been stalled … 46 … valid but does not get dispatched due to a token stall. Integer Scheduler miscellaneous resource … 52 …en Stall. Also counts cycles when the thread is not selected to dispatch but would have been stall… 58 …ken Stall. Also counts cycles when the thread is not selected to dispatch but would have been stal… 64 …Stall. Also counts cycles when the thread is not selected to dispatch but would have been stalled … 70 …here a dispatch group is valid but does not get dispatched due to a token stall. Insufficient Reti… 76 …here a dispatch group is valid but does not get dispatched due to a token stall. AGSQ Tokens unava… [all …]
/openbmc/linux/arch/alpha/lib/
H A D	ev6-stxcpy.S	`59 mskqh t2, a1, t2 # U : detection in the src word (stall) 61 ornot t1, t2, t2 # E : (stall) 65 or t0, t3, t1 # E : (stall) 66 bne t8, $a_eos # U : (stall) 81 cmpbge zero, t1, t8 # E : (3 cycle stall) 82 beq t8, $a_loop # U : (stall for t8) 90 and t8, t6, t12 # E : (stall) 93 and t12, 0x80, t6 # E : (stall) 94 bne t6, 1f # U : (stall) 100 zapnot t1, t6, t1 # U : clear src bytes >= null (stall) [all …]`
H A D	ev6-stxncpy.S	`67 mskqh t2, a1, t2 # U : detection in the src word (stall) 69 ornot t1, t2, t2 # E : (stall) 73 or t0, t3, t0 # E : (stall) 114 and t8, t12, t12 # E : (stall) 117 and t12, 0x80, t6 # E : (stall) 118 bne t6, 1f # U : (stall) 124 or t12, t6, t8 # E : (stall) 125 zapnot t0, t8, t0 # U : clear src bytes > null (stall) 128 or t0, t1, t0 # e1 : (stall) 156 and t1, 7, t1 # E : (stall) [all …]`
H A D	ev6-csum_ipv6_magic.S	116 cmpult $20,$3,$3 # E : (1 cycle stall on $20) 117 addq $20,$18,$20 # E : U L U L (1 cycle stall on $20) 120 addq $20,$19,$20 # E : (1 cycle stall on $20) 125 addq $18,$19,$18 # E : (1 cycle stall on $19) 128 /* (1 cycle stall on $18, 2 cycles on $20) */ 131 zapnot $0,15,$1 # U : Start folding output (1 cycle stall on $0) 133 srl $0,32,$0 # U : U L U L : (1 cycle stall on $0) 136 extwl $1,2,$2 # U : ushort[1] (1 cycle stall on $1) 137 zapnot $1,3,$0 # U : ushort[0] (1 cycle stall on $1) 138 extwl $1,4,$1 # U : ushort[2] (1 cycle stall on $1) [all …]
/openbmc/linux/Documentation/RCU/
H A D	stallwarn.rst	4 Using RCU's CPU Stall Detector 7 This document first discusses what sorts of issues RCU's CPU stall 10 this document explains the stall detector's "splat" format. 13 What Causes RCU CPU Stall Warnings? 16 So your kernel printed an RCU CPU stall warning. The next question is 17 "What caused it?" The following problems can result in RCU CPU stall 37 RCU CPU stall warning messages. Especially if you have added 54 memory, you might see stall-warning messages. 62 CONFIG_PREEMPT_RCU case, you might see stall-warning 77 RCU CPU stall warnings. [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/amdzen2/
H A D	other.json	28 …here a dispatch group is valid but does not get dispatched due to a token stall. FP Miscellaneous … 34 … group is valid but does not get dispatched due to a token stall. FP scheduler resource stall. App… 40 …s valid but does not get dispatched due to a token stall. Floating point register file resource st… 46 …oup is valid but does not get dispatched due to a token stall. Taken branch buffer resource stall.… 52 … valid but does not get dispatched due to a token stall. Integer Scheduler miscellaneous resource … 58 …h group is valid but does not get dispatched due to a token stall. Store queue resource stall. App… 64 …h group is valid but does not get dispatched due to a token stall. Load queue resource stall. Appl… 70 … valid but does not get dispatched due to a token stall. Integer Physical Register File resource s… 76 … dispatch group is valid but does not get dispatched due to a token stall. SC AGU dispatch stall.", 82 …here a dispatch group is valid but does not get dispatched due to a token stall. RETIRE Tokens una… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a55/
H A D	pipeline.json	27 …s every cycle that issue is stalled and there is an interlock. Stall cycles due to a stall in Wr (… 30 …s every cycle that issue is stalled and there is an interlock. Stall cycles due to a stall in Wr (… 33 …truction waiting for data to calculate the address in the AGU. Stall cycles due to a stall in Wr (… 36 …truction waiting for data to calculate the address in the AGU. Stall cycles due to a stall in Wr (… 39 … there is an interlock that is due to an FPU/NEON instruction. Stall cycles due to a stall in the … 42 … there is an interlock that is due to an FPU/NEON instruction. Stall cycles due to a stall in the … 45 … issued due to the backend, load.This event counts every cycle there is a stall in the Wr stage du… 48 … issued due to the backend, load.This event counts every cycle there is a stall in the Wr stage du… 51 …issued due to the backend, store.This event counts every cycle there is a stall in the Wr stage du… 54 …issued due to the backend, store.This event counts every cycle there is a stall in the Wr stage du… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
H A D	pipeline.json	9 "ArchStdEvent": "STALL" 39 …he issue of an operation is stalled and there is an interlock. Stall cycles due to a stall in the … 42 …he issue of an operation is stalled and there is an interlock. Stall cycles due to a stall in the … 45 …d/store instruction waiting for data to calculate the address. Stall cycles due to a stall in the … 48 …d/store instruction waiting for data to calculate the address. Stall cycles due to a stall in the … 51 …nts every cycle where there is a stall or an interlock that is caused by a VPU instruction. Stall … 54 …nts every cycle where there is a stall or an interlock that is caused by a VPU instruction. Stall … 57 … due to the backend, load. This event counts every cycle where there is a stall in the Wr stage du… 60 … due to the backend, load. This event counts every cycle where there is a stall in the Wr stage du… 63 …due to the backend, store. This event counts every cycle where there is a stall in the Wr stage du… [all …]
/openbmc/linux/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
H A D	sp.c	`40 sp_stall_t *stall) in sp_get_state() argument 45 assert(stall); in sp_get_state() 53 stall->fifo0 = in sp_get_state() 55 stall->fifo1 = in sp_get_state() 57 stall->fifo2 = in sp_get_state() 59 stall->fifo3 = in sp_get_state() 61 stall->fifo4 = in sp_get_state() 63 stall->fifo5 = in sp_get_state() 65 stall->fifo6 = in sp_get_state() 67 stall->fifo7 = in sp_get_state() [all …]`
H A D	isp.c	`45 isp_stall_t *stall) in isp_get_state() argument 50 assert(stall); in isp_get_state() 64 stall->stat_ctrl = in isp_get_state() 66 stall->pmem = in isp_get_state() 68 stall->dmem = in isp_get_state() 70 stall->vmem = in isp_get_state() 72 stall->fifo0 = in isp_get_state() 74 stall->fifo1 = in isp_get_state() 76 stall->fifo2 = in isp_get_state() 78 stall->fifo3 = in isp_get_state() [all …]`
/openbmc/linux/tools/perf/pmu-events/arch/powerpc/power8/
H A D	pipeline.json	23 "BriefDescription": "Completion stall", 29 "BriefDescription": "Completion stall due to a Branch Unit", 35 "BriefDescription": "Completion stall by Dcache miss", 41 …"BriefDescription": "Completion stall by Dcache miss which resolved on chip ( excluding local L2/L… 47 "BriefDescription": "Completion stall by Dcache miss which resolved in L2/L3", 53 …"BriefDescription": "Completion stall due to cache miss that resolves in the L2 or L3 with a confl… 54 …"PublicDescription": "Completion stall due to cache miss resolving in core's L2/L3 with a conflict" 59 "BriefDescription": "Completion stall due to cache miss resolving missed the L3", 65 "BriefDescription": "Completion stall due to cache miss that resolves in local memory", 66 "PublicDescription": "Completion stall due to cache miss resolving in core's Local Memory" [all …]
/openbmc/linux/tools/perf/pmu-events/arch/arm64/ampere/ampereone/
H A D	core-imp-def.json	201 "PublicDescription": "Stall due to BOB ID", 204 "BriefDescription": "Stall due to BOB ID" 207 "PublicDescription": "Dispatch stall due to LOB entries", 210 "BriefDescription": "Dispatch stall due to LOB entries" 213 "PublicDescription": "Dispatch stall due to SOB entries", 216 "BriefDescription": "Dispatch stall due to SOB entries" 219 "PublicDescription": "Dispatch stall due to IXU scheduler entries", 222 "BriefDescription": "Dispatch stall due to IXU scheduler entries" 225 "PublicDescription": "Dispatch stall due to FSU scheduler entries", 228 "BriefDescription": "Dispatch stall due to FSU scheduler entries" [all …]
/openbmc/linux/drivers/staging/media/atomisp/pci/
H A D	sh_css_metrics.c	51 histogram->stall[i] = 0; in clear_histogram() 75 histogram->stall = kvmalloc(length * sizeof(*histogram->stall), in make_histogram() 77 if (!histogram->stall) in make_histogram() 122 bool stall; in sh_css_metrics_sample_pcs() local 136 stall = (msink != 0x7FF); in sh_css_metrics_sample_pcs() 138 if (stall) in sh_css_metrics_sample_pcs() 139 isp_histogram->stall[pc]++; in sh_css_metrics_sample_pcs() 148 stall = (msink != 0x7FF); in sh_css_metrics_sample_pcs() 149 if (stall) in sh_css_metrics_sample_pcs() 150 sp_histogram->stall[pc]++; in sh_css_metrics_sample_pcs()
/openbmc/linux/Documentation/accounting/
H A D	psi.rst	4 PSI - Pressure Stall Information 55 stall state is tracked separately and exported in the "full" averages. 62 as well as medium and long term trends. The total absolute stall time 73 A trigger describes the maximum cumulative stall time over a specific 74 time window, e.g. 100ms of total stall time within any 500ms window to 83 <some\|full> <stall amount in us> <time window in us> 86 would add 150ms threshold for partial memory stall measured within 88 would add 50ms threshold for full io stall measured within 1sec time window. 97 Monitors activate only when system enters stall state for the monitored 98 psi metric and deactivates upon exit from the stall state. While system is [all …]
/openbmc/linux/Documentation/devicetree/bindings/misc/
H A D	qemu,vcpu-stall-detector.yaml	`4 $id: http://devicetree.org/schemas/misc/qemu,vcpu-stall-detector.yaml# 7 title: VCPU stall detector 10 This binding describes a CPU stall detector mechanism for virtual CPUs 19 - qemu,vcpu-stall-detector 27 The internal clock of the stall detector peripheral measure in Hz used 34 The stall detector expiration timeout measured in seconds. 47 compatible = "qemu,vcpu-stall-detector";`
/openbmc/linux/tools/perf/pmu-events/arch/powerpc/power9/
H A D	metrics.json	38 "BriefDescription": "Completion stall due to a Branch Unit", 44 …"BriefDescription": "Finish stall because the NTF instruction was routed to the crypto execution p… 50 …"BriefDescription": "Finish stall because the NTF instruction was a load that missed the L1 and wa… 56 …"BriefDescription": "Finish stall because the NTF instruction was a multi-cycle instruction issued… 68 …"BriefDescription": "Finish stall because the NTF instruction was issued to the Decimal Floating P… 74 "BriefDescription": "Completion stall by Dcache miss which resolved off node memory/cache", 80 …"BriefDescription": "Completion stall by Dcache miss which resolved on chip ( excluding local L2/L… 86 …"BriefDescription": "Completion stall due to cache miss that resolves in the L2 or L3 with a confl… 92 …"BriefDescription": "Completion stall due to cache miss that resolves in the L2 or L3 without conf… 98 "BriefDescription": "Completion stall by Dcache miss which resolved in L2/L3", [all …]
H A D	cache.json	15 …"BriefDescription": "Completion stall due to a long latency scalar fixed point instruction (divisi… 20 …"BriefDescription": "Finish stall due to a scalar fixed point or CR instruction in the execution p… 30 "BriefDescription": "Completion stall by Dcache miss which resolved in L2/L3" 35 …"BriefDescription": "Finish stall because the NTF instruction was a load that missed in the L1 and… 45 …"BriefDescription": "Finish stall because the NTF instruction was a load instruction with all its … 85 …"BriefDescription": "Completion stall due to cache miss that resolves in the L2 or L3 with a confl… 90 …"BriefDescription": "Finish stall because the NTF instruction was a load that hit on an older stor… 105 … "BriefDescription": "Finish stall because the NTF instruction was a larx waiting to be satisfied"
/openbmc/linux/tools/perf/pmu-events/arch/x86/amdzen1/
H A D	other.json	17 …here a dispatch group is valid but does not get dispatched due to a token stall. RETIRE Tokens una… 23 …here a dispatch group is valid but does not get dispatched due to a token stall. AGSQ Tokens unava… 29 …here a dispatch group is valid but does not get dispatched due to a token stall. ALU tokens total … 35 …here a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 3_0 Tokens u… 41 …here a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 3 Tokens una… 47 …here a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 2 Tokens una… 53 …here a dispatch group is valid but does not get dispatched due to a token stall. ALSQ 1 Tokens una…
/openbmc/linux/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/
H A D	metrics.json	155 "PublicDescription": "Sync stall L3 topdown metric", 156 "BriefDescription": "Sync stall L3 topdown metric", 162 "PublicDescription": "Rob stall L3 topdown metric", 163 "BriefDescription": "Rob stall L3 topdown metric", 169 "PublicDescription": "Ptag stall L3 topdown metric", 170 "BriefDescription": "Ptag stall L3 topdown metric", 176 "PublicDescription": "SaveOpQ stall L3 topdown metric", 177 "BriefDescription": "SaveOpQ stall L3 topdown metric", 183 "PublicDescription": "PC buffer stall L3 topdown metric", 184 "BriefDescription": "PC buffer stall L3 topdown metric", [all …]
/openbmc/linux/drivers/misc/
H A D	vcpu_stall_detector.c	3 // VCPU stall detector. 46 /* The vcpu stall configuration structure which applies to all the CPUs / 62 / Reload the stall detector counter register every in vcpu_stall_detect_timer_fn() 90 /* Compute the number of ticks required for the stall detector in start_stall_detector_cpu() 98 /* Enable the internal clock and start the stall detector / in start_stall_detector_cpu() 101 / Pet the stall detector at half of its expiration timeout in start_stall_detector_cpu() 125 /* Disable the stall detector for the current CPU */ in stop_stall_detector_cpu() 164 dev_warn(&pdev->dev, "stall timeout out of range\n"); in vcpu_stall_detect_probe() 203 { .compatible = "qemu,vcpu-stall-detector", }, 222 MODULE_DESCRIPTION("VCPU stall detector");
/openbmc/linux/kernel/rcu/
H A D	Kconfig.debug	72 int "RCU CPU stall timeout in seconds" 78 number of seconds, a CPU stall warning is printed. If the 79 RCU grace period persists, additional CPU stall warnings are 83 int "Expedited RCU CPU stall timeout in milliseconds" 89 specified number of milliseconds, a CPU stall warning is printed. 90 If the RCU grace period persists, additional CPU stall warnings 96 bool "Provide additional RCU stall debug information" 103 RCU stall report. For multiple continuous RCU stalls, all sampling 104 periods begin at half of the first RCU stall timeout.
/openbmc/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A D	frontend.json	95 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 100 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 106 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 111 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 117 …retired instructions that are delivered to the back-end after a front-end stall of at least 16 cyc… 128 …elivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.", 133 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 139 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 144 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.", 150 …a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A D	frontend.json	98 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 103 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 109 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 114 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 120 …retired instructions that are delivered to the back-end after a front-end stall of at least 16 cyc… 131 …elivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.", 136 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 142 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 147 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.", 153 …a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/alderlake/
H A D	frontend.json	113 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 119 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 125 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 131 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 137 …retired instructions that are delivered to the back-end after a front-end stall of at least 16 cyc… 149 …elivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.", 155 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 161 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 167 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.", 173 …a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.", [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	frontend.json	98 …delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.", 103 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 109 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.", 114 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.", 120 …retired instructions that are delivered to the back-end after a front-end stall of at least 16 cyc… 131 …elivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.", 136 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 142 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.", 147 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.", 153 …a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.", [all …]

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