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/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Daspeed-lpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Andrew Jeffery <andrew@aj.id.au>
12 - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
15 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
21 The LPC controller is represented as a multi-function device to account for the
27 as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
28 management and bus snoop configuration.
[all …]
/openbmc/linux/drivers/soc/aspeed/
H A Daspeed-lpc-snoop.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Provides a simple driver to control the ASPEED LPC snoop interface which
26 #define DEVICE_NAME "aspeed-lpc-snoop"
75 return container_of(file->private_data, in snoop_file_to_chan()
87 if (kfifo_is_empty(&chan->fifo)) { in snoop_file_read()
88 if (file->f_flags & O_NONBLOCK) in snoop_file_read()
89 return -EAGAIN; in snoop_file_read()
90 ret = wait_event_interruptible(chan->wq, in snoop_file_read()
91 !kfifo_is_empty(&chan->fifo)); in snoop_file_read()
92 if (ret == -ERESTARTSYS) in snoop_file_read()
[all …]
/openbmc/linux/drivers/usb/core/
H A Ddevio.c1 // SPDX-License-Identifier: GPL-2.0+
5 * devio.c -- User space communication with USB devices.
7 * Copyright (C) 1999-2000 Thomas Sailer (sailer@ife.ee.ethz.ch)
18 * 30.09.2005 0.3 Fix user-triggerable oops in async URB delivery
19 * (CAN-2005-3055)
42 #include <linux/dma-mapping.h>
56 #define USB_SG_SIZE 16384 /* split-size for large txs */
58 /* Mutual exclusion for ps->list in resume vs. release and remove */
121 #define snoop(dev, format, arg...) \ macro
140 #define USBFS_XFER_MAX (UINT_MAX / 2 - 1000000)
[all …]
/openbmc/qemu/include/hw/cxl/
H A Dcxl_component.h7 * COPYING file in the top-level directory.
38 * CXL r3.1 Table 8-22: CXL_CAPABILITY_ID Assignment for details.
58 CXLx_CAPABILITY_HEADER(SNOOP, 0x14)
105 /* Offset 0x18 - 0x58 reserved for RAS logs */
110 #define CXL_SEC_REGISTERS_SIZE 0 /* We don't implement 1.1 downstream ports */
197 /* CXL r3.1 Section 8.2.4.23 - CXL Snoop Filter Capability Structure */
214 * CXL r3.1 Table 8-21: CXL Subsystem Component Register Ranges
215 * 0x0000 - 0x0fff CXL.io registers
216 * 0x1000 - 0x1fff CXL.cache and CXL.mem
217 * 0x2000 - 0xdfff Implementation specific
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/openbmc/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A Dcache.json10 …"BriefDescription": "Cache lines in M state evicted out of L1D due to Snoop HitM or dirty line rep…
32 …on": "Cycles when dispatched loads are cancelled due to L1D bank conflicts with other load ports.",
100 …on": "Count the number of modified Lines evicted from L1 and missed L2. (Non-rejected WBs from the…
339 "BriefDescription": "Core-originated cacheable demand requests missed LLC.",
346 "BriefDescription": "Core-originated cacheable demand requests that refer to LLC.",
353 …iption": "Retired load uops which data sources were LLC and cross-core snoop hits in on-pkg core c…
356 …-level cache (L3) and were found in a non-modified state in a neighboring core's private cache (sa…
364 …-level cache (L3) and were found in a non-modified state in a neighboring core's private cache (sa…
369 …n": "Retired load uops which data sources were LLC hit and cross-core snoop missed in on-pkg core …
383 "BriefDescription": "Data from local DRAM either Snoop not needed or Snoop Miss (RspI)",
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/openbmc/phosphor-host-postd/
H A Dmain.cpp8 * http://www.apache.org/licenses/LICENSE-2.0
20 #include "lpcsnoop/snoop.hpp"
26 #include <systemd/sd-event.h>
54 " -h, --host <host instances> Default is '0'\n" in usage()
56 " -d, --device <DEVICE> use <DEVICE> file.\n" in usage()
57 " -r, --rate-limit=<N> Only process N POST codes from the " in usage()
59 " -b, --bytes <SIZE> set POST code length to <SIZE> bytes. " in usage()
62 " -v, --verbose Prints verbose information while running\n\n", in usage()
68 * the configured rate limit, this function will disable the snoop device IO
69 * source until the end of the 1 second interval, then re-enable it.
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/openbmc/linux/tools/perf/pmu-events/arch/x86/sandybridge/
H A Dcache.json10 …"BriefDescription": "Cache lines in M state evicted out of L1D due to Snoop HitM or dirty line rep…
32 …on": "Cycles when dispatched loads are cancelled due to L1D bank conflicts with other load ports.",
100 …on": "Count the number of modified Lines evicted from L1 and missed L2. (Non-rejected WBs from the…
339 "BriefDescription": "Core-originated cacheable demand requests missed LLC.",
346 "BriefDescription": "Core-originated cacheable demand requests that refer to LLC.",
353 …d load uops which data sources were LLC and cross-core snoop hits in on-pkg core cache. (Precise E…
357 …-level cache (L3) and were found in a non-modified state in a neighboring core's private cache (sa…
362 …Retired load uops which data sources were HitM responses from shared LLC. (Precise Event - PEBS).",
366 …-level cache (L3) and were found in a non-modified state in a neighboring core's private cache (sa…
371 …d uops which data sources were LLC hit and cross-core snoop missed in on-pkg core cache. (Precise …
[all …]
/openbmc/u-boot/drivers/ata/
H A Ddwc_ahsata_priv.h1 /* SPDX-License-Identifier: GPL-2.0+ */
51 /* Ports Implemented Register */
67 /* Command Completion Coalescing Ports */
108 /* Timer 1-ms Register */
150 /* Port# Command List Base Address Upper 32-Bits Register */
155 /* Port# FIS Base Address Upper 32-Bits Register */
299 /* Snoop enable for all descriptor */
302 #define CMD_HDR_ATTR_RESET 0x00000080 /* Reset - a SRST or device reset */
303 /* BIST - require the host to enter BIST mode */
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-asus-x4tf.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/gpio/aspeed-gpio.h>
11 model = "ASUS-X4TF";
12 compatible = "asus,x4tf-bmc", "aspeed,ast2600";
19 stdout-path = "serial4:115200n8";
27 reserved-memory {
28 #address-cells = <1>;
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H A Daspeed-bmc-inventec-transformers.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include "aspeed-g6-pinctrl.dtsi"
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/gpio/aspeed-gpio.h>
13 compatible = "inventec,transformer-bmc", "aspeed,ast2600";
20 stdout-path = &uart5;
30 compatible = "gpio-leds";
49 ethphy0: ethernet-phy@0 {
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H A Daspeed-bmc-vegman.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
29 compatible = "shared-dma-pool";
36 record-size = <0x2000>;
37 console-size = <0x2000>;
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H A Daspeed-bmc-asrock-e3c246d4i.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "asrock,e3c246d4i-bmc", "aspeed,ast2500";
18 stdout-path = &uart5;
27 compatible = "gpio-leds";
32 linux,default-trigger = "timer";
[all …]
H A Daspeed-bmc-inventec-starscream.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include "aspeed-g6-pinctrl.dtsi"
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/gpio/aspeed-gpio.h>
13 compatible = "inventec,starscream-bmc", "aspeed,ast2600";
20 stdout-path = &uart5;
28 reserved-memory {
29 #address-cells = <1>;
[all …]
H A Daspeed-bmc-opp-lanyang.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
10 compatible = "inventec,lanyang-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
27 no-map;
[all …]
H A Daspeed-bmc-asrock-romed8hm3.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "asrock,romed8hm3-bmc", "aspeed,ast2500";
17 stdout-path = &uart5;
26 compatible = "gpio-leds";
30 linux,default-trigger = "timer";
33 system-fault {
[all …]
H A Daspeed-bmc-amd-daytonax.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "amd,daytonax-bmc", "aspeed,ast2500";
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
24 compatible = "shared-dma-pool";
[all …]
H A Daspeed-bmc-amd-ethanolx.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
18 reserved-memory {
19 #address-cells = <1>;
20 #size-cells = <1>;
26 compatible = "shared-dma-pool";
[all …]
H A Daspeed-bmc-asrock-spc621d8hm3.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "asrock,spc621d8hm3-bmc", "aspeed,ast2500";
21 stdout-path = &uart5;
30 compatible = "gpio-leds";
34 linux,default-trigger = "timer";
[all …]
H A Daspeed-bmc-asrock-e3c256d4i.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/watchdog/aspeed-wdt.h>
12 compatible = "asrock,e3c256d4i-bmc", "aspeed,ast2500";
24 stdout-path = &uart5;
33 compatible = "gpio-leds";
[all …]
/openbmc/linux/drivers/pci/controller/
H A Dvmd.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/pci-acpi.h>
15 #include <linux/pci-ecam.h>
53 * vendor-specific capability space
58 * Device may use MSI-X vector 0 for software triggering and will not
64 * Device can bypass remapping MSI-X transactions into its MSI-X table,
71 * Enable ASPM on the PCIE root ports and set the default LTR of the
94 * struct vmd_irq - private data to map driver IRQ to the VMD shared vector
100 * Every MSI/MSI-X IRQ requested for a device in a VMD domain will be mapped to
111 * struct vmd_irq_list - list of driver requested IRQs mapping to a VMD vector
[all …]
/openbmc/linux/arch/powerpc/platforms/4xx/
H A Dsoc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * Copyright (c) 2003 - 2006 Zultys Technologies
22 #include <asm/dcr-regs.h>
29 * L2-cache
83 np = of_find_compatible_node(NULL, NULL, "ibm,l2-cache"); in ppc4xx_l2c_probe()
88 prop = of_get_property(np, "cache-size", NULL); in ppc4xx_l2c_probe()
90 printk(KERN_ERR "%pOF: Can't get cache-size!\n", np); in ppc4xx_l2c_probe()
92 return -ENODEV; in ppc4xx_l2c_probe()
97 dcrreg = of_get_property(np, "dcr-reg", &len); in ppc4xx_l2c_probe()
101 return -ENODEV; in ppc4xx_l2c_probe()
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A Divt-metrics.json4 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
11 "MetricExpr": "cstate_core@c3\\-residency@ / TSC",
18 "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",
25 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
32 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
39 "MetricExpr": "cstate_core@c7\\-residency@ / TSC",
46 "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",
59 "MetricExpr": "((msr@aperf@ - cycles) / msr@aperf@ if msr@smi@ > 0 else 0)",
78 …sible; which incur a few cycles load re-issue. However; the short re-issue duration is often hidde…
82 …etric represents Core fraction of cycles CPU dispatched uops on execution ports for ALU operations…
[all …]
/openbmc/linux/drivers/ntb/hw/idt/
H A Dntb_hw_idt.h7 * Copyright (C) 2016-2018 T-Platforms JSC All Rights Reserved.
36 * IDT PCIe-switch NTB Linux driver
39 * Serge Semin <fancer.lancer@gmail.com>, <Sergey.Semin@t-platforms.ru>
55 * the supported IDT PCIe-switches
66 * IDT PCIe-switches device IDs
78 * NT-function Configuration Space registers
79 * NOTE 1) The IDT PCIe-switch internal data is little-endian
83 * with byte-enables corresponding to their native size or
86 * So to simplify the driver code, there is only DWORD-sized read/write
107 /* IDT Proprietary NT-port-specific registers */
[all …]
/openbmc/linux/arch/mips/pci/
H A Dpcie-octeon.c17 #include <asm/octeon/cvmx-npei-defs.h>
18 #include <asm/octeon/cvmx-pciercx-defs.h>
19 #include <asm/octeon/cvmx-pescx-defs.h>
20 #include <asm/octeon/cvmx-pexp-defs.h>
21 #include <asm/octeon/cvmx-pemx-defs.h>
22 #include <asm/octeon/cvmx-dpi-defs.h>
23 #include <asm/octeon/cvmx-sli-defs.h>
24 #include <asm/octeon/cvmx-sriox-defs.h>
25 #include <asm/octeon/cvmx-helper-errata.h>
26 #include <asm/octeon/pci-octeon.h>
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A Dhsx-metrics.json4 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
11 "MetricExpr": "cstate_core@c3\\-residency@ / TSC",
18 "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",
25 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
32 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
39 "MetricExpr": "cstate_core@c7\\-residency@ / TSC",
46 "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",
230 …"BriefDescription": "Uops delivered from legacy decode pipeline (Micro-instruction Translation Eng…
237 … "MetricExpr": "(UOPS_ISSUED.ANY - IDQ.MITE_UOPS - IDQ.MS_UOPS - IDQ.DSB_UOPS) / UOPS_ISSUED.ANY",
255 "MetricExpr": "((msr@aperf@ - cycles) / msr@aperf@ if msr@smi@ > 0 else 0)",
[all …]

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