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/openbmc/linux/include/drm/display/
H A Ddrm_dsc.h1 /* SPDX-License-Identifier: MIT
48 * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters
70 * struct drm_dsc_config - Parameters required to configure DSC
78 * Bits per component for previous reconstructed line buffer
82 * @bits_per_component: Bits per component to code (8/10/12)
87 * Flag to indicate if RGB - YCoCg conversion is needed
92 * @slice_count: Number fo slices per line used by the DSC encoder
96 * @slice_width: Width of each slice in pixels
100 * @slice_height: Slice height in pixels
127 * Target bits per pixel with 4 fractional bits, bits_per_pixel << 4
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/openbmc/linux/tools/perf/pmu-events/arch/powerpc/power9/
H A Dother.json25 "BriefDescription": "Cycles in which the SRQ has at least one (out of four) empty slice"
60 …"BriefDescription": "A demand load referenced a line in an active fuzzy prefetch stream. The strea…
65 "BriefDescription": "Read-write data cache collisions"
90 "BriefDescription": "D-cache invalidates sent over the reload bus to the core"
120 …"BriefDescription": "L3 TM CAM is full when a L2 castout of TM_SC line occurs. Line is pushed to …
125 "BriefDescription": "TEND latency per thread"
175 "BriefDescription": "Ic line invalidated"
190 …"BriefDescription": "TM snoop that is a store hits line in L3 in T, Tn or Te state (shared modifie…
200 "BriefDescription": "Read-write data cache collisions"
235 … "BriefDescription": "Core TM load hits line in L3 in TM_SC state and causes it to be invalidated"
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/openbmc/linux/Documentation/scheduler/
H A Dsched-bwc.rst7 The SCHED_RT case is covered in Documentation/scheduler/sched-rt-group.rst
14 microseconds of CPU time. That quota is assigned to per-cpu run queues in
22 is transferred to cpu-local "silos" on a demand basis. The amount transferred
23 within each of these updates is tunable and described as the "slice".
26 -------------
30 Traditional (UP-EDF) bandwidth control is something like:
46 the cost of missing deadlines when all the odds line up. However, it
66 https://lore.kernel.org/lkml/5371BD36-55AE-4F71-B9D7-B86DC32E3D2B@linux.alibaba.com/
69 ----------
75 :ref:`Documentation/admin-guide/cgroup-v2.rst <cgroup-v2-cpu>`.
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/openbmc/linux/drivers/misc/cxl/
H A Dmain.c1 // SPDX-License-Identifier: GPL-2.0-or-later
23 #include <misc/cxl-base.h>
45 dev_warn(&afu->dev, "WARNING: CXL AFU SLBIA timed out!\n"); in cxl_afu_slbia()
46 return -EBUSY; in cxl_afu_slbia()
51 if (!cxl_ops->link_ok(afu->adapter, afu)) in cxl_afu_slbia()
52 return -EIO; in cxl_afu_slbia()
62 if (ctx->mm != mm) in _cxl_slbia()
65 pr_devel("%s matched mm - card: %i afu: %i pe: %i\n", __func__, in _cxl_slbia()
66 ctx->afu->adapter->adapter_num, ctx->afu->slice, ctx->pe); in _cxl_slbia()
68 spin_lock_irqsave(&ctx->sste_lock, flags); in _cxl_slbia()
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/openbmc/linux/drivers/media/platform/samsung/s5p-mfc/
H A Dregs-mfc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
15 #define S5P_FIMV_REG_SIZE (S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR)
16 #define S5P_FIMV_REG_COUNT ((S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) / 4)
74 /* overlap transform line */
84 /* VC-1 decoding */
189 #define S5P_FIMV_CRC_LUMA0 0x2030 /* luma crc data per frame
191 #define S5P_FIMV_CRC_CHROMA0 0x2034 /* chroma crc data per frame
193 #define S5P_FIMV_CRC_LUMA1 0x2038 /* luma crc data per bottom
195 #define S5P_FIMV_CRC_CHROMA1 0x203c /* chroma crc data per bottom
265 #define S5P_FIMV_ENC_SI_SLICE_TYPE 0x2010 /* slice type(I/P/B/IDR) */
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/openbmc/openbmc-tools/dbus-vis/
H A Ddbus_timeline_vis.js2 // Data and Timestamps are separate b/c dbus-pcap does not include
12 // group-by condition changes
48 // It is independent of the "group_by" of the meta-data (sender/destination/
67 if (path.indexOf("/xyz/openbmc_project/sensors/") != -1 &&
101 let grouped = {}; // [content key][sort key] -> packet
164 // Todo: put g_StartingSec somewhere that's common between sensors and non-sensors
174 let sortedKeys = keys.slice();
180 // Per-content key
197 line = [];
209 line.push([t0, t1, entry, outcome, 0]);
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H A Dipmi_timeline_vis.js1 // This file is about the layout (Preproess() and Group()) of the IPMI time line view.
17 const {fs} = require('file-system');
34 // Set up Electron-related stuff here; Electron does not allow inlining button
49 ipmi_timeline_view.BeginZoomAnimation(-1);
50 boost_asio_handler_timeline_view.BeginZoomAnimation(-1);
55 ipmi_timeline_view.BeginPanScreenAnimaton(-0.5);
56 boost_asio_handler_timeline_view.BeginPanScreenAnimaton(-0.5);
130 desc = 'Live: read BMC\'s dbus-monitor console output directly';
135 … 'Staged, IPMI only: Store BMC\'s dbus-monitor output in a file and transfer back for display';
159 // (NetFn, Cmd) -> [ Bucket Indexes ]
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H A Dipmi_capture.js5 'dbus-monitor --system | grep "sendMessage\\|ReceivedMessage" -A7 \n';
7 'dbus-monitor --system | grep "member=execute\\|method return" -A7 \n';
37 const line = lines[i].trimEnd();
38 const sp = line.split(' ');
39 if (line.length < 1) continue;
43 let b0 = sp[j].slice(2);
44 let b1 = sp[j].slice(0, 2);
51 console.log('[' + line + ']')
58 ret = ret.slice(0, tot_size);
70 if (i0 != -1 && i1 != -1) {
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/openbmc/linux/block/partitions/
H A Dmsdos.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 1991-1998 Linus Torvalds
9 * in the early extended-partition checks and added DM partitions
16 * More flexible handling of extended partitions - aeb, 950831
20 * Re-organised Feb 1998 Russell King
43 return (sector_t)get_unaligned_le32(&p->nr_sects); in nr_sects()
48 return (sector_t)get_unaligned_le32(&p->start_sect); in start_sect()
53 return (p->sys_ind == DOS_EXTENDED_PARTITION || in is_extended_partition()
54 p->sys_ind == WIN98_EXTENDED_PARTITION || in is_extended_partition()
55 p->sys_ind == LINUX_EXTENDED_PARTITION); in is_extended_partition()
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/openbmc/linux/Documentation/accel/qaic/
H A Dqaic.rst1 .. SPDX-License-Identifier: GPL-2.0-only
18 non-empty and generate MSIs at a rate equivalent to the speed of the
21 MSIs per second. It has been observed that most systems cannot tolerate this
26 QAIC receives an IRQ, it disables that line. This prevents the interrupt
30 line remains disabled during this time. If no activity is detected, QAIC exits
31 polling mode and reenables the IRQ line.
34 generates 100k IRQs per second (per /proc/interrupts) is reduced to roughly 64
49 QAIC handles and enforces the required little endianness and 64-bit alignment,
91 This IOCTL allows userspace to slice a BO in preparation for sending the BO
98 call is non-blocking. Success only indicates that the BOs have been queued
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/openbmc/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,merge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 Mediatek display merge, namely MERGE, is used to merge two slice-per-line
15 inputs into one side-by-side output.
24 - enum:
25 - mediatek,mt8173-disp-merge
26 - mediatek,mt8195-disp-merge
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/openbmc/linux/tools/perf/Documentation/
H A Dperf-report.txt1 perf-report(1)
5 ----
6 perf-report - Read perf.data (created by perf record) and display the profile
9 --------
11 'perf report' [-i <file> | --input=file]
14 -----------
19 -------
20 -i::
21 --input=::
24 -v::
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H A Dperf-script.txt1 perf-script(1)
5 ----
6 perf-script - Read perf.data (created by perf record) and display trace output
9 --------
12 'perf script' [<options>] record <script> [<record-options>] <command>
13 'perf script' [<options>] report <script> [script-args]
14 'perf script' [<options>] <script> <required-script-args> [<record-options>] <command>
15 'perf script' [<options>] <top-script> [script-args]
18 -----------
26 You can also run a set of pre-canned scripts that aggregate and
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dsc/
H A Ddc_dsc.c52 /* Need to account for padding due to pixel-to-symbol packing
63 if (!timing->flags.DSC) { in apply_128b_132b_stream_overhead()
68 bpp = dc_fixpt_div_int(bpp, timing->pix_clk_100hz / 10); in apply_128b_132b_stream_overhead()
70 /* Symbols_per_HActive = HActive * bpp / (4 lanes * 32-bit symbol size) in apply_128b_132b_stream_overhead()
73 overhead_factor = dc_fixpt_from_int(timing->h_addressable); in apply_128b_132b_stream_overhead()
94 if (timing->flags.DSC) in dc_bandwidth_in_kbps_from_timing()
96 timing->dsc_cfg.bits_per_pixel, in dc_bandwidth_in_kbps_from_timing()
97 timing->dsc_cfg.num_slices_h, in dc_bandwidth_in_kbps_from_timing()
98 timing->dsc_cfg.is_dp); in dc_bandwidth_in_kbps_from_timing()
100 switch (timing->display_color_depth) { in dc_bandwidth_in_kbps_from_timing()
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/openbmc/linux/drivers/dma/dw/
H A Didma32.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2013,2018,2020-2021 Intel Corporation
38 struct device *slave = dwc->chan.slave; in idma32_get_slave_devfn()
43 return to_pci_dev(slave)->devfn; in idma32_get_slave_devfn()
48 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in idma32_initialize_chan_xbar()
58 value |= dwc->chan.chan_id; in idma32_initialize_chan_xbar()
63 value = readl(misc + DMA_CTL_CH(dwc->chan.chan_id)); in idma32_initialize_chan_xbar()
69 switch (dwc->direction) { in idma32_initialize_chan_xbar()
80 * Memory-to-Memory and Device-to-Device are ignored for now. in idma32_initialize_chan_xbar()
82 * For Memory-to-Memory transfers we would need to set mode in idma32_initialize_chan_xbar()
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/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_hdmi.c3 * Copyright © 2006-2009 Intel Corporation
64 return to_i915(hdmi_to_dig_port(intel_hdmi)->base.base.dev); in intel_hdmi_to_i915()
75 drm_WARN(&dev_priv->drm, in assert_hdmi_port_disabled()
76 intel_de_read(dev_priv, intel_hdmi->hdmi_reg) & enabled_bits, in assert_hdmi_port_disabled()
84 drm_WARN(&dev_priv->drm, in assert_hdmi_transcoder_func_disabled()
206 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in g4x_write_infoframe()
210 drm_WARN(&dev_priv->drm, !(val & VIDEO_DIP_ENABLE), in g4x_write_infoframe()
241 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in g4x_read_infoframe()
255 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in g4x_infoframes_enabled()
261 if ((val & VIDEO_DIP_PORT_MASK) != VIDEO_DIP_PORT(encoder->port)) in g4x_infoframes_enabled()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_stream_encoder.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
36 enc1->base.ctx->logger
39 (enc1->regs->reg)
43 enc1->se_shift->field_name, enc1->se_mask->field_name
47 enc1->base.ctx
55 uint32_t cont, send, line; in enc2_update_hdmi_info_packet() local
57 if (info_packet->valid) { in enc2_update_hdmi_info_packet()
63 /* enable transmission of packet(s) - in enc2_update_hdmi_info_packet()
68 /* select line number to send packets on */ in enc2_update_hdmi_info_packet()
69 line = 2; in enc2_update_hdmi_info_packet()
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/openbmc/linux/include/uapi/drm/
H A Di915_drm.h19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
37 * subject to backwards-compatibility constraints.
43 * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch
45 * BANK, SUBBANK, SLICE of the affected cacheline. Userspace should keep
46 * track of these events and if a specific cache-line seems to have a
48 * intel-gpu-tools. The value supplied with the event is always 1.
50 * I915_ERROR_UEVENT - Generated upon error detection, currently only via
57 * I915_RESET_UEVENT - Event is generated just before an attempt to reset the
66 * struct i915_user_extension - Base class for defining a chain of extensions
82 * .. code-block:: C
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/openbmc/linux/tools/include/uapi/drm/
H A Di915_drm.h19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
37 * subject to backwards-compatibility constraints.
43 * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch
45 * BANK, SUBBANK, SLICE of the affected cacheline. Userspace should keep
46 * track of these events and if a specific cache-line seems to have a
48 * intel-gpu-tools. The value supplied with the event is always 1.
50 * I915_ERROR_UEVENT - Generated upon error detection, currently only via
57 * I915_RESET_UEVENT - Event is generated just before an attempt to reset the
66 * struct i915_user_extension - Base class for defining a chain of extensions
82 * .. code-block:: C
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/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dintel_engine_cs.c1 // SPDX-License-Identifier: MIT
40 * on HSW) - so the final size, including the extra state required for the
260 * intel_engine_context_size() - return the size of the context for an engine
275 struct intel_uncore *uncore = gt->uncore; in intel_engine_context_size()
284 switch (GRAPHICS_VER(gt->i915)) { in intel_engine_context_size()
286 MISSING_CASE(GRAPHICS_VER(gt->i915)); in intel_engine_context_size()
296 if (IS_HASWELL(gt->i915)) in intel_engine_context_size()
319 drm_dbg(&gt->i915->drm, in intel_engine_context_size()
321 GRAPHICS_VER(gt->i915), cxt_size * 64, in intel_engine_context_size()
322 cxt_size - 1); in intel_engine_context_size()
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/openbmc/linux/drivers/net/ethernet/myricom/myri10ge/
H A Dmyri10ge.c2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005 - 2011 Myricom, Inc.
34 * http://www.myri.com/scs/download-Myri10GE.html
49 #include <linux/dma-mapping.h>
78 #define MYRI10GE_VERSION_STR "1.5.3-1.534"
135 int mask; /* number of rx slots -1 */
146 int mask; /* number of transmit slots -1 */
274 {[0 ... (MYRI10GE_MAX_BOARDS - 1)] = NULL };
277 MODULE_PARM_DESC(myri10ge_fw_names, "Firmware image names per board");
281 MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E");
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/openbmc/linux/block/
H A Dbfq-iosched.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 #include "blk-cgroup-rwstat.h"
29 * Soft real-time applications are extremely more latency sensitive
30 * than interactive ones. Over-raise the weight of the former to
38 * per-actuator data. The current value is hopefully a good upper
46 * struct bfq_service_tree - per ioprio_class service tree.
48 * Each service tree represents a B-WF2Q+ scheduler on its own. Each
71 * struct bfq_sched_data - multi-class scheduler.
81 * queue requests are served according to B-WF2Q+.
86 * before the current in-service entity is expired, 2) the in-service
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/openbmc/linux/rust/alloc/vec/
H A Dmod.rs1 // SPDX-License-Identifier: Apache-2.0 OR MIT
3 //! A contiguous growable array type with heap-allocated contents, written
68 use core::slice::{self, SliceIndex};
200 /// [Capacity and Reallocation](#capacity-and-reallocation).
240 /// A `Vec` can be mutable. On the other hand, slices are read-only objects.
241 /// To get a [slice][prim@slice], use [`&`]. Example:
244 /// fn read_slice(slice: &[usize]) {
281 /// about its design. This ensures that it's as low-overhead as possible in
290 /// The pointer will never be null, so this type is null-pointer-optimized.
295 /// on an empty Vec, it will not allocate memory. Similarly, if you store zero-sized
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dio_stream_encoder.c37 enc1->base.ctx->logger
40 (enc1->regs->reg)
44 enc1->se_shift->field_name, enc1->se_mask->field_name
50 enc1->base.ctx
58 uint32_t cont, send, line; in enc3_update_hdmi_info_packet() local
60 if (info_packet->valid) { in enc3_update_hdmi_info_packet()
61 enc1->base.vpg->funcs->update_generic_info_packet( in enc3_update_hdmi_info_packet()
62 enc1->base.vpg, in enc3_update_hdmi_info_packet()
67 /* enable transmission of packet(s) - in enc3_update_hdmi_info_packet()
72 /* select line number to send packets on */ in enc3_update_hdmi_info_packet()
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/openbmc/openbmc/poky/bitbake/lib/
H A Dcodegen.py1 # -*- coding: utf-8 -*-
6 Extension to ast that allow ast -> python code generation.
20 Sub: '-',
49 USub: '-'
68 Each level of indentation is replaced with `indent_with`. Per default this
72 If `add_line_information` is set to `True` comments for the line numbers
73 of the nodes are added to the output. This can be used to spot wrong line
105 self.write('# line: %s' % node.lineno)
113 self.indentation -= 1
130 padding = [None] * (len(node.args) - len(node.defaults))
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