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/openbmc/linux/drivers/media/dvb-frontends/drx39xyj/
H A Ddrx_dap_fasi.h2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
48 /*-------- compilation control switches --------------------------------------*/
53 /*-------- Required includes -------------------------------------------------*/
57 /*-------- Defines, configuring the API --------------------------------------*/
98 #error At least one of short- or long-addressing format must be allowed.
103 * Single/master multi master setting
106 * Comments about SINGLE MASTER/MULTI MASTER modes:
108 * Consider the two sides:1) the master and 2)the slave.
110 * Master:
111 * Single/multimaster operation set via DRXDAP_SINGLE_MASTER compile switch
[all …]
/openbmc/linux/Documentation/devicetree/bindings/iommu/
H A Diommu.txt2 master(s).
13 Example: 32-bit DMA to 64-bit physical addresses
15 * Implement scatter-gather at page level granularity so that the device does
29 IOMMUs can be single-master or multiple-master. Single-master IOMMU devices
30 typically have a fixed association to the master device, whereas multiple-
31 master IOMMU devices can translate accesses from more than one master.
34 "dma-ranges" property that describes how the physical address space of the
35 IOMMU maps to memory. An empty "dma-ranges" property means that there is a
39 --------------------
40 - #iommu-cells: The number of cells in an IOMMU specifier needed to encode an
[all …]
H A Dmsm,iommu-v0.txt5 of the CPU, each connected to the IOMMU through a port called micro-TLB.
9 - compatible: Must contain "qcom,apq8064-iommu".
10 - reg: Base address and size of the IOMMU registers.
11 - interrupts: Specifiers for the MMU fault interrupts. For instances that
12 support secure mode two interrupts must be specified, for non-secure and
14 single interrupt must be specified.
15 - #iommu-cells: The number of cells needed to specify the stream id. This
17 - qcom,ncb: The total number of context banks in the IOMMU.
18 - clocks : List of clocks to be used during SMMU register access. See
19 Documentation/devicetree/bindings/clock/clock-bindings.txt
[all …]
/openbmc/linux/Documentation/networking/dsa/
H A Dconfiguration.rst1 .. SPDX-License-Identifier: GPL-2.0
10 .. _dsa-config-showcases:
13 -----------------------
18 *single port*
34 The corresponding linux Ethernet interface is called the master interface.
37 The slave interfaces depend on the master interface being up in order for them
38 to send or receive traffic. Prior to kernel v5.12, the state of the master
42 - when a DSA slave interface is brought up, the master interface is
44 - when the master interface is brought down, all DSA slave interfaces are
50 the master interface
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H A Db53.rst1 .. SPDX-License-Identifier: GPL-2.0
20 The switch is, if possible, configured to enable a Broadcom specific 4-bytes
30 configuration described in the :ref:`dsa-config-showcases`.
33 ----------------------------------
38 See :ref:`dsa-tagged-configuration`.
41 -------------------------------------
48 The configuration slightly differ from the :ref:`dsa-vlan-configuration`.
54 In difference to the configuration described in :ref:`dsa-vlan-configuration`
56 single port and gateway configuration, while there is no need to add an extra
59 single port
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/openbmc/linux/Documentation/devicetree/bindings/fsi/
H A Dfsi.txt4 The FSI bus is probe-able, so the OS is able to enumerate FSI slaves, and
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
8 that is an I2C master - the I2C bus can be described by the device tree under
11 FSI masters may require their own DT nodes (to describe the master HW itself);
12 that requirement is defined by the master's implementation, and is described by
13 the fsi-master-* binding specifications.
18 fsi-master {
19 /* top-level of FSI bus topology, bound to an FSI master driver and
22 fsi-slave@<link,id> {
26 fsi-slave-engine@<addr> {
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/openbmc/openbmc-build-scripts/jenkins/
H A Drun-meta-ci1 #!/bin/bash -xe
5 # environment for a meta-* repository.
8 # WORKSPACE: Directory which contains the extracted meta-*
10 # GERRIT_PROJECT: openbmc/meta-* layer under test (i.e. openbmc/meta-phosphor)
11 # GERRIT_BRANCH: Branch under test (default is master)
16 GERRIT_BRANCH=${GERRIT_BRANCH:-"master"}
19 # TODO - Need test repo to branch
20 # git clone https://github.com/openbmc/openbmc-test-automation.git --branch ${GERRIT_BRANCH} --sing…
21 git clone https://github.com/openbmc/openbmc-test-automation.git --branch master --single-branch
26 # Move the extracted meta layer to a dir based on it's meta-* name
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/openbmc/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa300-raumfeld-speaker-one.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
9 compatible = "raumfeld,raumfeld-speaker-one-pxa303", "marvell,pxa300";
13 #sound-dai-cells = <0>;
14 Vdd-supply = <&reg_3v3>;
15 Vdda-supply = <&reg_va_5v0>;
18 xo_11mhz: oscillator-11mhz {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
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H A Dpxa300-raumfeld-tuneable-clock.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/maxim,max9485.h>
6 xo_27mhz: oscillator-27mhz {
7 compatible = "fixed-clock";
8 #clock-cells = <0>;
9 clock-frequency = <27000000>;
10 clock-accuracy = <100>;
14 compatible = "simple-audio-card";
15 simple-audio-card,name = "Raumfeld Speaker";
16 #address-cells = <1>;
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/openbmc/u-boot/drivers/sysreset/
H A Dsysreset_mpc83xx.h1 /* SPDX-License-Identifier: GPL-2.0+ */
26 * String array for all possible master IDs, which reflects the source of the
30 static const char * const master[] = { variable
62 "TDM-DMAC"
70 "Address-only, Clean Block",
71 "Address-only, lwarx reservation set",
72 "Single-beat or Burst write",
74 "Address-only, Flush Block",
78 "Address-only, sync",
79 "Address-only, tlbsync",
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/openbmc/linux/Documentation/driver-api/soundwire/
H A Dstream.rst24 -------------------------
26 -------------------------
28 Example 1: Stereo Stream with L and R channels is rendered from Master to
29 Slave. Both Master and Slave is using single port. ::
31 +---------------+ Clock Signal +---------------+
32 | Master +----------------------------------+ Slave |
36 | L + R +----------------------------------+ L + R |
38 +---------------+ +-----------------------> +---------------+
42 Master. Both Master and Slave is using single port. ::
45 +---------------+ Clock Signal +---------------+
[all …]
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c.txt8 -----------------------------
10 - #address-cells - should be <1>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of I2C bus controller
18 are described by a single value.
21 -----------------------------
26 - clock-frequency
29 - i2c-bus
31 devices and non-I2C devices, the 'i2c-bus' subnode can be used for
32 populating I2C devices. If the 'i2c-bus' subnode is present, only
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/openbmc/linux/drivers/i2c/muxes/
H A Di2c-mux-pca9541.c2 * I2C multiplexer driver for PCA9541 bus master selector
6 * Author: Guenter Roeck <linux@roeck-us.net>
11 * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
12 * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
23 #include <linux/i2c-mux.h>
29 * The PCA9541 is a bus master selector. It supports two I2C masters connected
30 * to a single slave bus.
32 * Before each bus transaction, a master has to acquire bus ownership. After the
36 * single-channel I2C bus multiplexer.
39 * hosts. If a single host controls both masters, platform code has to ensure
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/openbmc/dbus-sensors/
H A DREADME.md1 # dbus-sensors
3 dbus-sensors is a collection of sensor applications that provide the
5 from hwmon, d-bus, or direct driver access to provide readings. Some advance
6 non-sensor features such as fan presence, pwm control, and automatic cpu
11 - runtime re-configurable from d-bus (entity-manager or the like)
13 - isolated: each sensor type is isolated into its own daemon, so a bug in one
14 sensor is unlikely to affect another, and single sensor modifications are
17 - async single-threaded: uses sdbusplus/asio bindings
19 - multiple data inputs: hwmon, d-bus, direct driver access
23 A typical dbus-sensors object support the following dbus interfaces:
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/openbmc/linux/drivers/power/supply/
H A Dbq27xxx_battery_hdq.c1 // SPDX-License-Identifier: GPL-2.0
3 * BQ27xxx battery monitor HDQ/1-wire driver
5 * Copyright (C) 2007-2017 Texas Instruments Incorporated - https://www.ti.com/
26 MODULE_PARM_DESC(F_ID, "1-wire slave FID for BQ27xxx device");
32 mutex_lock(&sl->master->bus_mutex); in w1_bq27000_read()
33 w1_write_8(sl->master, HDQ_CMD_READ | reg); in w1_bq27000_read()
34 val = w1_read_8(sl->master); in w1_bq27000_read()
35 mutex_unlock(&sl->master->bus_mutex); in w1_bq27000_read()
41 bool single) in bq27xxx_battery_hdq_read() argument
43 struct w1_slave *sl = dev_to_w1_slave(di->dev); in bq27xxx_battery_hdq_read()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,rpm-master-stats.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpm-master-stats.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. (QTI) RPM Master Stats
10 - Konrad Dybcio <konrad.dybcio@linaro.org>
15 spanning a single subsystem (e.g. APSS, ADSP, CDSP). All of the RPM decisions
16 (particularly around entering hardware-driven low power modes: XO shutdown
17 and total system-wide power collapse) are first made at Master-level, and
20 The Master Stats provide a few useful bits that can be used to assess whether
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H A Dqcom,smp2p.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
16 of a single 32-bit value between two processors. Each value has a single
17 writer (the local side) and a single reader (the remote side). Values are
35 $ref: /schemas/types.yaml#/definitions/phandle-array
37 - items:
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/openbmc/linux/Documentation/scsi/
H A Dadvansys.rst1 .. SPDX-License-Identifier: GPL-2.0
8 RISC-based, Bus-Mastering, Fast (10 Mhz) and Ultra (20 Mhz) Narrow
9 (8-bit transfer) SCSI Host Adapters for the ISA, EISA, VL, and PCI
10 buses and RISC-based, Bus-Mastering, Ultra (20 Mhz) Wide (16-bit
15 cache and board LRAM. A CDB is a single SCSI command. The driver
21 - ABP-480 - Bus-Master CardBus (16 CDB)
24 - ABP510/5150 - Bus-Master ISA (240 CDB)
25 - ABP5140 - Bus-Master ISA PnP (16 CDB)
26 - ABP5142 - Bus-Master ISA PnP with floppy (16 CDB)
27 - ABP902/3902 - Bus-Master PCI (16 CDB)
[all …]
/openbmc/linux/drivers/w1/slaves/
H A Dw1_ds28e17.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * w1_ds28e17.c - w1 family 19 (DS28E17) driver
28 MODULE_DESCRIPTION("w1 family 19 driver for DS28E17, 1-wire to I2C master bridge");
29 MODULE_ALIAS("w1-family-" __stringify(W1_FAMILY_DS28E17));
88 struct w1_f19_data *data = sl->family_data; in w1_f19_i2c_busy_wait()
92 if (w1_touch_bit(sl->master, 1) == 0) in w1_f19_i2c_busy_wait()
100 usleep_range(timebases[data->speed] * (data->stretch) * count, in w1_f19_i2c_busy_wait()
101 timebases[data->speed] * (data->stretch) * count in w1_f19_i2c_busy_wait()
106 while ((checks--) > 0) { in w1_f19_i2c_busy_wait()
108 if (w1_touch_bit(sl->master, 1) == 0) in w1_f19_i2c_busy_wait()
[all …]
/openbmc/linux/Documentation/filesystems/
H A Dubifs-authentication.rst1 .. SPDX-License-Identifier: GPL-2.0
16 read contents of the filesystem on a single point in time. A classic example
24 binary to perform a malicious action when executed [DMC-CBC-ATTACK]. Since
28 Other full disk encryption systems like dm-crypt cover all filesystem metadata,
31 time. For dm-crypt and other filesystems that build upon the Linux block IO
32 layer, the dm-integrity or dm-verity subsystems [DM-INTEGRITY, DM-VERITY]
34 These can also be combined with dm-crypt [CRYPTSETUP2].
44 ----------------
50 addition, it deals with flash-specific wear-leveling and transparent I/O error
60 +------------+ +*******+ +-----------+ +-----+
[all …]
/openbmc/linux/drivers/mtd/parsers/
H A Dredboot.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Parse RedBoot-style Flash Image System (FIS) tables and
7 * Copyright © 2001-2010 David Woodhouse <dwmw2@infradead.org>
26 unsigned char _pad[256 - (16 + 7 * sizeof(u32))];
45 static void parse_redboot_of(struct mtd_info *master) in parse_redboot_of() argument
52 np = mtd_get_of_node(master); in parse_redboot_of()
60 ret = of_property_read_u32(npart, "fis-index-block", &dirblock); in parse_redboot_of()
72 static int parse_redboot_partitions(struct mtd_info *master, in parse_redboot_partitions() argument
92 parse_redboot_of(master); in parse_redboot_partitions()
95 offset = master->size + directory * master->erasesize; in parse_redboot_partitions()
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/perfetto/
H A Dperfetto.bb1 LICENSE = "Apache-2.0 & BSD-3-Clause & MIT & Zlib"
12 # Dependencies from perfetto/tools/install-build-deps
15 …git://chromium.googlesource.com/external/github.com/llvm/llvm-project/libcxx.git;protocol=https;de…
16 …git://chromium.googlesource.com/external/github.com/llvm/llvm-project/libcxxabi.git;protocol=https…
17 …git://chromium.googlesource.com/external/github.com/llvm/llvm-project/libunwind.git;protocol=https…
18 …lesource.com/platform/system/libbase.git;branch=master;protocol=https;destsuffix=git/buildtools/an…
19 …source.com/platform/system/unwinding.git;branch=master;protocol=https;destsuffix=git/buildtools/an…
20 …lesource.com/platform/system/logging.git;branch=master;protocol=https;destsuffix=git/buildtools/an…
21 …urce.com/platform/system/libprocinfo.git;branch=master;protocol=https;destsuffix=git/buildtools/an…
22 …ooglesource.com/platform/system/core.git;branch=master;protocol=https;destsuffix=git/buildtools/an…
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/openbmc/linux/arch/parisc/include/asm/
H A Ddma.h1 /* SPDX-License-Identifier: GPL-2.0 */
20 ** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
34 ** We don't have DMA channels... well V-class does but the
36 ** Note: this is not relevant right now for PA-RISC, but we cannot
38 ** won't compile :-(
41 #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
42 #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
43 #define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
49 #define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */
55 #define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dcpu_init.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
12 #include <usb/ehci-ci.h>
60 #ifdef CONFIG_SYS_ACR_PARKM /* Arbiter parking master */ in cpu_init_f()
74 #ifdef CONFIG_SYS_ACR_PARKM /* Arbiter parking master */ in cpu_init_f()
211 clrsetbits_be32(&im->arbiter.acr, acr_mask, acr_val); in cpu_init_f()
213 clrsetbits_be32(&im->sysconf.spcr, spcr_mask, spcr_val); in cpu_init_f()
215 clrsetbits_be32(&im->clk.sccr, sccr_mask, sccr_val); in cpu_init_f()
217 /* RSR - Reset Status Register - clear all status (4.6.1.3) */ in cpu_init_f()
218 gd->arch.reset_status = __raw_readl(&im->reset.rsr); in cpu_init_f()
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/openbmc/linux/drivers/net/wireless/ti/wl12xx/
H A Dconf.h1 /* SPDX-License-Identifier: GPL-2.0-only */
39 * in WLAN / BT master basic rate
41 * Range: 0 - 255 (ms)
50 * Range: 0 - 255 (ms)
57 * in WLAN / BT master EDR
59 * Range: 0 - 255 (ms)
68 * Range: 0 - 255 (ms)
75 * in WLAN PSM / BT master/slave BR
77 * Range: 0 - 255 (ms)
84 * in WLAN PSM / BT master/slave EDR
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