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/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dpinmux.c322 PIN(SDC, PWM, TWC, SDIO3, SPI3),
323 PIN(SDD, UARTA, PWM, SDIO3, SPI3),
325 PINP(SLXA, PCIE, SPI4, SDIO3, SPI2, CRTP),
326 PIN(SLXC, SPDIF, SPI4, SDIO3, SPI2),
327 PIN(SLXD, SPDIF, SPI4, SDIO3, SPI2),
328 PIN(SLXK, PCIE, SPI4, SDIO3, SPI2),
411 PINP(SDB, UARTA, PWM, SDIO3, SPI2, NONE),
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-pxa.yaml50 - const: conf-sdio3
110 reg-names = "sdhci", "mbus", "conf-sdio3";
/openbmc/linux/drivers/mmc/host/
H A Dsdhci-pxav3.c65 * Fields below belong to SDIO3 Configuration Register (third register
131 "conf-sdio3"); in armada_38x_quirks()
139 * modes require specific clock adjustments in SDIO3 in armada_38x_quirks()
145 …dev_warn(&pdev->dev, "conf-sdio3 register not found: disabling SDR50 and DDR50 modes.\nConsider up… in armada_38x_quirks()
272 * Update SDIO3 Configuration register according to erratum in pxav3_set_uhs_signaling()
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dbrcm,kona-ccu.txt83 master sdio3 peri 2 BCM281XX_MASTER_CCU_SDIO3
124 master sdio3 peri 2 BCM21664_MASTER_CCU_SDIO3
/openbmc/linux/arch/arm64/boot/dts/sprd/
H A Dums512-1h10.dts54 &sdio3 {
H A Dwhale2.dtsi136 sdio3: sdio@50430000 { label
H A Dsc9863a.dtsi570 sdio3: sdio@20600000 { label
/openbmc/u-boot/include/configs/
H A Dbcm23550_w1d.h40 #define CONFIG_SYS_SDIO2 "sdio3"
H A Dbcm28155_ap.h39 #define CONFIG_SYS_SDIO2 "sdio3"
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm21664.dtsi130 sdio3: mmc@3f1a0000 { label
306 "sdio3",
H A Dbcm11351.dtsi142 sdio3: mmc@3f1a0000 { label
245 "sdio3",
H A Dbcm23550.dtsi241 sdio3: mmc@ea0000 { label
405 "sdio3",
/openbmc/u-boot/board/nvidia/dalmore/
H A Ddalmore.c97 /* Bring up the SDIO3 power rail */ in pin_mux_mmc()
H A Dpinmux-config-dalmore.h356 DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra20.c1940 FUNCTION(sdio3),
2128 MUX_PG(sdb, UARTA, PWM, SDIO3, SPI2, 0x20, 15, 0x8c, 10, -1, -1),
2129 MUX_PG(sdc, PWM, TWC, SDIO3, SPI3, 0x18, 1, 0x8c, 12, 0xac, 28),
2130 MUX_PG(sdd, UARTA, PWM, SDIO3, SPI3, 0x18, 2, 0x8c, 14, 0xac, 30),
2132 MUX_PG(slxa, PCIE, SPI4, SDIO3, SPI2, 0x18, 3, 0x84, 6, 0xa4, 22),
2133 MUX_PG(slxc, SPDIF, SPI4, SDIO3, SPI2, 0x18, 5, 0x84, 10, 0xa4, 26),
2134 MUX_PG(slxd, SPDIF, SPI4, SDIO3, SPI2, 0x18, 6, 0x84, 12, 0xa4, 28),
2135 MUX_PG(slxk, PCIE, SPI4, SDIO3, SPI2, 0x18, 7, 0x84, 14, 0xa4, 30),
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra20-pinmux.yaml66 sdio3, sdio4, sflash, spdif, spi1, spi2, spi2_alt, spi3,
/openbmc/linux/drivers/clk/bcm/
H A Dclk-bcm21664.c137 KONA_CLK(master, sdio3, peri),
H A Dclk-bcm281xx.c183 KONA_CLK(master, sdio3, peri),
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-trimslice.dts171 nvidia,function = "sdio3";
/openbmc/u-boot/arch/arm/cpu/armv7/bcm281xx/
H A Dclk-bcm281xx.c548 CLK_LK(sdio3),
/openbmc/u-boot/arch/arm/cpu/armv7/bcm235xx/
H A Dclk-bcm235xx.c544 CLK_LK(sdio3),
/openbmc/linux/drivers/bcma/
H A Dscan.c37 { BCMA_CORE_NS_SDIO3, "SDIO3" },
/openbmc/qemu/hw/arm/
H A Dfsl-imx6.c327 /* UHS-I SDIO3.0 SDR104 1.8V ADMA */ in fsl_imx6_realize()
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-39x.dtsi379 reg-names = "sdhci", "mbus", "conf-sdio3";
/openbmc/u-boot/arch/arm/dts/
H A Dtegra20-ventana.dts196 nvidia,function = "sdio3";

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