Searched full:sclk_pcm (Results 1 – 6 of 6) sorted by relevance
| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos-audss.c | 224 "sclk_pcm", CLK_SET_RATE_PARENT, in exynos_audss_clk_probe()
230 clk_table[EXYNOS_SCLK_PCM] = clk_hw_register_gate(dev, "sclk_pcm", in exynos_audss_clk_probe()
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| H A D | clk-exynos7.c | 1271 GATE(SCLK_PCM, "sclk_pcm", "dout_sclk_pcm",
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| H A D | clk-exynos3250.c | 561 GATE(CLK_SCLK_PCM, "sclk_pcm", "div_pcm",
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | samsung,exynos-audss-clock.yaml | 40 PCM clock, parent of sclk_pcm. "sclk_pcm0" is used if not specified.
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | exynos7-clk.h | 199 #define SCLK_PCM 2 macro
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | exynos7420-clk.h | 202 #define SCLK_PCM 2 macro
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