/openbmc/u-boot/drivers/i2c/ |
H A D | i2c-gpio.c | 33 /* sda, scl */ 50 static void i2c_gpio_scl_set(struct gpio_desc *scl, int bit) in i2c_gpio_scl_set() argument 56 dm_gpio_set_dir_flags(scl, flags); in i2c_gpio_scl_set() 59 static void i2c_gpio_write_bit(struct gpio_desc *scl, struct gpio_desc *sda, in i2c_gpio_write_bit() argument 62 i2c_gpio_scl_set(scl, 0); in i2c_gpio_write_bit() 66 i2c_gpio_scl_set(scl, 1); in i2c_gpio_write_bit() 70 static int i2c_gpio_read_bit(struct gpio_desc *scl, struct gpio_desc *sda, in i2c_gpio_read_bit() argument 75 i2c_gpio_scl_set(scl, 1); in i2c_gpio_read_bit() 79 i2c_gpio_scl_set(scl, 0); in i2c_gpio_read_bit() 85 /* START: High -> Low on SDA while SCL is High */ [all …]
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H A D | rcar_i2c.c | 24 #define RCAR_I2C_ICMCR_FSCL BIT(6) /* override SCL pin */ 50 * Defines 1st bit delay between SDA and SCL. 92 /* Send 9 SCL pulses */ in rcar_i2c_recover() 244 u32 scgd, cdf, round, ick, sum, scl; in rcar_i2c_set_speed() local 248 * calculate SCL clock in rcar_i2c_set_speed() 253 * SCL = ick / (20 + SCGD * 8 + F[(ticf + tr + intd) * ick]) in rcar_i2c_set_speed() 256 * ticf : I2C SCL falling time in rcar_i2c_set_speed() 257 * tr : I2C SCL rising time in rcar_i2c_set_speed() 283 * SCL = ick / (20 + SCGD * 8 + F[(ticf + tr + intd) * ick]) in rcar_i2c_set_speed() 285 * Calculation result (= SCL) should be less than in rcar_i2c_set_speed() [all …]
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/openbmc/linux/net/netfilter/ipvs/ |
H A D | ip_vs_proto_sctp.c | 285 #define sCL IP_VS_SCTP_S_CLOSED macro 290 /* sNO, sI1, sIN, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL*/ 291 /* d */{sES, sI1, sIN, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL}, 293 /* i_a */{sCW, sCW, sCW, sCS, sCR, sCO, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL}, 294 /* c_e */{sCR, sIN, sIN, sCR, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL}, 295 /* c_a */{sES, sI1, sIN, sCS, sCR, sCW, sCO, sES, sES, sSS, sSR, sSA, sRJ, sCL}, 296 /* s */{sSR, sI1, sIN, sCS, sCR, sCW, sCO, sCE, sSR, sSS, sSR, sSA, sRJ, sCL}, 297 /* s_a */{sCL, sIN, sIN, sCS, sCR, sCW, sCO, sCE, sES, sCL, sSR, sCL, sRJ, sCL}, 298 /* s_c */{sCL, sCL, sCL, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sCL, sRJ, sCL}, 299 /* err */{sCL, sI1, sIN, sCS, sCR, sCW, sCO, sCL, sES, sSS, sSR, sSA, sRJ, sCL}, [all …]
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H A D | ip_vs_proto_tcp.c | 415 #define sCL IP_VS_TCP_S_CLOSE macro 441 /* sNO, sES, sSS, sSR, sFW, sTW, sCL, sCW, sLA, sLI, sSA */ 443 /*fin*/ {{sCL, sCW, sSS, sTW, sTW, sTW, sCL, sCW, sLA, sLI, sTW }}, 444 /*ack*/ {{sES, sES, sSS, sES, sFW, sTW, sCL, sCW, sCL, sLI, sES }}, 445 /*rst*/ {{sCL, sCL, sCL, sSR, sCL, sCL, sCL, sCL, sLA, sLI, sSR }}, 448 /* sNO, sES, sSS, sSR, sFW, sTW, sCL, sCW, sLA, sLI, sSA */ 450 /*fin*/ {{sTW, sFW, sSS, sTW, sFW, sTW, sCL, sTW, sLA, sLI, sTW }}, 451 /*ack*/ {{sES, sES, sSS, sES, sFW, sTW, sCL, sCW, sLA, sES, sES }}, 452 /*rst*/ {{sCL, sCL, sSS, sCL, sCL, sTW, sCL, sCL, sCL, sCL, sCL }}, 455 /* sNO, sES, sSS, sSR, sFW, sTW, sCL, sCW, sLA, sLI, sSA */ [all …]
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/openbmc/u-boot/arch/arm/mach-imx/ |
H A D | i2c-mxv7.c | 17 int sda, scl; in force_idle_bus() local 23 gpio_direction_input(p->scl.gp); in force_idle_bus() 26 imx_iomux_v3_setup_pad(p->scl.gpio_mode); in force_idle_bus() 29 scl = gpio_get_value(p->scl.gp); in force_idle_bus() 30 if ((sda & scl) == 1) in force_idle_bus() 33 printf("%s: sda=%d scl=%d sda.gp=0x%x scl.gp=0x%x\n", __func__, in force_idle_bus() 34 sda, scl, p->sda.gp, p->scl.gp); in force_idle_bus() 35 /* Send high and low on the SCL line */ in force_idle_bus() 37 gpio_direction_output(p->scl.gp, 0); in force_idle_bus() 39 gpio_direction_input(p->scl.gp); in force_idle_bus() [all …]
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/openbmc/linux/net/netfilter/ |
H A D | nf_conntrack_proto_sctp.c | 61 #define sCL SCTP_CONNTRACK_CLOSED macro 107 /* sNO, sCL, sCW, sCE, sES, sSS, sSR, sSA, sHS */ 108 /* init */ {sCL, sCL, sCW, sCE, sES, sCL, sCL, sSA, sCW}, 109 /* init_ack */ {sCL, sCL, sCW, sCE, sES, sSS, sSR, sSA, sCL}, 110 /* abort */ {sCL, sCL, sCL, sCL, sCL, sCL, sCL, sCL, sCL}, 111 /* shutdown */ {sCL, sCL, sCW, sCE, sSS, sSS, sSR, sSA, sCL}, 112 /* shutdown_ack */ {sSA, sCL, sCW, sCE, sES, sSA, sSA, sSA, sSA}, 113 /* error */ {sCL, sCL, sCW, sCE, sES, sSS, sSR, sSA, sCL},/* Can't have Stale cookie*/ 114 /* cookie_echo */ {sCL, sCL, sCE, sCE, sES, sSS, sSR, sSA, sCL},/* 5.2.4 - Big TODO */ 115 /* cookie_ack */ {sCL, sCL, sCW, sES, sES, sSS, sSR, sSA, sCL},/* Can't come in orig dir */ [all …]
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H A D | nf_conntrack_proto_tcp.c | 86 #define sCL TCP_CONNTRACK_CLOSE macro 137 /* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */ 152 * sCL -> sSS 154 /* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */ 166 * sCL -> sIV 168 /* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */ 169 /*fin*/ { sIV, sIV, sFW, sFW, sLA, sLA, sLA, sTW, sCL, sIV }, 183 * sCL -> sCL 185 /* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */ 186 /*ack*/ { sES, sIV, sES, sES, sCW, sCW, sTW, sTW, sCL, sIV }, [all …]
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/openbmc/linux/Documentation/devicetree/bindings/i2c/ |
H A D | i2c-gpio.yaml | 28 scl-gpios: 30 gpio used for the scl signal, this should be flagged as 40 i2c-gpio,scl-output-only: 41 description: scl as output only 54 description: sda and scl gpio, alternative for {sda,scl}-gpios 63 i2c-gpio,scl-open-drain: 67 GPIO line used for SCL into open drain mode, and that something is not 76 i2c-gpio,scl-has-no-pullup: 78 description: scl is used in a non-compliant way and has no pull-up. 80 with i2c-gpio,scl-open-drain. [all …]
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H A D | i2c-rk3x.yaml | 80 SCL frequency to use (in Hz). If omitted, 100kHz is used. 82 i2c-scl-rising-time-ns: 85 Number of nanoseconds the SCL signal takes to rise 90 i2c-scl-falling-time-ns: 93 Number of nanoseconds the SCL signal takes to fall 102 (t(f) in the I2C specification). If not specified we will use the SCL 138 i2c-scl-falling-time-ns = <100>; 139 i2c-scl-rising-time-ns = <800>;
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H A D | i2c.txt | 37 - i2c-scl-falling-time-ns 38 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C 41 - i2c-scl-internal-delay-ns 42 Number of nanoseconds the IP core additionally needs to setup SCL. 44 - i2c-scl-rising-time-ns 45 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C 76 add extra pinctrl to configure SCL/SDA pins to GPIO function for bus 79 - scl-gpios 80 specify the gpio related to SCL pin. Used for GPIO bus recovery.
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H A D | renesas,rcar-i2c.yaml | 93 i2c-scl-falling-time-ns: 96 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C 99 i2c-scl-internal-delay-ns: 102 Number of nanoseconds the IP core additionally needs to setup SCL. 104 i2c-scl-rising-time-ns: 107 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C 164 i2c-scl-internal-delay-ns = <6>;
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_transform.h | 76 SRI(SCL_MODE, SCL, id), \ 77 SRI(SCL_TAP_CONTROL, SCL, id), \ 78 SRI(SCL_CONTROL, SCL, id), \ 79 SRI(SCL_BYPASS_CONTROL, SCL, id), \ 80 SRI(EXT_OVERSCAN_LEFT_RIGHT, SCL, id), \ 81 SRI(EXT_OVERSCAN_TOP_BOTTOM, SCL, id), \ 82 SRI(SCL_VERT_FILTER_CONTROL, SCL, id), \ 83 SRI(SCL_HORZ_FILTER_CONTROL, SCL, id), \ 84 SRI(SCL_COEF_RAM_SELECT, SCL, id), \ 85 SRI(SCL_COEF_RAM_TAP_DATA, SCL, id), \ [all …]
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H A D | dce_i2c_sw.c | 29 #define SCL false macro 85 if (read_bit_from_ddc(ddc, SCL)) in wait_for_scl_high_sw() 113 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte_sw() 118 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte_sw() 124 * after the SCL pulse we use to send our last data bit. in write_byte_sw() 134 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte_sw() 145 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte_sw() 164 * bit is read while SCL is high in read_byte_sw() 168 write_bit_to_ddc(ddc_handle, SCL, true); in read_byte_sw() 176 write_bit_to_ddc(ddc_handle, SCL, false); in read_byte_sw() [all …]
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/openbmc/linux/drivers/staging/sm750fb/ |
H A D | ddk750_swi2c.c | 19 * a point in time where the SCL or SDA may be changed. 23 * | SCL set LOW |SCL no change| SCL set HIGH|SCL no change| 26 * SCL == XXXX _____________ ____________ / 28 * I.e. the SCL may only be changed in section 1. and section 3. while 39 * SCL | L | | H | | 42 * SCL | L | | H | | 45 * SCL | L | | H | | 48 * SCL | L | | H | | 104 * This function set/reset the SCL GPIO pin 107 * value - Bit value to set to the SCL or SDA (0 = low, 1 = high) [all …]
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/openbmc/linux/drivers/i2c/busses/ |
H A D | i2c-acorn.c | 19 #define SCL 0x02 macro 24 * Note also that we need to preserve the value of SCL and 32 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setscl() 36 ones |= SCL; in ioc_setscl() 38 ones &= ~SCL; in ioc_setscl() 47 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setsda() 62 return (ioc_readb(IOC_CONTROL) & SCL) != 0; in ioc_getscl() 87 force_ones = FORCE_ONES | SCL | SDA; in i2c_ioc_init()
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H A D | i2c-gpio.c | 23 struct gpio_desc *scl; member 48 * Toggle SCL by changing the output value of the pin. This is used 57 gpiod_set_value_cansleep(priv->scl, state); in i2c_gpio_setscl_val() 71 return gpiod_get_value_cansleep(priv->scl); in i2c_gpio_getscl() 103 WIRE_ATTRIBUTE(scl); 170 int ret, irq = gpiod_to_irq(priv->scl); in i2c_gpio_fi_act_on_scl_irq() 177 ret = gpiod_direction_input(priv->scl); in i2c_gpio_fi_act_on_scl_irq() 192 ret = gpiod_direction_output(priv->scl, 1) ?: ret; in i2c_gpio_fi_act_on_scl_irq() 221 * Interrupt on falling SCL. This ensures that the master under test has in fops_lose_arbitration_set() 250 * Interrupt on falling SCL. This ensures that the master under test has in fops_inject_panic_set() [all …]
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/openbmc/linux/include/linux/platform_data/ |
H A D | i2c-gpio.h | 12 * @udelay: signal toggle delay. SCL frequency is (500 / udelay) kHz 14 * SCL low for longer than this, the transfer will time out. 20 * This is for clients that can only read SDA/SCL. 23 * @scl_is_open_drain: SCL is set up as open drain. Same requirements 25 * @scl_is_output_only: SCL output drivers cannot be turned off. 26 * @scl_has_no_pullup: SCL is used in a non-compliant way and has no pull-up.
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/openbmc/linux/Documentation/i2c/ |
H A D | gpio-fault-injection.rst | 20 "scl" 23 By reading this file, you get the current state of SCL. By writing, you can 25 "echo 0 > scl" you force SCL low and thus, no communication will be possible 27 the condition of SCL being unresponsive and report an error to the upper 62 being pulled low by the device while SCL is high. So, similar to the "sda" file 65 SDA after toggling SCL. 81 register 0x00 (if it has registers) when further clock pulses happen on SCL. 99 Arbitration lost is achieved by waiting for SCL going down by the master under 104 should be detected beforehand. Also note, that SCL going down is monitored 129 Start of a transfer is detected by waiting for SCL going down by the master
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/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | stih407-pinctrl.dtsi | 164 scl = <&pio4 5 ALT1 BIDIR>; 173 scl = <&pio5 0 ALT1 BIDIR>; 322 scl = <&pio4 5 ALT1 OUT>; 329 scl = <&pio4 5 ALT1 OUT>; 339 scl = <&pio3 2 ALT2 OUT>; 346 scl = <&pio3 2 ALT2 OUT>; 356 scl = <&pio3 7 ALT2 OUT>; 363 scl = <&pio3 7 ALT2 OUT>; 519 scl = <&pio10 5 ALT2 BIDIR>; 528 scl = <&pio11 0 ALT2 BIDIR>; [all …]
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/openbmc/linux/drivers/i2c/algos/ |
H A D | i2c-algo-bit.c | 72 * Raise scl line, and do checking for delays. This is necessary for slower 81 /* Not all adapters have scl sense line... */ in sclhi() 104 pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go high\n", in sclhi() 117 /* assert: scl, sda are high */ in i2c_start() 125 /* assert: scl is low */ in i2c_repstart() 136 /* assert: scl is low */ in i2c_stop() 150 * -ETIMEDOUT if an error occurred (while raising the scl line) 159 /* assert: scl is low */ in i2c_outb() 195 /* assert: scl is low (sda undef) */ in i2c_outb() 207 /* assert: scl is low */ in i2c_inb() [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | stih407-pinctrl.dtsi | 167 scl = <&pio4 5 ALT1 BIDIR>; 176 scl = <&pio5 0 ALT1 BIDIR>; 325 scl = <&pio4 5 ALT1 OUT>; 332 scl = <&pio4 5 ALT1 OUT>; 342 scl = <&pio3 2 ALT2 OUT>; 349 scl = <&pio3 2 ALT2 OUT>; 359 scl = <&pio3 7 ALT2 OUT>; 366 scl = <&pio3 7 ALT2 OUT>; 525 scl = <&pio10 5 ALT2 BIDIR>; 534 scl = <&pio11 0 ALT2 BIDIR>; [all …]
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/openbmc/linux/drivers/gpu/drm/loongson/ |
H A D | lsdc_i2c.c | 83 /* set state on the li2c->scl pin */ in lsdc_gpio_i2c_set_scl() 84 return __lsdc_gpio_i2c_set(li2c, li2c->scl, state); in lsdc_gpio_i2c_set_scl() 97 /* read the value from the li2c->scl pin */ in lsdc_gpio_i2c_get_scl() 98 return __lsdc_gpio_i2c_get(li2c, li2c->scl); in lsdc_gpio_i2c_get_scl() 134 li2c->scl = 0x02; /* pin 1 */ in lsdc_create_i2c_chan() 137 li2c->scl = 0x08; /* pin 3 */ in lsdc_create_i2c_chan() 175 drm_info(ddev, "%s(sda pin mask=%u, scl pin mask=%u) created\n", in lsdc_create_i2c_chan() 176 adapter->name, li2c->sda, li2c->scl); in lsdc_create_i2c_chan()
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/openbmc/linux/drivers/gpu/drm/imx/dcss/ |
H A D | dcss-scaler.c | 71 struct dcss_scaler *scl; member 289 struct dcss_scaler *scl = ch->scl; in dcss_scaler_write() local 291 dcss_ctxld_write(scl->ctxld, scl->ctx_id, val, ch->base_ofs + ofs); in dcss_scaler_write() 294 static int dcss_scaler_ch_init_all(struct dcss_scaler *scl, in dcss_scaler_ch_init_all() argument 301 ch = &scl->ch[i]; in dcss_scaler_ch_init_all() 307 dev_err(scl->dev, "scaler: unable to remap ch base\n"); in dcss_scaler_ch_init_all() 311 ch->scl = scl; in dcss_scaler_ch_init_all() 346 void dcss_scaler_exit(struct dcss_scaler *scl) in dcss_scaler_exit() argument 351 struct dcss_scaler_ch *ch = &scl->ch[ch_no]; in dcss_scaler_exit() 359 kfree(scl); in dcss_scaler_exit() [all …]
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/openbmc/linux/drivers/rtc/ |
H A D | rtc-rs5c313.c | 73 #define SCL SCSPTR1_SPB0DT macro 94 /* And Initialize SCL for RS5C313 clock */ in rs5c313_init_port() 95 scsptr1_data = __raw_readb(SCSPTR1) | SCL; /* SCL:H */ in rs5c313_init_port() 97 scsptr1_data = __raw_readb(SCSPTR1) | SCL_OEN; /* SCL output enable */ in rs5c313_init_port() 116 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_write_data() 119 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_write_data() 136 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_read_data() 139 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_read_data()
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/openbmc/u-boot/arch/arm/include/asm/mach-imx/ |
H A D | mxc_i2c.h | 18 struct i2c_pin_ctrl scl; member 35 * scl-gpio: specify the gpio related to SCL pin 64 .scl = { \ 76 .scl = { \
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