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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-GPIO
10 - Rob Herring <robh@kernel.org>
13 This represents a group of 3-n GPIO lines used for bit-banged SPI on
17 - $ref: /schemas/spi/spi-controller.yaml#
21 const: spi-gpio
23 sck-gpios:
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/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Davia-hx711.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andreas Klinger <ak@it-klinger.de>
13 Bit-banging driver using two GPIOs:
14 - sck-gpio gives a clock to the sensor with 24 cycles for data retrieval
17 - dout-gpio is the sensor data the sensor responds to the clock
25 - avia,hx711
27 sck-gpios:
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/openbmc/u-boot/doc/device-tree-bindings/spi/
H A Dsoft-spi.txt4 SPI bus. No SPI host is required for this to work. The down-side is that the
10 compatible: "spi-gpio"
11 cs-gpios: GPIOs to use for SPI chip select (output)
12 gpio-sck: GPIO to use for SPI clock (output)
14 gpio-mosi: GPIO to use for SPI MOSI line (output)
15 gpio-miso: GPIO to use for SPI MISO line (input)
18 spi-delay-us: Number of microseconds of delay between each CS transition
20 The GPIOs should be specified as required by the GPIO controller referenced.
27 soft-spi {
28 compatible = "spi-gpio";
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/openbmc/u-boot/arch/arm/dts/
H A Darmada-388-clearfog.dts11 * This file is dual-licensed: you can use it either under the terms
49 /dts-v1/;
50 #include <dt-bindings/input/input.h>
51 #include <dt-bindings/gpio/gpio.h>
52 #include "armada-388.dtsi"
53 #include "armada-38x-solidrun-microsom.dtsi"
57 compatible = "solidrun,clearfog-a1", "marvell,armada388",
61 /* So that mvebu u-boot can update the MAC addresses */
71 stdout-path = "serial0:115200n8";
74 reg_3p3v: regulator-3p3v {
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H A Dmeson-gxbb-odroidc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
14 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
15 model = "Hardkernel ODROID-C2";
23 stdout-path = "serial0:115200n8";
31 usb_otg_pwr: regulator-usb-pwrs {
32 compatible = "regulator-fixed";
34 regulator-name = "USB_OTG_PWR";
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,dove-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
23 uart1(cts), lcd-spi(cs1), pmu*
27 mpp7 7 gpio, pmu, uart3(rxd), sdio1(ledctrl), spi1(sck), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
41 ac97-1(sysclko)
43 mpp19 19 gpio, uart3(rxd), sdio0(ledctrl), twsi(sck)
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/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dat91-tse850-3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board
9 /dts-v1/;
10 #include <dt-bindings/pwm/pwm.h>
11 #include "at91-linea.dtsi"
14 model = "Axentia TSE-850 3.0";
18 sck: oscillator { label
19 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <16000000>;
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H A Dlan966x-kontron-kswitch-d10-mmt.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "dt-bindings/phy/phy-lan966x-serdes.h"
16 stdout-path = "serial0:115200n8";
19 gpio-restart {
20 compatible = "gpio-restart";
21 pinctrl-0 = <&reset_pins>;
22 pinctrl-names = "default";
23 gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
29 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
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H A Dlan966x-pcb8291.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8291.dts - Device Tree file for PCB8291
5 /dts-v1/;
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8291", "microchip,lan9662", "microchip,lan966";
14 stdout-path = "serial0:115200n8";
21 gpio-restart {
22 compatible = "gpio-restart";
23 gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
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/openbmc/linux/Documentation/devicetree/bindings/fpga/
H A Dlattice-ice40-fpga-mgr.txt4 - compatible: Should contain "lattice,ice40-fpga-mgr"
5 - reg: SPI chip select
6 - spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000)
7 - cdone-gpios: GPIO input connected to CDONE pin
8 - reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note
10 FPGA will enter Master SPI mode and drive SCK with a
16 compatible = "lattice,ice40-fpga-mgr";
18 spi-max-frequency = <1000000>;
19 cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
20 reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-nhk15.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include "ste-nomadik-stn8815.dtsi"
13 compatible = "st,nomadik-nhk-15";
22 stmpe-i2c0 = &stmpe0;
23 stmpe-i2c1 = &stmpe1;
71 disable-sxtalo;
72 disable-mxtalo;
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/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm947189acdbmr.dts8 /dts-v1/;
26 compatible = "gpio-leds";
28 led-wps {
30 gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
33 led-5ghz {
35 gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
38 led-2ghz {
40 gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
44 gpio-keys {
45 compatible = "gpio-keys";
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H A Dbcm47081-buffalo-wzr-900dhp.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-900DHP
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-900dhp", "brcm,bcm47081", "brcm,bcm4708";
16 model = "Buffalo WZR-900DHP (BCM47081)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 sck-gpios = <&chipcommon 7 0>;
32 mosi-gpios = <&chipcommon 4 0>;
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H A Dbcm47081-buffalo-wzr-600dhp2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-600DHP2
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-600dhp2", "brcm,bcm47081", "brcm,bcm4708";
16 model = "Buffalo WZR-600DHP2 (BCM47081)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 sck-gpios = <&chipcommon 7 0>;
32 mosi-gpios = <&chipcommon 4 0>;
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H A Dbcm4708-buffalo-wzr-1750dhp.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-1750DHP
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-1750dhp", "brcm,bcm4708";
16 model = "Buffalo WZR-1750DHP (BCM4708)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 sck-gpios = <&chipcommon 7 0>;
32 mosi-gpios = <&chipcommon 4 0>;
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/openbmc/linux/arch/arm/boot/dts/nxp/vf/
H A Dvf610-bk4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
15 stdout-path = &uart1;
23 audio_ext: oscillator-audio {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <24576000>;
29 enet_ext: oscillator-ethernet {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
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/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dsamsung,lms397kf04.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 - Linus Walleij <linus.walleij@linaro.org>
16 - $ref: panel-common.yaml#
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
25 reset-gpios: true
27 vci-supply:
31 vccio-supply:
37 spi-cpha: true
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H A Dsamsung,s6d27a1.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 - Markuss Broks <markuss.broks@gmail.com>
16 - $ref: panel-common.yaml#
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
32 reset-gpios: true
34 vci-supply:
38 vccio-supply:
44 spi-cpha: true
[all …]
H A Dsamsung,lms380kf01.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Linus Walleij <linus.walleij@linaro.org>
17 - $ref: panel-common.yaml#
18 - $ref: /schemas/spi/spi-peripheral-props.yaml#
33 reset-gpios: true
35 vci-supply:
39 vccio-supply:
45 spi-cpha: true
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/openbmc/linux/drivers/spi/
H A Dspi-gpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 * platform_device->driver_data ... points to spi_gpio
27 * spi->controller_state ... reserved for bitbang framework code
29 * spi->controller->dev.driver_data ... points to spi_gpio->bitbang
34 struct gpio_desc *sck; member
40 /*----------------------------------------------------------------------*/
47 * - The slow generic way: set up platform_data to hold the GPIO
48 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
51 * - The quicker inlined way: only helps with platform GPIO code
52 * that inlines operations for constant GPIOs. This can give
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/openbmc/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-cfa10049.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
8 * need to include the CFA-10036 DTS.
10 #include "imx28-cfa10036.dts"
13 model = "Crystalfontz CFA-10049 Board";
17 compatible = "i2c-mux-gpio";
18 #address-cells = <1>;
19 #size-cells = <0>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&i2cmux_pins_cfa10049>;
[all …]
H A Dimx28-cfa10056.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10055 is an expansion board for the CFA-10036 module and
8 * CFA-10037, thus we need to include the CFA-10037 DTS.
10 #include "imx28-cfa10037.dts"
13 model = "Crystalfontz CFA-10056 Board";
16 spi-2 {
17 compatible = "spi-gpio";
18 pinctrl-names = "default";
19 pinctrl-0 = <&spi2_pins_cfa10056>;
21 sck-gpios = <&gpio2 16 0>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Daxentia,tse850-pcm5142.txt1 Devicetree bindings for the Axentia TSE-850 audio complex
4 - compatible: "axentia,tse850-pcm5142"
5 - axentia,cpu-dai: The phandle of the cpu dai.
6 - axentia,audio-codec: The phandle of the PCM5142 codec.
7 - axentia,add-gpios: gpio specifier that controls the mixer.
8 - axentia,loop1-gpios: gpio specifier that controls loop relays on channel 1.
9 - axentia,loop2-gpios: gpio specifier that controls loop relays on channel 2.
10 - axentia,ana-supply: Regulator that supplies the output amplifier. Must
11 support voltages in the 2V - 20V range, in 1V steps.
13 The schematics explaining the gpios are as follows:
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/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dmmp3-dell-ariel.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 compatible = "dell,wyse-ariel", "marvell,mmp3";
22 #address-cells = <0x1>;
23 #size-cells = <0x1>;
35 compatible = "spi-gpio";
36 #address-cells = <1>;
37 #size-cells = <0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb-nanopi-k2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/sound/meson-aiu.h>
13 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
22 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
33 led-stat {
34 label = "nanopi-k2:blue:stat";
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