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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,sai.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,sai.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Synchronous Audio Interface (SAI).
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
13 The SAI is based on I2S module that used communicating with audio codecs,
21 - items:
22 - enum:
23 - fsl,imx6ul-sai
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H A Dst,stm32-sai.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Serial Audio Interface (SAI)
10 - Olivier Moysan <olivier.moysan@foss.st.com>
13 The SAI interface (Serial Audio Interface) offers a wide set of audio
14 protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
15 The SAI contains two independent audio sub-blocks. Each sub-block has
21 - st,stm32f4-sai
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H A Dfsl,asrc.txt1 Freescale Asynchronous Sample Rate Converter (ASRC) Controller
3 The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a
6 Ends Audio controller such as ESAI, SSI and SAI. It has three pairs to support
11 - compatible : Compatible list, should contain one of the following
13 "fsl,imx35-asrc",
14 "fsl,imx53-asrc",
15 "fsl,imx8qm-asrc",
16 "fsl,imx8qxp-asrc",
18 - reg : Offset and length of the register set for the device.
20 - interrupts : Contains the spdif interrupt.
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/openbmc/linux/sound/soc/fsl/
H A Dfsl_sai.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Freescale ALSA SoC Digital Audio Interface (SAI) driver.
5 // Copyright 2012-2015 Freescale Semiconductor, Inc.
23 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
27 #include "imx-pcm.h"
45 * fsl_sai_dir_is_synced - Check if stream is synced by the opposite stream
47 * SAI supports synchronous mode using bit/frame clocks of either Transmitter's
51 * @sai: SAI context
54 static inline bool fsl_sai_dir_is_synced(struct fsl_sai *sai, int dir) in fsl_sai_dir_is_synced() argument
59 return !sai->synchronous[dir] && sai->synchronous[adir]; in fsl_sai_dir_is_synced()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate "Asynchronous Sample Rate Converter (ASRC) module support"
12 Say Y if you want to add Asynchronous Sample Rate Converter (ASRC)
14 This option is only useful for out-of-tree drivers since
15 in-tree drivers select it automatically.
18 tristate "Synchronous Audio Interface (SAI) module support"
24 Say Y if you want to add Synchronous Audio Interface (SAI)
26 This option is only useful for out-of-tree drivers since
27 in-tree drivers select it automatically.
36 This option is only useful for out-of-tree drivers since
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H A Dfsl-asoc-card.c1 // SPDX-License-Identifier: GPL-2.0
23 #include "imx-audmux.h"
32 #define DRIVER_NAME "fsl-asoc-card"
43 * struct codec_priv - CODEC private data
61 * struct cpu_priv - CPU private data
79 * struct fsl_asoc_card_priv - Freescale Generic ASOC card private data
90 * @asrc_rate: ASRC sample rate used by Back-Ends
91 * @asrc_format: ASRC sample format used by Back-Ends
118 * to drop them easily for non-ASRC cases.
121 /* 1st half -- Normal DAPM routes */
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/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
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H A Dimx8mm-prt8mm.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/usb/pd.h>
17 stdout-path = &uart4;
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_gpio_leds>;
30 debug-led0 {
33 linux,default-trigger = "heartbeat";
36 debug-led1 {
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H A Dimx8mq-mnt-reform2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2021 MNT Research GmbH
8 /dts-v1/;
10 #include "imx8mq-nitrogen-som.dtsi"
14 compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq";
15 chassis-type = "laptop";
18 compatible = "pwm-backlight";
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_backlight>;
22 power-supply = <&reg_main_usb>;
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/openbmc/u-boot/board/freescale/ls1021atwr/
H A DREADME2 --------
6 ------------------
8 is built on Layerscape architecture, the industry's first software-aware,
9 core-agnostic networking architecture to offer unprecedented efficiency
12 A member of the value-performance tier, the QorIQ LS1021A processor provides
14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
17 security features and the broadest array of high-speed interconnects and
18 optimized peripheral features ever offered in a sub-3 W processor.
23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
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/openbmc/u-boot/board/freescale/ls1021aqds/
H A DREADME2 --------
6 ------------------
8 is built on Layerscape architecture, the industry's first software-aware,
9 core-agnostic networking architecture to offer unprecedented efficiency
12 A member of the value-performance tier, the QorIQ LS1021A processor provides
14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
17 security features and the broadest array of high-speed interconnects and
18 optimized peripheral features ever offered in a sub-3 W processor.
23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
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/openbmc/qemu/hw/arm/
H A Dfsl-imx6ul.c2 * Copyright (c) 2018 Jean-Christophe Dubois <jcd@tribudubois.net>
6 * Based on hw/arm/fsl-imx7.c
21 #include "hw/arm/fsl-imx6ul.h"
23 #include "hw/usb/imx-usb-phy.h"
26 #include "qemu/error-report.h"
28 #include "target/arm/cpu-qom.h"
38 object_initialize_child(obj, "cpu0", &s->cpu, in fsl_imx6ul_init()
39 ARM_CPU_TYPE_NAME("cortex-a7")); in fsl_imx6ul_init()
44 object_initialize_child(obj, "a7mpcore", &s->a7mpcore, in fsl_imx6ul_init()
50 object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX6UL_CCM); in fsl_imx6ul_init()
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/openbmc/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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