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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,wcd938x-sdw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,wcd938x-sdw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9380/WCD9385 Codec is a standalone Hi-Fi audio codec IC.
14 It has RX and TX Soundwire slave devices. This bindings is for the
24 qcom,tx-port-mapping:
26 Specifies static port mapping between slave and master tx ports.
27 In the order of slave port index.
[all …]
H A Drockchip,i2s-tdm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
18 - $ref: dai-common.yaml#
23 - rockchip,px30-i2s-tdm
24 - rockchip,rk1808-i2s-tdm
25 - rockchip,rk3308-i2s-tdm
26 - rockchip,rk3568-i2s-tdm
[all …]
H A Dqcom,wcd938x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9380/WCD9385 Codec is a standalone Hi-Fi audio codec IC.
14 It has RX and TX Soundwire slave devices.
17 - $ref: dai-common.yaml#
22 - qcom,wcd9380-codec
23 - qcom,wcd9385-codec
25 reset-gpios:
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/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/en/tc/
H A Dint_port.c1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
5 #include "en/mapping.h"
15 u32 mapping; member
28 struct mapping_ctx *metadata_mapping; /* Metadata for source port rewrite and matching */
34 MLX5_CAP_GEN(esw->dev, reg_c_preserve); in mlx5e_tc_int_port_supported()
39 return int_port->match_metadata; in mlx5e_tc_int_port_get_metadata()
46 * to int port or it came from the uplink, going in mlx5e_tc_int_port_get_flow_source()
47 * via internal port and hairpinned back to uplink in mlx5e_tc_int_port_get_flow_source()
48 * so we set the source to any port in this case. in mlx5e_tc_int_port_get_flow_source()
50 return int_port->type == MLX5E_TC_INT_PORT_EGRESS ? in mlx5e_tc_int_port_get_flow_source()
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/openbmc/linux/drivers/net/ethernet/cortina/
H A Dgemini.c1 // SPDX-License-Identifier: GPL-2.0
11 * Michał Mirosław <mirq-linux@rere.qmqm.pl>
22 #include <linux/dma-mapping.h>
46 #define DRV_NAME "gmac-gemini"
49 static int debug = -1;
86 * struct gmac_queue_page - page buffer per-page info
88 * @mapping: the dma address handle
92 dma_addr_t mapping; member
156 spinlock_t irq_lock; /* Locks IRQ-related registers */
227 struct gemini_ethernet_port *port = netdev_priv(netdev); in gmac_update_config0_reg() local
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/openbmc/linux/drivers/net/ethernet/ti/
H A Dcpsw_priv.h1 /* SPDX-License-Identifier: GPL-2.0 */
26 dev_info(priv->dev, format, ## __VA_ARGS__); \
32 dev_err(priv->dev, format, ## __VA_ARGS__); \
38 dev_dbg(priv->dev, format, ## __VA_ARGS__); \
44 dev_notice(priv->dev, format, ## __VA_ARGS__); \
127 #define CPSW_FIFO_SHAPERS_NUM (CPSW_TC_NUM - 1)
184 #define CPSW1_TX_PRI_MAP 0x10 /* Tx Header Priority to Switch Pri Mapping */
195 #define CPSW2_TX_PRI_MAP 0x18 /* Tx Header Priority to Switch Pri Mapping */
204 #define RX_DSCP_PRI_MAP0 0x30 /* Rx DSCP Priority to Rx Packet Mapping */
205 #define RX_DSCP_PRI_MAP1 0x34 /* Rx DSCP Priority to Rx Packet Mapping */
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/openbmc/linux/drivers/soundwire/
H A Damd_manager.h1 /* SPDX-License-Identifier: GPL-2.0+ */
208 * SDW0 Manager instance registers 6 CPU DAI (3 TX & 3 RX Ports)
209 * whereas SDW1 Manager Instance registers 2 CPU DAI (one TX & one RX port)
210 * Below is the CPU DAI <->Manager port number mapping
211 * i.e SDW0 Pin0 -> port number 0 -> AUDIO0 TX
212 * SDW0 Pin1 -> Port number 1 -> AUDIO1 TX
213 * SDW0 Pin2 -> Port number 2 -> AUDIO2 TX
214 * SDW0 Pin3 -> port number 3 -> AUDIO0 RX
215 * SDW0 Pin4 -> Port number 4 -> AUDIO1 RX
216 * SDW0 Pin5 -> Port number 5 -> AUDIO2 RX
[all …]
/openbmc/linux/drivers/net/ethernet/sunplus/
H A Dspl2sw_int.c1 // SPDX-License-Identifier: GPL-2.0
30 int port; in spl2sw_rx_poll() local
34 /* Process high-priority queue and then low-priority queue. */ in spl2sw_rx_poll()
36 rx_pos = comm->rx_pos[queue]; in spl2sw_rx_poll()
37 rx_count = comm->rx_desc_num[queue]; in spl2sw_rx_poll()
40 sinfo = comm->rx_skb_info[queue] + rx_pos; in spl2sw_rx_poll()
41 desc = comm->rx_desc[queue] + rx_pos; in spl2sw_rx_poll()
42 cmd = desc->cmd1; in spl2sw_rx_poll()
47 port = FIELD_GET(RXD_PKT_SP, cmd); in spl2sw_rx_poll()
48 if (port < MAX_NETDEV_NUM && comm->ndev[port]) in spl2sw_rx_poll()
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H A Dspl2sw_define.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 #define MAX_NETDEV_NUM 2 /* Maximum # of net-device */
17 #define MAC_INT_PORT_ST_CHG BIT(19) /* Port Status Change */
21 #define MAC_INT_TX_SOC_PAUSE_ON BIT(15) /* Soc Port TX Pause On */
22 #define MAC_INT_RX_SOC_QUE_FULL BIT(14) /* Soc Port Out Queue Full */
23 #define MAC_INT_TX_LAN1_QUE_FULL BIT(9) /* Port 1 Out Queue Full */
24 #define MAC_INT_TX_LAN0_QUE_FULL BIT(8) /* Port 0 Out Queue Full */
27 #define MAC_INT_RX_DONE_L BIT(5) /* RX Low Priority Done */
28 #define MAC_INT_RX_DONE_H BIT(4) /* RX High Priority Done */
32 #define MAC_INT_RX_DES_ERR BIT(0) /* Rx Descriptor Error */
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/openbmc/linux/Documentation/devicetree/bindings/hsi/
H A Domap-ssi.txt9 - compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi"
10 - reg-names: Contains the values "sys" and "gdd" (in this order).
11 - reg: Contains a matching register specifier for each entry
12 in reg-names.
13 - interrupt-names: Contains the value "gdd_mpu".
14 - interrupts: Contains matching interrupt information for each entry
15 in interrupt-names.
16 - ranges: Represents the bus address mapping between the main
18 - clock-names: Must include the following entries:
22 - clocks: Contains a matching clock specifier for each entry in
[all …]
/openbmc/linux/drivers/net/ethernet/mscc/
H A Docelot_fdma.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
24 regmap_write(ocelot->targets[FDMA], reg, data); in ocelot_fdma_writel()
31 regmap_read(ocelot->targets[FDMA], reg, &retval); in ocelot_fdma_readl()
43 return (dma - base) / sizeof(struct ocelot_fdma_dcb); in ocelot_fdma_dma_idx()
48 return unlikely(idx == ring_sz - 1) ? 0 : idx + 1; in ocelot_fdma_idx_next()
53 return unlikely(idx == 0) ? ring_sz - 1 : idx - 1; in ocelot_fdma_idx_prev()
58 struct ocelot_fdma_rx_ring *rx_ring = &fdma->rx_ring; in ocelot_fdma_rx_ring_free()
60 if (rx_ring->next_to_use >= rx_ring->next_to_clean) in ocelot_fdma_rx_ring_free()
61 return OCELOT_FDMA_RX_RING_SIZE - in ocelot_fdma_rx_ring_free()
62 (rx_ring->next_to_use - rx_ring->next_to_clean) - 1; in ocelot_fdma_rx_ring_free()
[all …]
/openbmc/linux/drivers/net/ethernet/broadcom/
H A Dbcmsysport.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Broadcom BCM7xxx System Port Ethernet MAC driver
34 u32 reg = readl_relaxed(priv->base + offset + off); \
40 writel_relaxed(val, priv->base + offset + off); \
59 if (priv->is_lite && off >= RDMA_STATUS) in rdma_readl()
61 return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off); in rdma_readl()
66 if (priv->is_lite && off >= RDMA_STATUS) in rdma_writel()
68 writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off); in rdma_writel()
73 if (!priv->is_lite) { in tdma_control_bit()
83 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
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/openbmc/linux/include/xen/interface/io/
H A Dnetif.h1 /* SPDX-License-Identifier: MIT */
5 * Unified network-device I/O interface for Xen guest OSes.
7 * Copyright (c) 2003-2004, Keir Fraser
37 * If the client sends notification for rx requests then it should specify
38 * feature 'feature-rx-notify' via xenbus. Otherwise the backend will assume
43 * "feature-split-event-channels" is introduced to separate guest TX
44 * and RX notification. Backend either doesn't support this feature or
48 * channels for TX and RX, advertise them to backend as
49 * "event-channel-tx" and "event-channel-rx" respectively. If frontend
50 * doesn't want to use this feature, it just writes "event-channel"
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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
[all …]
H A Dcavium-pip.txt10 - compatible: "cavium,octeon-3860-pip"
14 - reg: The base address of the PIP's register bank.
16 - #address-cells: Must be <1>.
18 - #size-cells: Must be <0>.
21 - compatible: "cavium,octeon-3860-pip-interface"
25 - reg: The interface number.
27 - #address-cells: Must be <1>.
29 - #size-cells: Must be <0>.
31 Properties for PIP port which is a child the PIP interface:
32 - compatible: "cavium,octeon-3860-pip-port"
[all …]
/openbmc/linux/drivers/tty/serial/8250/
H A D8250_dma.c1 // SPDX-License-Identifier: GPL-2.0+
3 * 8250_dma.c - DMA Engine API support for 8250.c
10 #include <linux/dma-mapping.h>
17 struct uart_8250_dma *dma = p->dma; in __dma_tx_complete()
18 struct circ_buf *xmit = &p->port.state->xmit; in __dma_tx_complete()
22 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, in __dma_tx_complete()
25 spin_lock_irqsave(&p->port.lock, flags); in __dma_tx_complete()
27 dma->tx_running = 0; in __dma_tx_complete()
29 uart_xmit_advance(&p->port, dma->tx_size); in __dma_tx_complete()
32 uart_write_wakeup(&p->port); in __dma_tx_complete()
[all …]
/openbmc/qemu/include/hw/xen/interface/io/
H A Dnetif.h1 /* SPDX-License-Identifier: MIT */
5 * Unified network-device I/O interface for Xen guest OSes.
7 * Copyright (c) 2003-2004, Keir Fraser
37 * If the client sends notification for rx requests then it should specify
38 * feature 'feature-rx-notify' via xenbus. Otherwise the backend will assume
43 * "feature-split-event-channels" is introduced to separate guest TX
44 * and RX notification. Backend either doesn't support this feature or
48 * channels for TX and RX, advertise them to backend as
49 * "event-channel-tx" and "event-channel-rx" respectively. If frontend
50 * doesn't want to use this feature, it just writes "event-channel"
[all …]
/openbmc/linux/include/linux/platform_data/
H A Ddma-ep93xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <linux/dma-mapping.h>
30 * struct ep93xx_dma_data - configuration data for the EP93xx dmaengine
31 * @port: peripheral which is requesting the channel
32 * @direction: TX/RX channel
40 int port; member
46 * struct ep93xx_dma_chan_data - platform specific data for a DMA channel
58 * struct ep93xx_dma_platform_data - platform data for the dmaengine driver
63 * M2P channels, contract is that even channels are for TX and odd for RX.
73 return !strcmp(dev_name(chan->device->dev), "ep93xx-dma-m2p"); in ep93xx_dma_chan_is_m2p()
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/openbmc/linux/tools/testing/selftests/net/
H A Dtoeplitz.sh2 # SPDX-License-Identifier: GPL-2.0
4 # extended toeplitz test: test rxhash plus, optionally, either (1) rss mapping
5 # from rxhash to rx queue ('-rss') or (2) rps mapping from rxhash to cpu
6 # ('-rps <rps_map>')
8 # irq-pattern-prefix can be derived from /sys/kernel/irq/*/action,
9 # which is a driver-specific encoding.
11 # invoke as ./toeplitz.sh (-i <iface>) -u|-t -4|-6 \
12 # [(-rss -irq_prefix <irq-pattern-prefix>)|(-rps <rps_map>)]
23 PORT=8000
34 echo $(ethtool -x "${DEV}" |
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/openbmc/linux/Documentation/devicetree/bindings/iommu/
H A Dmediatek,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yong Wu <yong.wu@mediatek.com>
15 pagetable, and only supports 4K size page mapping. Generation two uses the
16 ARM Short-Descriptor translation table format for address translation.
24 +--------+
26 gals0-rx gals1-rx (Global Async Local Sync rx)
29 gals0-tx gals1-tx (Global Async Local Sync tx)
31 +--------+
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/openbmc/linux/drivers/net/ethernet/freescale/enetc/
H A Denetc.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2017-2019 NXP */
8 #include <linux/dma-mapping.h>
19 #define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \
47 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD)
49 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM)
91 struct device *dev; /* for DMA mapping */
96 void *bd_base; /* points to Rx or Tx BD ring */
107 struct device *dev; /* for DMA mapping */
109 void *bd_base; /* points to Rx or Tx BD ring */
[all …]
/openbmc/linux/drivers/net/ethernet/aquantia/atlantic/hw_atl/
H A Dhw_atl_llh.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
59 /* get rx dma good octet counter */
62 /* get rx dma good packet counter */
71 /* get msm rx errors counter register */
74 /* get msm rx unicast frames counter register */
77 /* get msm rx multicast frames counter register */
80 /* get msm rx broadcast frames counter register */
83 /* get msm rx broadcast octets counter register 1 */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dqcom-sata.txt3 SATA nodes are defined to describe on-chip Serial ATA controllers.
7 - compatible : compatible list, must contain "generic-ahci"
8 - interrupts : <interrupt mapping for SATA IRQ>
9 - reg : <registers mapping>
10 - phys : Must contain exactly one entry as specified
11 in phy-bindings.txt
12 - phy-names : Must be "sata-phy"
14 Required properties for "qcom,ipq806x-ahci" compatible:
15 - clocks : Must contain an entry for each entry in clock-names.
16 - clock-names : Shall be:
[all …]
/openbmc/linux/drivers/net/ethernet/dec/tulip/
H A Dde2104x.c6 Written/copyright 1994-2001 by Donald Becker. [tulip.c]
20 * Constants (module parms?) for Rx work limit
22 * Jumbo frames / dev->change_mtu
23 * Adjust Rx FIFO threshold and Max Rx DMA burst on Rx FIFO error
58 static int debug = -1;
62 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
71 MODULE_PARM_DESC (rx_copybreak, "de2104x Breakpoint at which Rx packets are copied");
93 #define NEXT_TX(N) (((N) + 1) & (DE_TX_RING_SIZE - 1))
94 #define NEXT_RX(N) (((N) + 1) & (DE_RX_RING_SIZE - 1))
96 (((CP)->tx_tail <= (CP)->tx_head) ? \
[all …]
/openbmc/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_cmn.c3 * Copyright (c) 2007-2013 Broadcom Corporation
47 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), bnx2x_poll); in bnx2x_add_all_napi_cnic()
57 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), bnx2x_poll); in bnx2x_add_all_napi()
74 * bnx2x_move_fp - move content of the fastpath structure.
80 * Makes sure the contents of the bp->fp[to].napi is kept
88 struct bnx2x_fastpath *from_fp = &bp->fp[from]; in bnx2x_move_fp()
89 struct bnx2x_fastpath *to_fp = &bp->fp[to]; in bnx2x_move_fp()
90 struct bnx2x_sp_objs *from_sp_objs = &bp->sp_objs[from]; in bnx2x_move_fp()
91 struct bnx2x_sp_objs *to_sp_objs = &bp->sp_objs[to]; in bnx2x_move_fp()
92 struct bnx2x_fp_stats *from_fp_stats = &bp->fp_stats[from]; in bnx2x_move_fp()
[all …]

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