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/openbmc/linux/Documentation/devicetree/bindings/riscv/
H A Dcpus.yaml41 - sifive,rocket0
55 - const: sifive,rocket0
149 compatible = "sifive,rocket0", "riscv";
166 compatible = "sifive,rocket0", "riscv";
/openbmc/linux/arch/riscv/boot/dts/sifive/
H A Dfu540-c000.dtsi26 compatible = "sifive,e51", "sifive,rocket0", "riscv";
41 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
65 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
89 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
113 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
/openbmc/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi18 compatible = "sifive,e51", "sifive,rocket0", "riscv";
36 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
64 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
92 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
120 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
/openbmc/linux/Documentation/devicetree/bindings/cpu/
H A Dcpu-topology.txt525 compatible = "sifive,rocket0", "riscv";
531 compatible = "sifive,rocket0", "riscv";
536 compatible = "sifive,rocket0", "riscv";
541 compatible = "sifive,rocket0", "riscv";