| /openbmc/openbmc-test-automation/ipmi/ |
| H A D | test_ipmi_device_id.robot | 3 ... This script verifies Get Device ID IPMI command.
9 ... Device ID, Device Revision, Firmware Revision 1 & 2,
10 ... IPMI Version, Manufacture ID, Product ID,
11 ... Auxiliary Firmware Revision Information
13 ... Request Data for Get Device ID defined under,
14 ... - data/ipmi_raw_cmd_table.py
28 Get Device ID Via IPMI
29 [Documentation] Verify Get Device ID using IPMI and check whether a response is received.
32 # Verify Get Device ID.
34 ... ${IPMI_RAW_CMD['Device ID']['Get'][0]}
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| /openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/ |
| H A D | PCIeDevice.interface.yaml | 7 - name: DeviceType
11 - name: GenerationInUse
16 - name: GenerationSupported
22 - name: Function0ClassCode
26 - name: Function0DeviceClass
30 - name: Function0DeviceId
33 The Device ID for this function.
34 - name: Function0FunctionType
38 - name: Function0RevisionId
41 The Revision ID for this function.
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| /openbmc/linux/arch/arm/mach-mvebu/ |
| H A D | mvebu-soc-id.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * ID and revision information for mvebu SoCs
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * revision that can be read from the PCI control register. This is
12 * ID and revision are retrieved, the mapping is freed.
15 #define pr_fmt(fmt) "mvebu-soc-id: " fmt
26 #include "mvebu-soc-id.h"
39 { .compatible = "marvell,armada-xp-pcie", },
40 { .compatible = "marvell,armada-370-pcie", },
41 { .compatible = "marvell,kirkwood-pcie" },
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| H A D | mvebu-soc-id.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Marvell EBU SoC ID and revision definitions.
11 /* Armada XP ID */
16 /* Armada XP Revision */
20 /* Amada 370 ID */
23 /* Amada 370 Revision */
26 /* Armada 375 ID */
33 /* Armada 38x ID */
38 /* Armada 38x Revision */
47 return -1; in mvebu_get_soc_id()
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| /openbmc/linux/drivers/ssb/ |
| H A D | driver_chipcommon.c | 7 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
45 struct ssb_device *ccdev = cc->dev; in ssb_chipco_set_clockmode()
51 bus = ccdev->bus; in ssb_chipco_set_clockmode()
54 if (ccdev->id.revision >= 10 && mode == SSB_CLKMODE_SLOW) in ssb_chipco_set_clockmode()
57 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) in ssb_chipco_set_clockmode()
59 WARN_ON(ccdev->id.revision >= 20); in ssb_chipco_set_clockmode()
62 if (ccdev->id.revision < 6) in ssb_chipco_set_clockmode()
66 if (ccdev->id.revision >= 10) in ssb_chipco_set_clockmode()
69 if (!(cc->capabilities & SSB_CHIPCO_CAP_PCTL)) in ssb_chipco_set_clockmode()
79 if (ccdev->id.revision < 10) { in ssb_chipco_set_clockmode()
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| /openbmc/linux/drivers/gpu/drm/amd/include/ |
| H A D | discovery.h | 79 uint32_t id; /* Table ID */ member
94 uint16_t hw_id; /* Hardware ID */
99 uint8_t revision; /* HCID Revision */ member
112 uint16_t hw_id; /* Hardware ID */
115 uint8_t major; /* Hardware ID.major version */
116 uint8_t minor; /* Hardware ID.minor version */
117 uint8_t revision; /* Hardware ID.revision version */ member
120 uint8_t sub_revision : 4; /* HCID Sub-Revision */
122 uint8_t sub_revision : 4; /* HCID Sub-Revision */
129 uint16_t hw_id; /* Hardware ID */
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| /openbmc/intel-ipmi-oem/src/ |
| H A D | appcommands.cpp | 8 // http://www.apache.org/licenses/LICENSE-2.0
24 #include <phosphor-logging/elog-errors.hpp>
25 #include <phosphor-logging/lg2.hpp>
26 #include <phosphor-logging/log.hpp>
68 return -1; in initBMCDeviceState()
74 *(ctx->bus), in initBMCDeviceState()
95 std::string* state = std::get_if<std::string>(&it->second); in initBMCDeviceState()
113 return -1; in initBMCDeviceState()
129 * ctx[in] - ipmi context.
130 * reqVersionPurpose[in] - Version purpose which need to be read.
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| /openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/templates/ |
| H A D | importlayer.html | 5 {% block title %} Import layer - {{project.name}} - Toaster {% endblock %}
16 xhrLayerUrl : "{% url 'xhr_layer' project.id %}",
29 <form class="col-md-11">
30 …<span class="help-block">The layer you are importing must be compatible with <strong>{{project.rel…
31 <div class="alert alert-error" id="import-error" style="display:none">
32 <button type="button" class="close" data-dismiss="alert">×</button>
38 <div class="form-group" id="layer-name-ctrl">
39 <label class="control-label" for="import-layer-name">
41 …<span class="glyphicon glyphicon-question-sign get-help" title="Something like 'meta-mylayer'. You…
43 …<input class="form-control" id="import-layer-name" type="text" required autofocus data-autocomplet…
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| /openbmc/qemu/include/hw/cxl/ |
| H A D | cxl_pci.h | 7 * COPYING file in the top-level directory.
57 * CXL r3.1 Table 8-2: CXL DVSEC ID Assignment
60 * (x) - IDs in Table 8-2.
62 * CXL RCD (D1): 0, [2], [5], 7, [8], A - Not emulated yet
63 * CXL RCD USP (UP1): 7, [8] - Not emulated yet
70 * FM-Owned LD (FMLD): 0, [2], 7, 8, 9
75 * DVSEC ID: 0, Revision: 3
101 * DVSEC ID: 3, Revision: 0
126 * DVSEC ID: 4, Revision: 0
138 * DVSEC ID: 5, Revision 0
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| /openbmc/linux/drivers/scsi/mvsas/ |
| H A D | mv_94xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
17 struct mvs_phy *phy = &mvi->phy[i]; in mvs_94xx_detect_porttype()
23 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA); in mvs_94xx_detect_porttype()
26 phy->phy_type |= PORT_TYPE_SAS; in mvs_94xx_detect_porttype()
30 phy->phy_type |= PORT_TYPE_SATA; in mvs_94xx_detect_porttype()
43 * R0Ch -> R118h[15:0] (Adapted DFE F3 - F5 coefficient) in set_phy_tuning()
44 * R0Dh -> R118h[31:16] (Generation 1 Setting 0) in set_phy_tuning()
45 * R0Eh -> R11Ch[15:0] (Generation 1 Setting 1) in set_phy_tuning()
46 * R0Fh -> R11Ch[31:16] (Generation 2 Setting 0) in set_phy_tuning()
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| /openbmc/linux/drivers/soc/samsung/ |
| H A D | exynos-chipid.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Exynos - CHIP ID support
12 * Samsung Exynos SoC Adaptive Supply Voltage and Chip ID support
23 #include <linux/soc/samsung/exynos-chipid.h>
26 #include "exynos-asv.h"
29 unsigned int rev_reg; /* revision register offset */
30 unsigned int main_rev_shift; /* main revision offset in rev_reg */
31 unsigned int sub_rev_shift; /* sub revision offset in rev_reg */
36 u32 revision; member
41 unsigned int id; member
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| /openbmc/qemu/docs/specs/ |
| H A D | ivshmem-spec.rst | 2 Device Specification for Inter-VM shared memory device
5 The Inter-VM shared memory device (ivshmem) is designed to share a
23 The device has vendor ID 1af4, device ID 1110, revision 1. Before
24 QEMU 2.6.0, it had revision 0.
27 --------
31 - BAR0 holds device registers (256 Byte MMIO)
32 - BAR1 holds MSI-X table and PBA (only ivshmem-doorbell)
33 - BAR2 maps the shared memory object
37 - If you only need the shared memory part, BAR2 suffices. This way,
41 - If you additionally need the capability for peers to interrupt each
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| /openbmc/openbmc/poky/documentation/migration-guides/ |
| H A D | release-notes-4.0.20.rst | 1 .. SPDX-License-Identifier: CC-BY-SA-2.0-UK
3 Release notes for Yocto-4.0.20 (Kirkstone)
4 ------------------------------------------
6 Security Fixes in Yocto-4.0.20
9 - acpica: Fix :cve_nist:`2024-24856`
10 - glib-2.0: Fix :cve_nist:`2024-34397`
11 - gstreamer1.0-plugins-base: Fix :cve_nist:`2024-4453`
12 - libxml2: Fix :cve_nist:`2024-34459`
13 - openssh: fix :cve_nist:`2024-6387`
14 - openssl: Fix :cve_mitre:`2024-4741` and :cve_nist:`2024-5535`
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| H A D | release-notes-5.0.1.rst | 1 .. SPDX-License-Identifier: CC-BY-SA-2.0-UK
3 Release notes for Yocto-5.0.1 (Scarthgap)
4 -----------------------------------------
6 Security Fixes in Yocto-5.0.1
9 - N/A
12 Fixes in Yocto-5.0.1
15 - babeltrace2: upgrade 2.0.5 -> 2.0.6
16 - bind: upgrade 9.18.24 -> 9.18.25
17 - bitbake: cooker: Use hash client to ping upstream server
18 - build-appliance-image: Update to scarthgap head revision (b9b47b1a392b...)
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| /openbmc/linux/kernel/bpf/ |
| H A D | mprog.c | 1 // SPDX-License-Identifier: GPL-2.0
11 struct bpf_link *link = ERR_PTR(-EINVAL); in bpf_mprog_link()
12 bool id = flags & BPF_F_ID; in bpf_mprog_link() local
14 if (id) in bpf_mprog_link()
20 if (type && link->prog->type != type) { in bpf_mprog_link()
22 return -EINVAL; in bpf_mprog_link()
25 tuple->link = link; in bpf_mprog_link()
26 tuple->prog = link->prog; in bpf_mprog_link()
34 struct bpf_prog *prog = ERR_PTR(-EINVAL); in bpf_mprog_prog()
35 bool id = flags & BPF_F_ID; in bpf_mprog_prog() local
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| /openbmc/linux/drivers/watchdog/ |
| H A D | pcwd.c | 1 // SPDX-License-Identifier: GPL-2.0-only
10 * 960108 Fixed end-of-file pointer (Thanks to Dan Hollis), added
24 * added watchdog disable/re-enable routines. Added firmware
26 * Removed some extra defines, added an autodetect Revision
60 #include <linux/errno.h> /* For the -ENODEV/... values */
71 #include <linux/ioport.h> /* For io-port access */
79 #define WATCHDOG_DRIVER_NAME "ISA-PC Watchdog"
94 * These are the auto-probe addresses available.
96 * Revision A only uses ports 0x270 and 0x370. Revision C introduced 0x350.
97 * Revision A has an address range of 2 addresses, while Revision C has 4.
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/bios/ |
| H A D | bios_parser2.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
48 bp->base.ctx->logger
88 #define DATA_TABLES(table) (bp->master_data_tbl->listOfdatatables.table)
92 kfree(bp->base.bios_local_image); in bios_parser2_destruct()
93 kfree(bp->base.integrated_info); in bios_parser2_destruct()
118 /* initialize the revision to 0 which is invalid revision */ in get_atom_data_table_revision()
119 tbl_revision->major = 0; in get_atom_data_table_revision()
120 tbl_revision->minor = 0; in get_atom_data_table_revision()
125 tbl_revision->major = in get_atom_data_table_revision()
126 (uint32_t) atom_data_tbl->format_revision & 0x3f; in get_atom_data_table_revision()
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| /openbmc/linux/drivers/gpu/drm/msm/disp/mdp5/ |
| H A D | mdp5_cfg.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
10 int revision; member
66 { .id = 0, .pp = 0, .dspp = 0,
68 { .id = 1, .pp = 1, .dspp = 1,
70 { .id = 2, .pp = 2, .dspp = 2,
72 { .id = 3, .pp = -1, .dspp = -1,
74 { .id = 4, .pp = -1, .dspp = -1,
155 { .id = 0, .pp = 0, .dspp = 0,
157 { .id = 1, .pp = -1, .dspp = -1,
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| /openbmc/linux/drivers/soc/aspeed/ |
| H A D | aspeed-socinfo.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
14 const u32 id; member
34 unsigned int id = siliconid & 0xff00ffff; in siliconid_to_name() local
38 if (rev_table[i].id == id) in siliconid_to_name()
88 np = of_find_compatible_node(NULL, NULL, "aspeed,silicon-id"); in aspeed_socinfo_init()
91 return -ENODEV; in aspeed_socinfo_init()
97 return -ENODEV; in aspeed_socinfo_init()
114 return -ENODEV; in aspeed_socinfo_init()
119 * Revision: A1 in aspeed_socinfo_init()
120 * SoC ID: raw silicon revision id in aspeed_socinfo_init()
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_cgs.c | 41 ((struct amdgpu_cgs_device *)cgs_device)->adev
142 if (adev->asic_type >= CHIP_TOPAZ) in fw_type_convert()
167 fw_version = adev->sdma.instance[0].fw_version; in amdgpu_get_firmware_version()
170 fw_version = adev->sdma.instance[1].fw_version; in amdgpu_get_firmware_version()
173 fw_version = adev->gfx.ce_fw_version; in amdgpu_get_firmware_version()
176 fw_version = adev->gfx.pfp_fw_version; in amdgpu_get_firmware_version()
179 fw_version = adev->gfx.me_fw_version; in amdgpu_get_firmware_version()
182 fw_version = adev->gfx.mec_fw_version; in amdgpu_get_firmware_version()
185 fw_version = adev->gfx.mec_fw_version; in amdgpu_get_firmware_version()
188 fw_version = adev->gfx.mec_fw_version; in amdgpu_get_firmware_version()
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| /openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| H A D | jedec,lpddr2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR2 SDRAM compliant to JEDEC JESD209-2
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - items:
19 - enum:
20 - elpida,ECB240ABACN
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| /openbmc/qemu/qapi/ |
| H A D | cxl.json | 1 # -*- Mode: Python -*-
32 # @cxl-inject-general-media-event:
42 # @flags: Event Record Flags. See CXL r3.0 Table 8-42 Common Event
46 # lower bits include some flags. See CXL r3.0 Table 8-43 General
50 # information. See CXL r3.0 Table 8-43 General Media Event
53 # @type: Type of memory event that occurred. See CXL r3.0 Table 8-43
57 # @transaction-type: Type of first transaction that caused the event
58 # to occur. See CXL r3.0 Table 8-43 General Media Event Record,
70 # @component-id: Device specific component identifier for the event.
71 # May describe a field replaceable sub-component of the device.
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| /openbmc/linux/include/linux/ |
| H A D | mcb.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
21 * struct mcb_bus - MEN Chameleon Bus
27 * @revision: the FPGA's revision number
35 u8 revision; member
48 * struct mcb_device - MEN Chameleon Bus device
54 * @id: mcb device id
59 * @rev: revision in Chameleon table
67 u16 id; member
81 * struct mcb_driver - MEN Chameleon Bus device driver
84 * @id_table: mcb id table
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| /openbmc/linux/arch/mips/pci/ |
| H A D | fixup-cobalt.c | 33 * The Cobalt board ID information. The boards have an ID number wired
42 * document "GT-64111 System Controller for RC4640, RM523X and VR4300 CPUs",
47 * Code does not cause a problem for these non-compliant BIOSes, so we used
48 * this as the default in the GT-64111.
56 if (dev->devfn == PCI_DEVFN(0, 0) && in qube_raq_galileo_early_fixup()
57 (dev->class >> 8) == PCI_CLASS_MEMORY_OTHER) { in qube_raq_galileo_early_fixup()
59 dev->class = (PCI_CLASS_BRIDGE_HOST << 8) | (dev->class & 0xff); in qube_raq_galileo_early_fixup()
93 if (dev->devfn != PCI_DEVFN(0, 0)) in qube_raq_galileo_fixup()
96 /* Fix PCI latency-timer and cache-line-size values in Galileo in qube_raq_galileo_fixup()
108 * --x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x--x-- in qube_raq_galileo_fixup()
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| /openbmc/linux/drivers/gpu/drm/panfrost/ |
| H A D | panfrost_gpu.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/dma-mapping.h>
35 dev_warn(pfdev->dev, "GPU Fault 0x%08x (%s) at 0x%016llx\n", in panfrost_gpu_irq_handler()
40 dev_warn(pfdev->dev, "There were multiple GPU faults - some have not been reported\n"); in panfrost_gpu_irq_handler()
65 ret = readl_relaxed_poll_timeout(pfdev->iomem + GPU_INT_RAWSTAT, in panfrost_gpu_soft_reset()
69 dev_err(pfdev->dev, "gpu soft reset timed out\n"); in panfrost_gpu_soft_reset()
87 * The Amlogic integrated Mali-T820, Mali-G31 & Mali-G52 needs in panfrost_gpu_amlogic_quirk()
137 pfdev->features.revision >= 0x2000) in panfrost_gpu_init_quirks()
140 pfdev->features.coherency_features == COHERENCY_ACE) in panfrost_gpu_init_quirks()
151 if (pfdev->comp->vendor_quirk) in panfrost_gpu_init_quirks()
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