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/openbmc/linux/tools/testing/selftests/powerpc/switch_endian/
H A DMakefile6 EXTRA_CLEAN = $(OUTPUT)/*.o $(OUTPUT)/check-reversed.S
12 $(OUTPUT)/switch_endian_test: $(OUTPUT)/check-reversed.S
14 $(OUTPUT)/check-reversed.o: $(OUTPUT)/check.o
17 $(OUTPUT)/check-reversed.S: $(OUTPUT)/check-reversed.o
H A D.gitignore3 check-reversed.S
/openbmc/u-boot/include/linux/
H A Dcrc32.h20 * is used. The output of crc32_le is bit reversed [most significant bit
21 * is in bit nr 0], thus it must be reversed before use. Except for
H A Dmdio.h217 #define MDIO_PMA_10GBT_SWAPPOL_AREV 0x0100 /* Pair A polarity reversed */
218 #define MDIO_PMA_10GBT_SWAPPOL_BREV 0x0200 /* Pair B polarity reversed */
219 #define MDIO_PMA_10GBT_SWAPPOL_CREV 0x0400 /* Pair C polarity reversed */
220 #define MDIO_PMA_10GBT_SWAPPOL_DREV 0x0800 /* Pair D polarity reversed */
/openbmc/linux/tools/testing/selftests/bpf/progs/
H A Dtest_core_reloc_flavors.c22 /* local flavor with reversed layout */
56 /* read b using reversed layout */ in test_core_flavors()
/openbmc/linux/sound/soc/sunxi/
H A Dsun50i-codec-analog.c141 SOC_DAPM_DOUBLE_R("DAC Reversed Playback Switch",
165 SOC_DAPM_DOUBLE_R("Mixer Reversed Capture Switch",
403 { "Left Mixer", "DAC Reversed Playback Switch", "Right DAC" },
410 { "Right Mixer", "DAC Reversed Playback Switch", "Left DAC" },
417 { "Left ADC Mixer", "Mixer Reversed Capture Switch", "Right Mixer" },
424 { "Right ADC Mixer", "Mixer Reversed Capture Switch", "Left Mixer" },
H A Dsun8i-codec-analog.c122 SOC_DAPM_DOUBLE_R("DAC Reversed Playback Switch",
146 SOC_DAPM_DOUBLE_R("DAC Reversed Playback Switch",
162 SOC_DAPM_DOUBLE_R("Mixer Reversed Capture Switch",
186 SOC_DAPM_DOUBLE_R("Mixer Reversed Capture Switch",
293 { "Left Mixer", "DAC Reversed Playback Switch", "Right DAC" },
298 { "Right Mixer", "DAC Reversed Playback Switch", "Left DAC" },
303 { "Left ADC Mixer", "Mixer Reversed Capture Switch", "Right Mixer" },
308 { "Right ADC Mixer", "Mixer Reversed Capture Switch", "Left Mixer" },
/openbmc/linux/include/linux/
H A Dcrc32.h72 * is used. The output of crc32_le is bit reversed [most significant bit
73 * is in bit nr 0], thus it must be reversed before use. Except for
/openbmc/qemu/util/
H A Dqemu-coroutine-lock.c150 QSLIST_HEAD(, CoWaitRecord) reversed; in move_waiters()
151 QSLIST_MOVE_ATOMIC(&reversed, &mutex->from_push); in move_waiters()
152 while (!QSLIST_EMPTY(&reversed)) { in move_waiters()
153 CoWaitRecord *w = QSLIST_FIRST(&reversed); in move_waiters()
154 QSLIST_REMOVE_HEAD(&reversed, next); in move_waiters()
H A Dasync.c553 QSLIST_HEAD(, Coroutine) straight, reversed; in co_schedule_bh_cb()
555 QSLIST_MOVE_ATOMIC(&reversed, &ctx->scheduled_coroutines); in co_schedule_bh_cb()
558 while (!QSLIST_EMPTY(&reversed)) { in co_schedule_bh_cb()
559 Coroutine *co = QSLIST_FIRST(&reversed); in co_schedule_bh_cb()
560 QSLIST_REMOVE_HEAD(&reversed, co_scheduled_next); in co_schedule_bh_cb()
/openbmc/qemu/target/hexagon/
H A Dgen_decodetree.py29 tag: "".join(reversed(iset.iset[tag]["enc"].replace(" ", "")))
108 enc_str = "".join(reversed(encs[tag]))
155 for m in reversed(list(re.finditer(imm_letter + "+", enc))):
/openbmc/linux/include/linux/bcma/
H A Dbcma_regs.h24 #define BCMA_CLKCTLST_4328A0_HAVEHT 0x00010000 /* 4328a0 has reversed bits */
25 #define BCMA_CLKCTLST_4328A0_HAVEALP 0x00020000 /* 4328a0 has reversed bits */
/openbmc/u-boot/doc/imx/common/
H A Dimx27.txt10 reversed MAC byte order (i.e. LSB first).
/openbmc/linux/drivers/dma/ppc4xx/
H A Dadma.h139 * @reverse_flags: 1 if a corresponding rxor address uses reversed address order
175 #define PPC440SPE_DESC_RXOR_REV 12 /* CDB has srcs in reversed order */
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dwm8741.txt19 2 = stereo reversed
/openbmc/linux/tools/testing/selftests/rseq/
H A Drseq-arm.h31 * byte order reversed to generate the trap instruction:
48 * signature should not be reversed. However, the choice between BE32
/openbmc/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A Duncore-cache.json201 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
210 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
219 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
228 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
237 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
246 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
255 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
264 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
273 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
282 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
[all …]
/openbmc/linux/include/uapi/linux/
H A Dmdio.h270 #define MDIO_PMA_10GBT_SWAPPOL_AREV 0x0100 /* Pair A polarity reversed */
271 #define MDIO_PMA_10GBT_SWAPPOL_BREV 0x0200 /* Pair B polarity reversed */
272 #define MDIO_PMA_10GBT_SWAPPOL_CREV 0x0400 /* Pair C polarity reversed */
273 #define MDIO_PMA_10GBT_SWAPPOL_DREV 0x0800 /* Pair D polarity reversed */
325 #define MDIO_PMA_10T1L_STAT_POLARITY 0x0004 /* Receive polarity is reversed */
/openbmc/linux/arch/powerpc/crypto/
H A Daes-spe-regs.h34 #define rG0 r28 /* endian reversed tweak (XTS mode) */
H A Daes-spe-modes.S31 lwbrx reg,0,rSP; /* load reversed */ \
34 stwbrx reg,0,rDP; /* save reversed */ \
38 lwbrx reg,0,rIP; /* load reversed */ \
41 stwbrx reg,0,rIP; /* load reversed */ \
/openbmc/openbmc/meta-security/meta-tpm/recipes-tpm2/ibmswtpm2/
H A Dibmswtpm2_183-2024-03-27.bb9 * Application software errors are easily reversed by simply removing the TPM state and starting ove…
/openbmc/linux/drivers/gpio/
H A Dgpio-realtek-otto.c89 * Port order is reversed, meaning DCBA register layout for 1-bit
134 * Reversed port order register access
137 * register in reversed order. The two interrupt mask registers store two bits
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-adc-ad71927 the polarity of the excitation voltage is reversed on
/openbmc/linux/drivers/media/rc/
H A Dene_ir.h82 #define ENE_CIRCFG_REV_POL 0x04 /* Input polarity reversed */
87 #define ENE_CIRCFG_TX_POL_REV 0x40 /* TX polarity reversed */
/openbmc/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A Duncore-interconnect.json1531 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1540 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1549 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1558 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1567 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1576 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1585 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1594 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1603 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
1612 … on the counter-clockwise ring. On the right side of the ring, this is reversed. The first half …
[all …]

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