rank (full) in projects: openbmc - OpenGrok search results

Searched full:rank (Results 1 – 25 of 228) sorted by relevance

/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A D	uncore-memory.json	210 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 219 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 228 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 237 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 258 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 262 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 267 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 271 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 276 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 280 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A D	uncore-memory.json	177 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 186 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 195 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 204 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 225 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 229 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 234 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 238 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 243 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 247 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A D	uncore-memory.json	203 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 212 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 221 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 230 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 251 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 255 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 260 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 264 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 269 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 273 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A D	uncore-memory.json	221 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 230 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 239 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 248 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 271 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 275 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 280 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 284 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 289 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 293 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A D	uncore-memory.json	235 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 244 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 253 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 262 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 581 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 585 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 590 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 594 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 599 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 603 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A D	uncore-memory.json	177 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 186 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 195 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 204 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 225 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 229 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 234 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 238 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 243 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 247 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… [all …]
/openbmc/u-boot/arch/x86/cpu/quark/
H A D	mrc_util.h	83 void training_message(uint8_t channel, uint8_t rank, uint8_t byte_lane); 85 void set_rcvn(uint8_t channel, uint8_t rank, 87 uint32_t get_rcvn(uint8_t channel, uint8_t rank, uint8_t byte_lane); 88 void set_rdqs(uint8_t channel, uint8_t rank, 90 uint32_t get_rdqs(uint8_t channel, uint8_t rank, uint8_t byte_lane); 91 void set_wdqs(uint8_t channel, uint8_t rank, 93 uint32_t get_wdqs(uint8_t channel, uint8_t rank, uint8_t byte_lane); 94 void set_wdq(uint8_t channel, uint8_t rank, 96 uint32_t get_wdq(uint8_t channel, uint8_t rank, uint8_t byte_lane); 99 void set_wclk(uint8_t channel, uint8_t rank, uint32_t pi_count); [all …]
H A D	mrc_util.c	126 void training_message(uint8_t channel, uint8_t rank, uint8_t byte_lane) in training_message() argument 129 DPF(D_INFO, "CH%01X RK%01X BL%01X\n", channel, rank, byte_lane); in training_message() 135 * (currently doesn't comprehend rank) 137 void set_rcvn(uint8_t channel, uint8_t rank, in set_rcvn() argument 147 channel, rank, byte_lane, pi_count); in set_rcvn() 200 training_message(channel, rank, byte_lane); in set_rcvn() 209 * channel, rank, byte_lane as an absolute PI count. 211 * (currently doesn't comprehend rank) 213 uint32_t get_rcvn(uint8_t channel, uint8_t rank, uint8_t byte_lane) in get_rcvn() argument 259 * (currently doesn't comprehend rank) [all …]
/openbmc/linux/drivers/hwmon/peci/
H A D	dimmtemp.c	297 int rank = chan / priv->gen_info->dimm_idx_max; in create_dimm_temp_label() local 301 "DIMM %c%d", 'A' + rank, in create_dimm_temp_label() 432 * Device 20, Function 0: IMC 0 channel 0 -> rank 0 in read_thresholds_hsx() 433 * Device 20, Function 1: IMC 0 channel 1 -> rank 1 in read_thresholds_hsx() 434 * Device 21, Function 0: IMC 0 channel 2 -> rank 2 in read_thresholds_hsx() 435 * Device 21, Function 1: IMC 0 channel 3 -> rank 3 in read_thresholds_hsx() 436 * Device 23, Function 0: IMC 1 channel 0 -> rank 4 in read_thresholds_hsx() 437 * Device 23, Function 1: IMC 1 channel 1 -> rank 5 in read_thresholds_hsx() 438 * Device 24, Function 0: IMC 1 channel 2 -> rank 6 in read_thresholds_hsx() 439 * Device 24, Function 1: IMC 1 channel 3 -> rank 7 in read_thresholds_hsx() [all …]
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ddr/
H A D	jedec,lpddr-channel.yaml	`7 title: LPDDR channel with chip/rank topology description 34 channel is equal to the sum of the densities of each rank on the 51 "^rank@[0-9]+$": 56 transaction on the channel targets exactly one rank, based on the 70 "^rank@[0-9]+$": 79 "^rank@[0-9]+$": 88 "^rank@[0-9]+$": 97 "^rank@[0-9]+$": 116 rank@0 { 131 rank@0 { [all …]`
/openbmc/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A D	uncore-memory.json	112 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 121 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 130 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 139 …lter) on the given channel. Major modea are channel-wide, and not a per-rank (or dimm or bank) m… 160 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 164 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 169 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 173 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… 178 "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID", 182 …Number of cycles spent in CKE ON mode. The filter allows you to select a rank to monitor. If mul… [all …]
/openbmc/linux/Documentation/ABI/testing/
H A D	sysfs-devices-edac	86 What: /sys/devices/system/edac/mc/mc/(dimm\|rank)/size 90 Description: This attribute file will display the size of dimm or rank. 92 stick. For rank/size, this is the size, in MB for one rank 93 of the DIMM memory stick. On single rank memories (1R), this 94 is also the total size of the dimm. On dual rank (2R) memories, 97 What: /sys/devices/system/edac/mc/mc/(dimm\|rank)/dimm_dev_type 104 What: /sys/devices/system/edac/mc/mc/(dimm\|rank)/dimm_edac_mode 112 What: /sys/devices/system/edac/mc/mc/(dimm\|rank)/dimm_label 127 What: /sys/devices/system/edac/mc/mc/(dimm\|rank)*/dimm_location 132 branch/channel/slot or channel/slot) of the dimm or rank. [all …]
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Control/
H A D	PowerSupplyRedundancy.interface.yaml	`22 The rank order for each PSU, 0 means will not go into cold standby 28 Specific, and rotation is enabled, BMC will change PSU rank order 52 1 to the rank order in each PSU and change the last rank order 53 to the first rank order. 58 will update the rank order to PSU.`
/openbmc/u-boot/doc/
H A D	README.fsl-ddr	28 \| \| Rank Interleaving \| 49 interleaving using "2x2" rank interleaving, it only interleaves {CS0+CS1} 50 from each controller. {CS2+CS3} on each controller are only rank 157 For single-slot system with quad-rank DIMM and dual-slot system, dynamic ODT may 167 \| \| \| \| \| \| Rank 1 \| Rank 2 \| Rank 1 \| Rank 2 \| 172 \| Dual Rank \| Dual Rank \|----------+-------+-------+-------+------+-------+------+-------+------+--… 176 \| Dual Rank \|Single Rank\|----------+-------+-------+-------+------+-------+------+-------+------+--… 180 \|Single Rank\| Dual Rank \|----------+-------+-------+-------+------+-------+------+-------+------+--… 184 \|Single Rank\|Single Rank\|----------+-------+-------+-------+------+-------+------+-------+------+--… 187 \| Dual Rank \| Empty \| Slot 1 \| off \| 75 \| 40 \| off \| off \| off \| \| \| \| \| [all …]
/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A D	ddrphy-training.c	21 void ddrphy_prepare_training(void __iomem phy_base, int rank) in ddrphy_prepare_training() argument 29 / Specify the rank that should be write leveled / in ddrphy_prepare_training() 31 tmp \|= (1 << (PHY_DX_GCR_WLRKEN_SHIFT + rank)) & in ddrphy_prepare_training() 38 / Specify the rank used during data bit deskew and eye centering / in ddrphy_prepare_training() 40 tmp \|= (rank << PHY_DTCR_DTRANK_SHIFT) & PHY_DTCR_DTRANK_MASK; in ddrphy_prepare_training() 43 / Specify the rank enabled for data-training */ in ddrphy_prepare_training() 45 tmp \|= (1 << (PHY_DTCR_RANKEN_SHIFT + rank)) & PHY_DTCR_RANKEN_MASK; in ddrphy_prepare_training()
H A D	cmd_ddrphy.c	`142 int rank; in __wld_dump() local 146 for (rank = 0; rank < 4; rank++) { in __wld_dump() 147 u32 wld = (lcdlr0 >> (8 * rank)) & 0xff; /* Delay / in __wld_dump() 148 u32 wlsl = (gtr >> (12 + 2 rank)) & 0x3; /* System Latency / in __wld_dump() 165 int rank; in __dqsgd_dump() local 169 for (rank = 0; rank < 4; rank++) { in __dqsgd_dump() 170 u32 dqsgd = (lcdlr2 >> (8 rank)) & 0xff; /* Delay / in __dqsgd_dump() 171 u32 dgsl = (gtr >> (3 rank)) & 0x7; /* System Latency */ in __dqsgd_dump()`
H A D	cmd_ddrmphy.c	`168 int rank; in __wld_dump() local 172 for (rank = 0; rank < 4; rank++) { in __wld_dump() 173 u32 wld = (lcdlr0 >> (8 * rank)) & 0xff; /* Delay / in __wld_dump() 174 u32 wlsl = (gtr >> (12 + 2 rank)) & 0x3; /* System Latency / in __wld_dump() 191 int rank; in __dqsgd_dump() local 195 for (rank = 0; rank < 4; rank++) { in __dqsgd_dump() 196 u32 dqsgd = (lcdlr2 >> (8 rank)) & 0xff; /* Delay / in __dqsgd_dump() 197 u32 dgsl = (gtr >> (3 rank)) & 0x7; /* System Latency */ in __dqsgd_dump()`
/openbmc/u-boot/arch/arm/mach-sunxi/
H A D	dram_sun8i_a33.c	26 u8 rank; member 42 MCTL_CR_BANK(para->bank) \| MCTL_CR_RANK(para->rank), in mctl_set_cr() 48 u8 orig_rank = para->rank; in auto_detect_dram_size() 55 para->rank = 1; in auto_detect_dram_size() 72 para->rank = orig_rank; in auto_detect_dram_size() 150 /* Set two rank timing and exit self-refresh timing / in auto_set_timing_para() 184 if (para->rank == 2) in mctl_data_train_cfg() 230 / Auto detect dram config, set 2 rank and 16bit bus-width / in mctl_channel_init() 232 para->rank = 2; in mctl_channel_init() 258 / DRAM has only one rank */ in mctl_channel_init() [all …]
H A D	dram_sun8i_a83t.c	24 u8 rank; member 41 MCTL_CR_BANK(para->bank) \| MCTL_CR_RANK(para->rank), in mctl_set_cr() 47 u8 orig_rank = para->rank; in auto_detect_dram_size() 54 para->rank = 1; in auto_detect_dram_size() 71 para->rank = orig_rank; in auto_detect_dram_size() 182 /* Set two rank timing and exit self-refresh timing / in auto_set_timing_para() 216 if (para->rank == 2) in mctl_data_train_cfg() 313 / Auto detect dram config, set 2 rank and 16bit bus-width / in mctl_channel_init() 315 para->rank = 2; in mctl_channel_init() 350 / DRAM has only one rank */ in mctl_channel_init() [all …]
H A D	dram_sun6i.c	24 u8 rank; member 91 static bool mctl_rank_detect(u32 gsr0, int rank) in mctl_rank_detect() argument 93 const u32 done = MCTL_DX_GSR0_RANK0_TRAIN_DONE << rank; in mctl_rank_detect() 94 const u32 err = MCTL_DX_GSR0_RANK0_TRAIN_ERR << rank; in mctl_rank_detect() 164 / rank detect / in mctl_channel_init() 166 para->rank = 1; in mctl_channel_init() 171 channel detect, check channel 1 dx0 and dx1 have rank 0, if not in mctl_channel_init() 180 /* bus width detect, if dx2 and dx3 don't have rank 0, assume 16 bit */ in mctl_channel_init() 274 MCTL_CR_BANK(1) \| MCTL_CR_RANK(para->rank), &mctl_com->cr); in mctl_com_init() 339 .rank = 2, in sunxi_dram_init() [all …]
/openbmc/u-boot/drivers/ram/rockchip/
H A D	sdram_rk3188.c	309 static void send_command(struct rk3288_ddr_pctl *pctl, u32 rank, in send_command() argument 312 writel((START_CMD \| (rank << 20) \| arg \| cmd), &pctl->mcmd); in send_command() 319 u32 rank, u32 cmd, u32 ma, u32 op) in send_command_op() argument 321 send_command(pctl, rank, cmd, (ma & LPDDR2_MA_MASK) << LPDDR2_MA_SHIFT \| in send_command_op() 419 u32 rank; in data_training() local 430 rank = sdram_params->ch[channel].rank \| 1; in data_training() 444 while ((readl(&publ->datx8[0].dxgsr[0]) & rank) in data_training() 445 != rank) in data_training() 447 while ((readl(&publ->datx8[1].dxgsr[0]) & rank) in data_training() 448 != rank) in data_training() [all …]
/openbmc/linux/drivers/s390/cio/
H A D	scm.c	`104 scm_attr(rank); 141 scmdev->attrs.rank = sale->rank; in scmdev_setup() 145 scmdev->attrs.rank = sale->rank; in scmdev_setup() 163 changed = scmdev->attrs.rank != sale->rank \|\| in scmdev_update() 165 scmdev->attrs.rank = sale->rank; in scmdev_update()`
/openbmc/linux/drivers/edac/
H A D	i3200_edac.c	69 #define I3200_C0DRB 0x200 /* Channel 0 DRAM Rank Boundary (16b x 4) 72 * 9:0 Channel 0 DRAM Rank Boundary Address 74 #define I3200_C1DRB 0x600 /* Channel 1 DRAM Rank Boundary (16b x 4) / 83 28:27 Error Rank Address (ERRRANK) 137 u64 rank = ((log & I3200_ECCERRLOG_RANK_BITS) >> in eccerrlog_row() local 139 return rank \| (channel * I3200_RANKS_PER_CHANNEL); in eccerrlog_row() 317 int channel, int rank) in drb_to_nr_pages() argument 321 n = drbs[channel][rank]; in drb_to_nr_pages() 325 if (rank > 0) in drb_to_nr_pages() 326 n -= drbs[channel][rank - 1]; in drb_to_nr_pages() [all …]
H A D	x38_edac.c	69 #define X38_C0DRB 0x200 /* Channel 0 DRAM Rank Boundary (16b x 4) 72 * 9:0 Channel 0 DRAM Rank Boundary Address 74 #define X38_C1DRB 0x600 /* Channel 1 DRAM Rank Boundary (16b x 4) / 83 28:27 Error Rank Address (ERRRANK) 301 bool stacked, int channel, int rank) in drb_to_nr_pages() argument 305 n = drbs[channel][rank]; in drb_to_nr_pages() 306 if (rank > 0) in drb_to_nr_pages() 307 n -= drbs[channel][rank - 1]; in drb_to_nr_pages() 308 if (stacked && (channel == 1) && drbs[channel][rank] == in drb_to_nr_pages() 366 * The dram rank boundary (DRB) reg values are boundary addresses in x38_probe1() [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A D	uncore-memory.json	220 "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID", 224 …cription": "CKE_ON_CYCLES by Rank : DIMM ID : Number of cycles spent in CKE ON mode. The filter a… 229 "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID", 233 …cription": "CKE_ON_CYCLES by Rank : DIMM ID : Number of cycles spent in CKE ON mode. The filter a… 238 "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID", 242 …cription": "CKE_ON_CYCLES by Rank : DIMM ID : Number of cycles spent in CKE ON mode. The filter a… 247 "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID", 251 …cription": "CKE_ON_CYCLES by Rank : DIMM ID : Number of cycles spent in CKE ON mode. The filter a… 256 "BriefDescription": "Throttle Cycles for Rank 0", 260 …Rank 0 : Counts the number of cycles while the iMC is being throttled by either thermal constraint… [all …]

12 3 4 5 6 7 8 9 10

Project(s)

Full Search
Definition
Symbol
File Path
History
Type