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/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dpl011.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: serial.yaml#
22 - arm,pl011
24 - compatible
29 - const: arm,pl011
30 - const: arm,primecell
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/openbmc/linux/include/linux/
H A Diopoll.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2012-2014 The Linux Foundation. All rights reserved.
17 * read_poll_timeout - Periodically poll an address until a condition is
18 * met or a timeout occurs
23 * tight-loops). Should be less than ~20ms since usleep_range
24 * is used (see Documentation/timers/timers-howto.rst).
25 * @timeout_us: Timeout in us, 0 means never timeout
27 * @args: arguments for @op poll
29 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
58 (cond) ? 0 : -ETIMEDOUT; \
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/openbmc/u-boot/arch/arm/mach-at91/
H A Dphy.c1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2007-2008
25 unsigned long const timeout = 1000; /* 1000ms */ in at91_phy_reset() local
28 erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; in at91_phy_reset()
31 * Need to reset PHY -> 500ms reset in at91_phy_reset()
32 * Reset PHY by pulling the NRST line for 500ms to low. To do so in at91_phy_reset()
33 * disable user reset for low level on NRST pin and poll the NRST in at91_phy_reset()
37 AT91_RSTC_MR_URSTEN, &rstc->mr); in at91_phy_reset()
39 writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); in at91_phy_reset()
42 while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) { in at91_phy_reset()
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/openbmc/linux/sound/soc/intel/common/
H A Dsst-dsp.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/io-64-nonatomic-lo-hi.h>
16 #include "sst-dsp.h"
17 #include "sst-dsp-priv.h"
20 #include <trace/events/intel-sst.h>
22 /* Internal generic low-level SST IO functions - can be overidden */
52 spin_lock_irqsave(&sst->spinlock, flags); in sst_dsp_shim_write()
53 sst->ops->write(sst->addr.shim, offset, value); in sst_dsp_shim_write()
54 spin_unlock_irqrestore(&sst->spinlock, flags); in sst_dsp_shim_write()
63 spin_lock_irqsave(&sst->spinlock, flags); in sst_dsp_shim_read()
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/openbmc/linux/arch/powerpc/include/asm/
H A Ddelay.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
23 * is supposed to take 1ms, the hypervisor could sleep our partition for
24 * longer (eg 10ms). With the right timing these errors can add up.
34 * spin_event_timeout - spin until a condition gets true or a timeout elapses
36 * @timeout: timeout, in microseconds
40 * The process spins until the condition evaluates to true (non-zero) or the
41 * timeout elapses. The return value of this macro is the value of
44 * timeout has occurred.
46 * This primary purpose of this macro is to poll on a hardware register
47 * until a status bit changes. The timeout ensures that the loop still
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/openbmc/linux/drivers/usb/host/
H A Dehci-timer.c1 // SPDX-License-Identifier: GPL-2.0+
6 /* This file is part of ehci-hcd.c */
8 /*-------------------------------------------------------------------------*/
13 ehci->command |= bit; in ehci_set_command_bit()
14 ehci_writel(ehci, ehci->command, &ehci->regs->command); in ehci_set_command_bit()
17 ehci_readl(ehci, &ehci->regs->command); in ehci_set_command_bit()
23 ehci->command &= ~bit; in ehci_clear_command_bit()
24 ehci_writel(ehci, ehci->command, &ehci->regs->command); in ehci_clear_command_bit()
27 ehci_readl(ehci, &ehci->regs->command); in ehci_clear_command_bit()
30 /*-------------------------------------------------------------------------*/
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/openbmc/u-boot/drivers/ddr/fsl/
H A Dmpc85xx_ddr_gen3.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2008-2012 Freescale Semiconductor, Inc.
16 * regs has the to-be-set values for DDR controller registers
31 int timeout; in fsl_ddr_set_memctl_regs() local
36 int csn = -1; in fsl_ddr_set_memctl_regs()
69 if (regs->ddr_eor) in fsl_ddr_set_memctl_regs()
70 out_be32(&ddr->eor, regs->ddr_eor); in fsl_ddr_set_memctl_regs()
74 cs_sa = (regs->cs[i].bnds >> 16) & 0xfff; in fsl_ddr_set_memctl_regs()
75 cs_ea = regs->cs[i].bnds & 0xfff; in fsl_ddr_set_memctl_regs()
78 csn_bnds_backup = regs->cs[i].bnds; in fsl_ddr_set_memctl_regs()
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/openbmc/u-boot/drivers/fpga/
H A Dsocfpga_arria10.c1 // SPDX-License-Identifier: GPL-2.0
22 #define FPGA_TIMEOUT_MSEC 1000 /* timeout in ms */
37 reg = readl(&fpga_manager_base->imgcfg_stat); in fpgamgr_get_msel()
47 setbits_le32(&fpga_manager_base->imgcfg_ctrl_02, in fpgamgr_set_cfgwdth()
50 clrbits_le32(&fpga_manager_base->imgcfg_ctrl_02, in fpgamgr_set_cfgwdth()
56 return (readl(&fpga_manager_base->imgcfg_stat) & in is_fpgamgr_user_mode()
62 return wait_for_bit_le32(&fpga_manager_base->imgcfg_stat, in wait_for_user_mode()
69 return (readl(&fpga_manager_base->imgcfg_stat) & in is_fpgamgr_early_user_mode()
81 cd_ratio = (readl(&fpga_manager_base->imgcfg_ctrl_02) & in fpgamgr_wait_early_user_mode()
90 return -ETIMEDOUT; in fpgamgr_wait_early_user_mode()
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/openbmc/linux/drivers/usb/misc/
H A Dlegousbtower.c1 // SPDX-License-Identifier: GPL-2.0+
6 * 2001-2004 Juergen Stuber <starblue@users.sourceforge.net>
8 * derived from USB Skeleton driver - 0.5
9 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
13 * 2001-10-13 - 0.1 js
14 * - first version
15 * 2001-11-03 - 0.2 js
16 * - simplified buffering, one-shot URBs for writing
17 * 2001-11-10 - 0.3 js
18 * - removed IOCTL (setting power/mode is more complicated, postponed)
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/openbmc/libpldm/src/transport/
H A Dtransport.c1 /* SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later */
12 #include <poll.h>
27 static inline int poll(struct pollfd *fds LIBPLDM_CC_UNUSED, in poll() function
29 int timeout LIBPLDM_CC_UNUSED) in poll()
36 int pldm_transport_poll(struct pldm_transport *transport, int timeout) in pldm_transport_poll() argument
45 if (!transport->init_pollfd) { in pldm_transport_poll()
49 rc = transport->init_pollfd(transport, &pollfd); in pldm_transport_poll()
54 rc = poll(&pollfd, 1, timeout); in pldm_transport_poll()
59 /* rc is 0 if poll(2) times out, or 1 if pollfd becomes active. */ in pldm_transport_poll()
77 return transport->send(transport, tid, pldm_msg, msg_len); in pldm_transport_send_msg()
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/openbmc/linux/drivers/net/wireless/ti/wl1251/
H A Dps.c1 // SPDX-License-Identifier: GPL-2.0-only
13 /* in ms */
26 mutex_lock(&wl->mutex); in wl1251_elp_work()
28 if (wl->elp || wl->station_mode == STATION_ACTIVE_MODE) in wl1251_elp_work()
33 wl->elp = true; in wl1251_elp_work()
36 mutex_unlock(&wl->mutex); in wl1251_elp_work()
46 if (wl->station_mode != STATION_ACTIVE_MODE) { in wl1251_ps_elp_sleep()
48 ieee80211_queue_delayed_work(wl->hw, &wl->elp_work, delay); in wl1251_ps_elp_sleep()
54 unsigned long timeout, start; in wl1251_ps_elp_wakeup() local
57 cancel_delayed_work(&wl->elp_work); in wl1251_ps_elp_wakeup()
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/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dreset_manager_arria10.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2017 Intel Corporation
66 setbits_le32(&reset_manager_base->per1modrst, in socfpga_watchdog_disable()
73 clrbits_le32(&reset_manager_base->brgmodrst, in socfpga_reset_deassert_noc_ddr_scheduler()
85 return fdtdec_get_uint(blob, node, "init-val", 0); in get_bridge_init_val()
95 if (get_bridge_init_val(gd->fdt_blob, in socfpga_reset_deassert_bridges_handoff()
103 setbits_le32(&sysmgr_regs->noc_idlereq_clr, mask_noc); in socfpga_reset_deassert_bridges_handoff()
106 clrbits_le32(&reset_manager_base->brgmodrst, mask_rstmgr); in socfpga_reset_deassert_bridges_handoff()
108 /* Poll until all idleack to 0, timeout at 1000ms */ in socfpga_reset_deassert_bridges_handoff()
109 return wait_for_bit_le32(&sysmgr_regs->noc_idleack, mask_noc, in socfpga_reset_deassert_bridges_handoff()
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/openbmc/linux/drivers/rtc/
H A Drtc-mc146818-lib.c1 // SPDX-License-Identifier: GPL-2.0-only
16 * Execute a function while the UIP (Update-in-progress) bit of the RTC is
17 * unset. The timeout is configurable by the caller in ms.
22 int timeout, in mc146818_avoid_UIP() argument
29 for (i = 0; UIP_RECHECK_LOOPS_MS(i) < timeout; i++) { in mc146818_avoid_UIP()
34 * readout is unspecified. The maximum update time is ~2ms. Poll in mc146818_avoid_UIP()
81 pr_warn("Reading current time from RTC took around %li ms\n", in mc146818_avoid_UIP()
91 * If the UIP (Update-in-progress) bit of the RTC is set for more then
92 * 10ms, the RTC is apparently broken or not present.
119 * by the RTC when initially set to a non-zero value. in mc146818_get_time_callback()
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/openbmc/u-boot/board/keymile/kmp204x/
H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright 2007-2011 Freescale Semiconductor, Inc.
35 /* approx 10ms */ in trigger_fpga_config()
36 u32 timeout = 10000; in trigger_fpga_config() local
53 if (timeout-- == 0) { in trigger_fpga_config()
54 printf("FPGA_INIT timeout\n"); in trigger_fpga_config()
55 ret = -EFAULT; in trigger_fpga_config()
67 /* poll the FPGA_DONE signal and give the EEPROM back to the QorIQ */
72 u32 timeout = 500000; in wait_for_fpga_config() local
77 if (timeout-- == 0) { in wait_for_fpga_config()
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/openbmc/linux/drivers/parport/
H A Dieee1284.c2 * IEEE-1284 implementation for parport.
5 * Carsten Gross <carsten@sol.wohnheim.uni-ulm.de>
10 * read/write requests to low-level drivers.
38 up (&port->physport->ieee1284.irq); in parport_ieee1284_wakeup()
49 * parport_wait_event - wait for an event on a parallel port
51 * @timeout: time to wait (in jiffies)
53 * This function waits for up to @timeout jiffies for an
54 * interrupt to occur on a parallel port. If the port timeout is
57 * If an interrupt occurs before the timeout period elapses, this
64 int parport_wait_event (struct parport *port, signed long timeout) in parport_wait_event() argument
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/openbmc/linux/fs/
H A Deventpoll.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <linux/poll.h>
47 * 2) ep->mtx (mutex)
48 * 3) ep->lock (rwlock)
51 * We need a rwlock (ep->lock) because we manipulate objects
52 * from inside the poll callback, that might be triggered from
54 * So we can't sleep inside the poll callback and hence we need
58 * mutex (ep->mtx). It is acquired during the event transfer loop,
67 * It is necessary to acquire multiple "ep->mtx"es at once in the
70 * epoll_ctl(e1, EPOLL_CTL_ADD, e2), e1->mtx will always be acquired
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/openbmc/linux/drivers/gpu/drm/i915/
H A Dintel_pcode.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2013-2021 Intel Corporation
16 return -ENODEV; in gen6_check_mailbox_status()
18 return -ENXIO; in gen6_check_mailbox_status()
21 return -EOVERFLOW; in gen6_check_mailbox_status()
23 return -ETIMEDOUT; in gen6_check_mailbox_status()
36 return -ENXIO; in gen7_check_mailbox_status()
38 return -ETIMEDOUT; in gen7_check_mailbox_status()
40 return -EINVAL; in gen7_check_mailbox_status()
42 return -ENXIO; in gen7_check_mailbox_status()
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/openbmc/linux/drivers/mmc/core/
H A Dmmc_ops.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2006-2007 Pierre Ossman
24 #define MMC_OP_COND_PERIOD_US (4 * 1000) /* 4ms */
75 if (!mmc_host_is_spi(card->host)) in __mmc_send_status()
76 cmd.arg = card->rca << 16; in __mmc_send_status()
79 err = mmc_wait_for_cmd(card->host, &cmd, retries); in __mmc_send_status()
106 cmd.arg = card->rca << 16; in _mmc_select_card()
119 return _mmc_select_card(card->host, card); in mmc_select_card()
141 cmd.arg = (host->dsr << 16) | 0xffff; in mmc_set_dsr()
153 * Non-SPI hosts need to prevent chipselect going active during in mmc_go_idle()
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/openbmc/phosphor-ipmi-flash/tools/
H A Dhelper.cpp8 * http://www.apache.org/licenses/LICENSE-2.0
42 constexpr auto timeout = 30min; in pollStat() local
49 auto check_interval = 50ms; in pollStat()
53 ipmiblob::StatResponse resp = blob->getStat(session); in pollStat()
62 if (cur - last_print >= printInterval) in pollStat()
68 auto sleep = check_interval - (cur - last_check); in pollStat()
70 // Check that we don't timeout immediately after sleeping in pollStat()
72 if (cur - start > timeout - sleep) in pollStat()
88 /* Poll an open verification session. Handling closing the session is not yet
94 [](const ipmiblob::StatResponse& resp) -> std::optional<bool> { in pollStatus()
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/openbmc/linux/drivers/scsi/qla2xxx/
H A Dqla_nx2.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2003-2014 QLogic Corporation
36 return readl((void __iomem *) (ha->nx_pcibase + addr)); in qla8044_rd_reg()
42 writel(val, (void __iomem *)((ha)->nx_pcibase + addr)); in qla8044_wr_reg()
49 struct qla_hw_data *ha = vha->hw; in qla8044_rd_direct()
62 struct qla_hw_data *ha = vha->hw; in qla8044_wr_direct()
73 struct qla_hw_data *ha = vha->hw; in qla8044_set_win_base()
75 qla8044_wr_reg(ha, QLA8044_CRB_WIN_FUNC(ha->portnum), addr); in qla8044_set_win_base()
76 val = qla8044_rd_reg(ha, QLA8044_CRB_WIN_FUNC(ha->portnum)); in qla8044_set_win_base()
92 struct qla_hw_data *ha = vha->hw; in qla8044_rd_reg_indirect()
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/openbmc/linux/drivers/media/common/saa7146/
H A Dsaa7146_i2c.c1 // SPDX-License-Identifier: GPL-2.0
4 #include <media/drv-intf/saa7146_vv.h>
8 /* DEB_I2C("'%s'\n", adapter->name); */ in saa7146_i2c_func()
16 /* this function returns the status-register of our i2c-device */
24 /* this function runs through the i2c-messages and prepares the data to be
26 to understand this. it returns the number of u32s to send, or -1
41 mem = 1 + ((mem-1) / 3); in saa7146_i2c_msg_prepare()
47 /* DEB_I2C("cannot prepare i2c-message\n"); */ in saa7146_i2c_msg_prepare()
48 return -ENOMEM; in saa7146_i2c_msg_prepare()
51 /* be careful: clear out the i2c-mem first */ in saa7146_i2c_msg_prepare()
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/openbmc/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_82598.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
25 * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
28 * The defaults for 82598 should be in the range of 50us to 50ms,
29 * however the hardware default for these parts is 500us to 1ms which is less
30 * than the 10ms recommended by the pci-e spec. To address this we need to
31 * increase the value to either 10ms to 250ms for capability version 1 config,
32 * or 16ms to 55ms for version 2.
39 if (ixgbe_removed(hw->hw_addr)) in ixgbe_set_pcie_completion_timeout()
42 /* only take action if timeout value is defaulted to 0 */ in ixgbe_set_pcie_completion_timeout()
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/openbmc/linux/include/linux/mmc/
H A Dcore.h1 /* SPDX-License-Identifier: GPL-2.0-only */
40 #define MMC_CMD_MASK (3 << 5) /* non-SPI command type */
66 /* Can be used by core to poll after switch to MMC HS mode */
69 #define mmc_resp_type(cmd) ((cmd)->flags & (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY|MM…
84 #define mmc_spi_resp_type(cmd) ((cmd)->flags & \
90 #define mmc_cmd_type(cmd) ((cmd)->flags & MMC_CMD_MASK)
109 unsigned int busy_timeout; /* busy detect timeout in ms */
115 unsigned int timeout_ns; /* data timeout (in ns, max 80ms) */
116 unsigned int timeout_clks; /* data timeout (in clocks) */
/openbmc/linux/drivers/media/tuners/
H A Dit913x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
28 struct it913x_dev *dev = fe->tuner_priv; in it913x_init()
29 struct platform_device *pdev = dev->pdev; in it913x_init()
34 unsigned long timeout; in it913x_init() local
36 dev_dbg(&pdev->dev, "role %u\n", dev->role); in it913x_init()
38 ret = regmap_write(dev->regmap, 0x80ec4c, 0x68); in it913x_init()
44 ret = regmap_read(dev->regmap, 0x80ec86, &utmp); in it913x_init()
51 dev->clk_mode = utmp; in it913x_init()
52 dev->xtal = 2000; in it913x_init()
53 dev->fdiv = 3; in it913x_init()
[all …]
/openbmc/linux/drivers/input/touchscreen/
H A Dwm9713.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm9713.c -- Codec touch driver for Wolfson WM9713 AC97 Codec.
73 * Long delays > 1ms are supported for completeness, but are not
87 MODULE_PARM_DESC(five_wire, "Set to '1' to use 5-wire touchscreen.");
110 * for every poll.
139 * Delay after issuing a POLL command.
163 dev_info(wm->dev, "setting pen detect pull-up to %d Ohms\n", in wm9713_phy_init()
170 dev_info(wm->dev, "setting 5-wire touchscreen mode."); in wm9713_phy_init()
173 dev_warn(wm->dev, in wm9713_phy_init()
183 dev_info(wm->dev, in wm9713_phy_init()
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