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/openbmc/linux/drivers/regulator/
H A Dmax77620-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
21 #define max77620_rails(_name) "max77620-"#_name
99 static int max77620_regulator_get_fps_src(struct max77620_regulator *pmic, in max77620_regulator_get_fps_src() argument
100 int id) in max77620_regulator_get_fps_src() argument
102 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; in max77620_regulator_get_fps_src()
106 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val); in max77620_regulator_get_fps_src()
108 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n", in max77620_regulator_get_fps_src()
109 rinfo->fps_addr, ret); in max77620_regulator_get_fps_src()
116 static int max77620_regulator_set_fps_src(struct max77620_regulator *pmic, in max77620_regulator_set_fps_src() argument
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H A Dpalmas-regulator.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Regulator part of Palmas PMIC Chips
5 * Copyright 2011-2013 Texas Instruments Inc.
42 .sname = "smps1-in",
50 .sname = "smps1-in",
58 .sname = "smps3-in",
65 .sname = "smps4-in",
73 .sname = "smps4-in",
81 .sname = "smps6-in",
89 .sname = "smps7-in",
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H A Dtps65910-regulator.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * tps65910.c -- TI tps65910
274 #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits)) argument
319 static int tps65910_get_ctrl_register(int id) in tps65910_get_ctrl_register() argument
321 switch (id) { in tps65910_get_ctrl_register()
351 return -EINVAL; in tps65910_get_ctrl_register()
355 static int tps65911_get_ctrl_register(int id) in tps65911_get_ctrl_register() argument
357 switch (id) { in tps65911_get_ctrl_register()
385 return -EINVAL; in tps65911_get_ctrl_register()
391 struct tps65910_reg *pmic = rdev_get_drvdata(dev); in tps65910_set_mode() local
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H A Disl6271a-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * isl6271a-regulator.c
23 /* PMIC details */
31 struct isl_pmic *pmic = rdev_get_drvdata(dev); in isl6271a_get_voltage_sel() local
34 mutex_lock(&pmic->mtx); in isl6271a_get_voltage_sel()
36 idx = i2c_smbus_read_byte(pmic->client); in isl6271a_get_voltage_sel()
38 dev_err(&pmic->client->dev, "Error getting voltage\n"); in isl6271a_get_voltage_sel()
40 mutex_unlock(&pmic->mtx); in isl6271a_get_voltage_sel()
47 struct isl_pmic *pmic = rdev_get_drvdata(dev); in isl6271a_set_voltage_sel() local
50 mutex_lock(&pmic->mtx); in isl6271a_set_voltage_sel()
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H A Dmax8907-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max8907-regulator.c -- support regulators in max8907
5 * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com>
6 * Copyright (C) 2010-2012, NVIDIA CORPORATION. All rights reserved.
8 * Portions based on drivers/regulator/tps65910-regulator.c,
40 .id = MAX8907_MBATT, \
50 .id = MAX8907_##ids, \
51 .n_voltages = ((max) - (min)) / (step) + 1, \
67 .id = MAX8907_##ids, \
79 .id = MAX8907_##ids, \
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H A Dwm8350-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
3 // wm8350.c -- Voltage and current regulation for the Wolfson WM8350 PMIC
17 #include <linux/mfd/wm8350/pmic.h>
101 switch (wm8350->pmic.isink_A_dcdc) { in wm8350_isink_enable()
109 1 << (wm8350->pmic.isink_A_dcdc - in wm8350_isink_enable()
113 return -EINVAL; in wm8350_isink_enable()
117 switch (wm8350->pmic.isink_B_dcdc) { in wm8350_isink_enable()
125 1 << (wm8350->pmic.isink_B_dcdc - in wm8350_isink_enable()
129 return -EINVAL; in wm8350_isink_enable()
133 return -EINVAL; in wm8350_isink_enable()
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H A Ds5m8767.c1 // SPDX-License-Identifier: GPL-2.0+
170 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); in s5m8767_get_register()
173 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); in s5m8767_get_register()
179 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9; in s5m8767_get_register()
185 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2; in s5m8767_get_register()
188 return -EINVAL; in s5m8767_get_register()
191 for (i = 0; i < s5m8767->num_regulators; i++) { in s5m8767_get_register()
192 if (s5m8767->opmode[i].id == reg_id) { in s5m8767_get_register()
193 mode = s5m8767->opmode[i].mode; in s5m8767_get_register()
198 if (i >= s5m8767->num_regulators) in s5m8767_get_register()
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H A Dmcp16502.c1 // SPDX-License-Identifier: GPL-2.0
3 // MCP16502 PMIC driver
9 // Inspired from tps65086-regulator.c
29 * The PMIC has four sets of registers corresponding to four power modes:
30 * Performance, Active, Low-power, Hibernate.
37 * In order for the PMIC to transition to operating modes it has to be
41 * a low-power state while the PMIC is in Active mode. They are supposed to be
42 * configured at startup and then simply transition to/from a global low-power
45 * This driver keeps the PMIC in Active mode, Low-power state is set for the
48 * The PMIC's Low-power and Hibernate modes are used during standby/suspend.
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/openbmc/linux/drivers/mfd/
H A Dhi6421-pmic-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device driver for Hi6421 PMIC
5 * Copyright (c) <2011-2014> HiSilicon Technologies Co., Ltd.
7 * Copyright (c) <2013-2017> Linaro Ltd.
16 #include <linux/mfd/hi6421-pmic.h>
23 { .name = "hi6421-regulator", },
27 { .name = "hi6421v530-regulator", },
39 .compatible = "hisilicon,hi6421-pmic",
43 .compatible = "hisilicon,hi6421v530-pmic",
52 struct hi6421_pmic *pmic; in hi6421_pmic_probe() local
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H A Dintel_soc_pmic_chtwc.c1 // SPDX-License-Identifier: GPL-2.0
3 * MFD core driver for Intel Cherrytrail Whiskey Cove PMIC
7 * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
8 * Copyright (C) 2013-2015 Intel Corporation. All rights reserved.
22 /* PMIC device registers */
30 /* Whiskey Cove PMIC share same ACPI ID between different platforms */
76 int ret, orig_addr = client->addr; in cht_wc_byte_reg_read()
79 dev_err(&client->dev, "Error I2C address not specified\n"); in cht_wc_byte_reg_read()
80 return -EINVAL; in cht_wc_byte_reg_read()
83 client->addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT; in cht_wc_byte_reg_read()
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H A Dmt6397-core.c1 // SPDX-License-Identifier: GPL-2.0-only
113 .name = "mt6323-rtc",
116 .of_compatible = "mediatek,mt6323-rtc",
118 .name = "mt6323-regulator",
119 .of_compatible = "mediatek,mt6323-regulator"
121 .name = "mt6323-led",
122 .of_compatible = "mediatek,mt6323-led"
124 .name = "mtk-pmic-keys",
127 .of_compatible = "mediatek,mt6323-keys"
129 .name = "mt6323-pwrc",
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/openbmc/linux/Documentation/devicetree/bindings/spmi/
H A Dqcom,spmi-pmic-arb.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/spmi/qcom,spmi-pmic-arb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SPMI Controller (PMIC Arbiter)
10 - Stephen Boyd <sboyd@kernel.org>
13 The SPMI PMIC Arbiter is found on Snapdragon chipsets. It is an SPMI
14 controller with wrapping arbitration logic to allow for multiple on-chip
17 The PMIC Arbiter can also act as an interrupt controller, providing interrupts
21 - $ref: spmi.yaml
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H A Dhisilicon,hisi-spmi-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spmi/hisilicon,hisi-spmi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
13 The HiSilicon SPMI BUS controller is found on some Kirin-based designs.
16 The PMIC part is provided by
17 Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml.
20 - $ref: spmi.yaml#
25 pattern: "spmi@[0-9a-f]"
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/openbmc/u-boot/board/freescale/common/
H A Dpfuze.c1 // SPDX-License-Identifier: GPL-2.0+
8 #include <power/pmic.h>
12 int pfuze_mode_init(struct pmic *p, u32 mode) in pfuze_mode_init()
15 u32 id; in pfuze_mode_init() local
18 pmic_reg_read(p, PFUZE100_DEVICEID, &id); in pfuze_mode_init()
19 id = id & 0xf; in pfuze_mode_init()
21 if (id == 0) { in pfuze_mode_init()
24 } else if (id == 1) { in pfuze_mode_init()
28 printf("Not supported, id=%d\n", id); in pfuze_mode_init()
29 return -EINVAL; in pfuze_mode_init()
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/openbmc/linux/drivers/extcon/
H A Dextcon-intel-mrfld.c1 // SPDX-License-Identifier: GPL-2.0
3 * extcon driver for Basin Cove PMIC
9 #include <linux/extcon-provider.h>
18 #include "extcon-intel.h"
54 unsigned int id; member
70 return regmap_update_bits(data->regmap, reg, mask, 0x00); in mrfld_extcon_clear()
76 return regmap_update_bits(data->regmap, reg, mask, 0xff); in mrfld_extcon_set()
82 struct device *dev = data->dev; in mrfld_extcon_sw_control()
96 struct regmap *regmap = data->regmap; in mrfld_extcon_get_id()
97 unsigned int id; in mrfld_extcon_get_id() local
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/openbmc/linux/arch/arm/mach-omap2/
H A Dvp.c1 // SPDX-License-Identifier: GPL-2.0
9 #include "prm-regbits-34xx.h"
10 #include "prm-regbits-44xx.h"
15 struct omap_vp_instance *vp = voltdm->vp; in _vp_set_init_voltage()
19 vsel = voltdm->pmic->uv_to_vsel(volt); in _vp_set_init_voltage()
21 vpconfig = voltdm->read(vp->vpconfig); in _vp_set_init_voltage()
22 vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | in _vp_set_init_voltage()
23 vp->common->vpconfig_forceupdate | in _vp_set_init_voltage()
24 vp->common->vpconfig_initvdd); in _vp_set_init_voltage()
25 vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask); in _vp_set_init_voltage()
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/openbmc/u-boot/test/dm/
H A Dspmi.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include <power/pmic.h>
27 ut_asserteq_str(name, bus->name); in dm_test_spmi_probe()
51 struct udevice *bus, *pmic; in dm_test_spmi_access() local
55 ut_assertok(device_get_child(bus, 0, &pmic)); in dm_test_spmi_access()
57 /* Sanity check if it's proper PMIC */ in dm_test_spmi_access()
58 ut_asserteq_str(pmic_name, pmic->name); in dm_test_spmi_access()
60 /* Read PMIC ID reg using SPMI bus - it assumes it has slaveID == 0*/ in dm_test_spmi_access()
64 /* Read ID reg via pmic interface */ in dm_test_spmi_access()
65 ut_asserteq(pmic_reg_read(pmic, 0xC004), 0x10); in dm_test_spmi_access()
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/openbmc/u-boot/doc/device-tree-bindings/pmic/
H A Dpm8916.txt1 Qualcomm pm8916 PMIC
3 This PMIC is connected using SPMI bus so should be child of SPMI bus controller.
6 - compatible: "qcom,spmi-pmic";
7 - reg: SPMI Slave ID, size (ignored)
8 - #address-cells: 0x1 (peripheral ID)
9 - #size-cells: 0x1 (size of peripheral register space)
14 compatible = "qcom,spmi-pmic";
16 #address-cells = <0x1>;
17 #size-cells = <0x1>;
/openbmc/u-boot/drivers/power/regulator/
H A Das3722_regulator.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include <power/pmic.h>
20 return -ENOSYS; in stepdown_get_value()
25 return -ENOSYS; in stepdown_set_value()
30 struct udevice *pmic = dev_get_parent(dev); in stepdown_set_enable() local
31 int sd = dev->driver_data; in stepdown_set_enable()
34 ret = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd); in stepdown_set_enable()
46 struct udevice *pmic = dev_get_parent(dev); in stepdown_get_enable() local
47 int sd = dev->driver_data; in stepdown_get_enable()
50 ret = pmic_reg_read(pmic, AS3722_SD_CONTROL); in stepdown_get_enable()
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H A Drk8xx.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Based on Rockchip's drivers/power/pmic/pmic_rk808.c:
8 * zyw <zyw@rock-chips.com>
15 #include <power/pmic.h>
46 { 712500, 12500, -1, RK808_BUCK_VSEL_MASK, },
53 { 712500, 12500, -1, RK818_BUCK_VSEL_MASK, },
89 static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic, in get_buck_reg() argument
92 struct rk8xx_priv *priv = dev_get_priv(pmic); in get_buck_reg()
93 switch (priv->variant) { in get_buck_reg()
101 static int _buck_set_value(struct udevice *pmic, int buck, int uvolt) in _buck_set_value() argument
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H A Dsandbox.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <power/pmic.h>
17 .id = _id, \
29 * struct output_range - helper structure type to define the range of output
30 * operating values (current/voltage), limited by the PMIC IC design.
32 * @min - minimum value
33 * @max - maximum value
34 * @step - step value
42 /* BUCK: 1,2 - voltage range */
48 /* BUCK: 1 - current range */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Dmotorola,cpcap-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/motorola,cpcap-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Motorola CPCAP PMIC ADC
10 - Tony Lindgren <tony@atomide.com>
13 On Motorola phones like droid 4 there is a custom CPCAP PMIC. This PMIC
14 has ADCs that are used for battery charging and USB PHY VBUS and ID pin
20 - motorola,cpcap-adc
21 - motorola,mapphone-cpcap-adc
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/openbmc/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,pmic-glink.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,pmic-glink.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GLINK firmware interface for battery management, USB
8 Type-C and other things.
11 - Bjorn Andersson <andersson@kernel.org>
14 The PMIC GLINK service, running on a coprocessor on some modern Qualcomm
15 platforms and implement USB Type-C handling and battery management. This
18 particularly the USB Type-C controllers relationship with USB and DisplayPort
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/openbmc/u-boot/board/toradex/colibri_imx6/
H A Dpf0100.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2014-2016, Toradex AG
7 * Helpers for Freescale PMIC PF0100
12 #include <asm/arch/imx-regs.h>
14 #include <asm/arch/mx6-pins.h>
16 #include <asm/mach-imx/iomux-v3.h>
21 /* define for PMIC register dump */
36 puts("PMIC: "); in pmic_init()
44 puts("i2c pmic devid read failed\n"); in pmic_init()
48 puts("i2c pmic revid read failed\n"); in pmic_init()
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/openbmc/u-boot/board/toradex/apalis_imx6/
H A Dpf0100.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2014-2016, Toradex AG
7 * Helpers for Freescale PMIC PF0100
13 #include <asm/arch/imx-regs.h>
15 #include <asm/arch/mx6-pins.h>
17 #include <asm/mach-imx/iomux-v3.h>
22 /* define for PMIC register dump */
37 puts("PMIC: "); in pmic_init()
45 puts("i2c pmic devid read failed\n"); in pmic_init()
49 puts("i2c pmic revid read failed\n"); in pmic_init()
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