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Searched +full:phy +full:- +full:rescode +full:- +full:offset +full:- +full:top (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Ddsi-phy-10nm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-10nm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI 10nm PHY
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
13 - $ref: dsi-phy-common.yaml#
18 - qcom,dsi-phy-10nm
19 - qcom,dsi-phy-10nm-8998
23 - description: dsi phy register set
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/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc7180-trogdor-wormdingler-rev1-boe.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * - bits 11..8: Panel ID: 0x4 (BOE)
11 /dts-v1/;
13 #include "sc7180-trogdor-wormdingler.dtsi"
17 compatible = "google,wormdingler-sku1024", "qcom,sc7180";
21 qcom,phy-rescode-offset-top = /bits/ 8 <31 31 31 31 (-32)>;
22 qcom,phy-rescode-offset-bot = /bits/ 8 <31 31 31 31 (-32)>;
23 qcom,phy-drive-ldo-level = <450>;
27 compatible = "boe,tv110c9m-ll3";
H A Dsc7180-trogdor-quackingstick-r0.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * - bits 11..8: Panel ID: 0x6 (AUO)
11 #include "sc7180-trogdor-quackingstick.dtsi"
15 compatible = "google,quackingstick-sku1537", "qcom,sc7180";
19 qcom,phy-rescode-offset-top = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>;
20 qcom,phy-rescode-offset-bot = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>;
21 qcom,phy-drive-ldo-level = <375>;
/openbmc/linux/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy_10nm.c2 * SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
15 * DSI PLL 10nm - clock diagram (eg: DSI0):
20 * +-----
72 struct msm_dsi_phy *phy; global() member
484 dsi_10nm_pll_save_state(struct msm_dsi_phy * phy) dsi_10nm_pll_save_state() argument
507 dsi_10nm_pll_restore_state(struct msm_dsi_phy * phy) dsi_10nm_pll_restore_state() argument
542 dsi_10nm_set_usecase(struct msm_dsi_phy * phy) dsi_10nm_set_usecase() argument
690 dsi_pll_10nm_init(struct msm_dsi_phy * phy) dsi_pll_10nm_init() argument
722 dsi_phy_hw_v3_0_is_pll_on(struct msm_dsi_phy * phy) dsi_phy_hw_v3_0_is_pll_on() argument
733 dsi_phy_hw_v3_0_config_lpcdrx(struct msm_dsi_phy * phy,bool enable) dsi_phy_hw_v3_0_config_lpcdrx() argument
750 dsi_phy_hw_v3_0_lane_settings(struct msm_dsi_phy * phy) dsi_phy_hw_v3_0_lane_settings() argument
802 dsi_10nm_phy_enable(struct msm_dsi_phy * phy,struct msm_dsi_phy_clk_request * clk_req) dsi_10nm_phy_enable() argument
910 dsi_10nm_phy_disable(struct msm_dsi_phy * phy) dsi_10nm_phy_disable() argument
936 dsi_10nm_phy_parse_dt(struct msm_dsi_phy * phy) dsi_10nm_phy_parse_dt() argument
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