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/openbmc/linux/Documentation/devicetree/bindings/arm/firmware/
H A Dlinaro,optee-tz.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/firmware/linaro,optee-tz.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: OP-TEE
10 - Jens Wiklander <jens.wiklander@linaro.org>
13 OP-TEE is a piece of software using hardware features to provide a Trusted
22 const: optee
25 const: linaro,optee-tz
31 software is expected to be either a per-cpu interrupt or an
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/openbmc/u-boot/doc/device-tree-bindings/firmware/
H A Dlinaro,optee-tz.txt1 OP-TEE Device Tree Bindings
3 OP-TEE is a piece of software using hardware features to provide a Trusted
10 * OP-TEE based on ARM TrustZone required properties:
12 - compatible : should contain "linaro,optee-tz"
14 - method : The method of calling the OP-TEE Trusted OS. Permitted
18 in drivers/tee/optee/optee_smc.h
21 in drivers/tee/optee/optee_smc.h
27 optee {
28 compatible = "linaro,optee-tz";
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp15-scmi.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
9 optee: optee { label
10 compatible = "linaro,optee-tz";
15 compatible = "linaro,scmi-optee";
16 #address-cells = <1>;
17 #size-cells = <0>;
18 linaro,optee-channel-id = <0>;
22 #clock-cells = <1>;
27 #reset-cells = <1>;
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/openbmc/u-boot/arch/arm/dts/
H A Dhi6220-hikey.dts8 /dts-v1/;
17 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
27 stdout-path = "serial3:115200n8";
36 optee {
37 compatible = "linaro,optee-tz";
45 non-removable;
46 bus-width = <8>;
51 bus-width = <4>;
55 label = "LS-UART0";
58 label = "LS-UART1";
H A Dk3-am65.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 interrupt-parent = <&gic500>;
16 #address-cells = <2>;
17 #size-cells = <2>;
30 optee {
31 compatible = "linaro,optee-tz";
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H A Dhi3798cv200-poplar.dts4 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
7 * SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
14 #include "poplar-pinctrl.dtsi"
18 compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
26 stdout-path = "serial0:115200n8";
35 optee {
36 compatible = "linaro,optee-tz";
42 compatible = "gpio-leds";
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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dpumpkin-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = "serial0:921600n8";
20 optee: optee { label
21 compatible = "linaro,optee-tz";
26 gpio-keys {
27 compatible = "gpio-keys";
28 pinctrl-names = "default";
29 pinctrl-0 = <&gpio_keys_default>;
31 key-volume-up {
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H A Dmt8365-evk.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022 BayLibre, SAS.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/mt8365-pinfunc.h>
19 compatible = "mediatek,mt8365-evk", "mediatek,mt8365";
26 stdout-path = "serial0:921600n8";
30 optee {
31 compatible = "linaro,optee-tz";
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H A Dmt8195-demo.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
14 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
18 compatible = "mediatek,mt8195-demo", "mediatek,mt8195";
25 stdout-path = "serial0:921600n8";
29 optee {
30 compatible = "linaro,optee-tz";
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/openbmc/linux/arch/arm64/boot/dts/socionext/
H A Duniphier-ld20-akebi96.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Derived from uniphier-ld20-global.dts.
7 // Copyright (C) 2015-2017 Socionext Inc.
8 // Copyright (C) 2019-2020 Linaro Ltd.
10 /dts-v1/;
11 #include <dt-bindings/gpio/uniphier-gpio.h>
12 #include "uniphier-ld20.dtsi"
16 compatible = "socionext,uniphier-ld20-akebi96",
17 "socionext,uniphier-ld20";
20 stdout-path = "serial0:115200n8";
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/openbmc/linux/arch/arm64/boot/dts/st/
H A Dstm32mp251.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
13 #address-cells = <1>;
14 #size-cells = <0>;
17 compatible = "arm,cortex-a35";
20 enable-method = "psci";
24 arm-pmu {
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/openbmc/u-boot/arch/arm/mach-omap2/
H A Dfdt-common.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2016-2017 Texas Instruments, Inc.
48 * fdt_pack_reg - pack address and size array into the "reg"-suitable stream
68 return p - (char *)buf; in fdt_pack_reg()
79 u8 temp[16]; /* Up to 64-bit address + 64-bit size */ in ft_hs_fixup_dram()
82 path = "/reserved-memory/secure_reserved"; in ft_hs_fixup_dram()
88 path = "/reserved-memory"; in ft_hs_fixup_dram()
93 subpath = "reserved-memory"; in ft_hs_fixup_dram()
100 path = "/reserved-memory"; in ft_hs_fixup_dram()
103 fdt_setprop(fdt, offs, "#address-cells", &address_cells, sizeof(address_cells)); in ft_hs_fixup_dram()
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/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/ti,sci_pm_domain.h>
13 #include "k3-pinctrl.h"
18 interrupt-parent = <&gic500>;
19 #address-cells = <2>;
20 #size-cells = <2>;
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H A Dk3-am64.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/ti,sci_pm_domain.h>
13 #include "k3-pinctrl.h"
18 interrupt-parent = <&gic500>;
19 #address-cells = <2>;
20 #size-cells = <2>;
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H A Dk3-am62.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/ti,sci_pm_domain.h>
13 #include "k3-pinctrl.h"
18 interrupt-parent = <&gic500>;
19 #address-cells = <2>;
20 #size-cells = <2>;
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H A Dk3-am62a.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/ti,sci_pm_domain.h>
13 #include "k3-pinctrl.h"
18 interrupt-parent = <&gic500>;
19 #address-cells = <2>;
20 #size-cells = <2>;
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H A Dk3-am62p.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/ti,sci_pm_domain.h>
13 #include "k3-pinctrl.h"
18 interrupt-parent = <&gic500>;
19 #address-cells = <2>;
20 #size-cells = <2>;
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H A Dk3-j721s2.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/soc/ti,sci_pm_domain.h>
15 #include "k3-pinctrl.h"
21 interrupt-parent = <&gic500>;
22 #address-cells = <2>;
23 #size-cells = <2>;
28 #address-cells = <1>;
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H A Dk3-j7200.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/soc/ti,sci_pm_domain.h>
12 #include "k3-pinctrl.h"
17 interrupt-parent = <&gic500>;
18 #address-cells = <2>;
19 #size-cells = <2>;
24 #address-cells = <1>;
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H A Dk3-j721e.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2019 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/soc/ti,sci_pm_domain.h>
12 #include "k3-pinctrl.h"
17 interrupt-parent = <&gic500>;
18 #address-cells = <2>;
19 #size-cells = <2>;
24 #address-cells = <1>;
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H A Dk3-j784s4.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/soc/ti,sci_pm_domain.h>
15 #include "k3-pinctrl.h"
20 interrupt-parent = <&gic500>;
21 #address-cells = <2>;
22 #size-cells = <2>;
25 #address-cells = <1>;
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/openbmc/linux/drivers/tee/optee/
H A Dsmc_abi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2021, Linaro Limited
9 #include <linux/arm-smccc.h>
38 * OP-TEE OS via raw SMCs.
49 * A typical OP-TEE private shm allocation is 224 bytes (argument struct
89 p->attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT + in from_msg_param_tmp_mem()
90 attr - OPTEE_MSG_ATTR_TYPE_TMEM_INPUT; in from_msg_param_tmp_mem()
91 p->u.memref.size = mp->u.tmem.size; in from_msg_param_tmp_mem()
92 shm = (struct tee_shm *)(unsigned long)mp->u.tmem.shm_ref; in from_msg_param_tmp_mem()
94 p->u.memref.shm_offs = 0; in from_msg_param_tmp_mem()
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/openbmc/u-boot/drivers/tee/optee/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <linux/arm-smccc.h>
18 ((OPTEE_MSG_NONCONTIG_PAGE_SIZE / sizeof(u64)) - 1)
41 * reg_pair_to_ptr() - Make a pointer of 2 32-bit values
45 * Returns the combined result, note that if a pointer is 32-bit wide @reg0
54 * reg_pair_from_64() - Split a 64-bit value into two 32-bit values
66 * optee_alloc_and_init_page_list() - Provide page list of memory buffer
71 * Secure world doesn't share mapping with Normal world (U-Boot in this case)
79 const phys_addr_t page_mask = page_size - 1; in optee_alloc_and_init_page_list()
98 * drivers/tee/optee/optee_msg.h for more information. in optee_alloc_and_init_page_list()
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/openbmc/linux/drivers/nvmem/
H A Dstm32-romem.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Factory-programmed memory read access driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
9 #include <linux/arm-smccc.h>
12 #include <linux/nvmem-provider.h>
16 #include "stm32-bsec-optee-ta.h"
18 /* BSEC secure service access from non-secure */
49 *buf8++ = readb_relaxed(priv->base + i); in stm32_romem_read()
61 return -EIO; in stm32_bsec_smc()
68 return -ENXIO; in stm32_bsec_smc()
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/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220-hikey.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "hikey-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
26 stdout-path = "serial3:115200n8";
32 * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
33 * 0x05f0,1000 - 0x05f0,1fff: Reboot reason
34 * 0x06df,f000 - 0x06df,ffff: Mailbox message data
35 * 0x0740,f000 - 0x0740,ffff: MCU firmware section
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