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Searched full:opclk (Results 1 – 23 of 23) sorted by relevance

/openbmc/linux/sound/soc/codecs/
H A Dwm8978.c448 * the OPCLK divisor is calculated directly, not iteratively.
488 * The user needs OPCLK. Choose OPCLKDIV to put in wm8978_configure_pll()
513 * Not using OPCLK, but PLL is used for the codec, choose R: in wm8978_configure_pll()
553 /* Output PLL (OPCLK) to GPIO1 */ in wm8978_configure_pll()
576 * OPCLK, configure the PLL based on that and start it in wm8978_set_dai_clkdiv()
577 * and OPCLK immediately. We will configure PLL to match in wm8978_set_dai_clkdiv()
578 * user-requested OPCLK frquency as good as possible. in wm8978_set_dai_clkdiv()
582 * must not interrupt OPCLK. But it should be fine, in wm8978_set_dai_clkdiv()
583 * because typically the user will request OPCLK to run in wm8978_set_dai_clkdiv()
586 * be equal to or double the OPCLK divisor. in wm8978_set_dai_clkdiv()
[all …]
H A Dwm8994.h30 /* OPCLK is also configured with set_dai_sysclk, specify division*10 as rate. */
H A Darizona.c1307 dev_dbg(component->dev, "Configured %dHz OPCLK\n", in arizona_set_opclk()
1321 dev_err(component->dev, "Unable to generate %dHz OPCLK\n", freq); in arizona_set_opclk()
H A Dwm8997.c416 SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK,
H A Dcs47l24.c349 SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK,
H A Dwm8998.c509 SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK,
H A Dcs47l15.c446 SND_SOC_DAPM_SUPPLY("OPCLK", MADERA_OUTPUT_SYSTEM_CLOCK,
H A Dcs47l35.c518 SND_SOC_DAPM_SUPPLY("OPCLK", MADERA_OUTPUT_SYSTEM_CLOCK,
H A Dmadera.c2537 dev_dbg(component->dev, "Configured %dHz OPCLK\n", in madera_set_opclk()
2550 dev_err(component->dev, "Unable to generate %dHz OPCLK\n", freq); in madera_set_opclk()
H A Dwm5102.c1104 SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK,
H A Dcs47l92.c675 SND_SOC_DAPM_SUPPLY("OPCLK", MADERA_OUTPUT_SYSTEM_CLOCK,
H A Dwm5100.c1572 dev_err(component->dev, "Unsupported OPCLK %dHz\n", in wm5100_set_sysclk()
H A Dwm5110.c1104 SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK,
H A Dcs47l90.c752 SND_SOC_DAPM_SUPPLY("OPCLK", MADERA_OUTPUT_SYSTEM_CLOCK,
H A Dcs47l85.c790 SND_SOC_DAPM_SUPPLY("OPCLK", MADERA_OUTPUT_SYSTEM_CLOCK,
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dcirrus,madera.yaml65 fll3-lock, fllao-clk, fllao-lock, opclk,
66 opclk-async, pwm1, pwm2, spdif, asrc1-in1-lock,
/openbmc/linux/sound/soc/samsung/
H A Dlowland.c50 /* Clock OPCLK, used by the other audio components. */ in lowland_wm5100_init()
54 pr_err("Failed to set OPCLK rate: %d\n", ret); in lowland_wm5100_init()
H A Dbells.c183 dev_err(component->dev, "Failed to set OPCLK: %d\n", ret); in bells_late_probe()
401 { "Sub CLK_SYS", NULL, "OPCLK" },
402 { "CLKIN", NULL, "OPCLK" },
H A Dmidas_wm1811.c97 dev_err(card->dev, "Failed to set OPCLK source: %d\n", ret); in midas_start_fll1()
/openbmc/u-boot/drivers/sound/
H A Dwm8994.h23 /* OPCLK is also configured with set_dai_sysclk, specify division*10 as rate. */
/openbmc/linux/arch/arm/mach-s3c/
H A Dmach-crag6410-module.c222 [3] = 0x4, /* OPCLK */
254 [3] = 0x4, /* OPCLK */
/openbmc/linux/drivers/gpio/
H A Dgpio-wm8994.c173 return "OPCLK"; in wm8994_gpio_fn()
/openbmc/linux/drivers/pinctrl/cirrus/
H A Dpinctrl-madera-core.c253 .name = "opclk",
258 .name = "opclk-async",