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/openbmc/linux/Documentation/devicetree/bindings/clock/ti/
H A Ddpll.txt3 Binding status: Unstable - ABI compatibility may be broken in the future
6 register-mapped DPLL with usually two selectable input clocks
11 sub-types, which effectively result in slightly different setup
14 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
17 - compatible : shall be one of:
18 "ti,omap3-dpll-clock",
19 "ti,omap3-dpll-core-clock",
20 "ti,omap3-dpll-per-clock",
21 "ti,omap3-dpll-per-j-type-clock",
22 "ti,omap4-dpll-clock",
[all …]
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-platform-dptf4 Contact: linux-acpi@vger.kernel.org
6 (RO) The charger type - Traditional, Hybrid or NVDC.
11 Contact: linux-acpi@vger.kernel.org
14 Must be 0 if no AC Adaptor is plugged in.
19 Contact: linux-acpi@vger.kernel.org
27 Contact: linux-acpi@vger.kernel.org
33 - 0x00 = DC
34 - 0x01 = AC
35 - 0x02 = USB
36 - 0x03 = Wireless Charger
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/openbmc/linux/Documentation/driver-api/thermal/
H A Dintel_dptf.rst1 .. SPDX-License-Identifier: GPL-2.0
12 ------------
31 ----------------------------
43 "42A441D6-AE6A-462b-A84B-4A8CE79027D3" : Passive 1
45 "3A95C389-E4B8-4629-A526-C52C88626BAE" : Active
47 "97C68AE7-15FA-499c-B8C9-5DA81D606E0A" : Critical
49 "63BE270F-1C11-48FD-A6F7-3AF253FF3E2D" : Adaptive performance
51 "5349962F-71E6-431D-9AE8-0A635B710AEE" : Emergency call
53 "9E04115A-AE87-4D1C-9500-0F3E340BFE75" : Passive 2
55 "F5A35014-C209-46A4-993A-EB56DE7530A1" : Power Boss
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/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dimx-sata.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/imx-sata.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawn.guo@linaro.org>
19 - fsl,imx53-ahci
20 - fsl,imx6q-ahci
21 - fsl,imx6qp-ahci
31 - description: sata clock
32 - description: sata reference clock
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/openbmc/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Ddfp.c5 * Copyright 2007-2009 Stuart Bennett
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
58 * this does not give a correct answer for off-chip dvi, but there's no in nv04_dfp_get_bound_head()
61 int ramdac = (dcbent->or & DCB_OUTPUT_C) >> 2; in nv04_dfp_get_bound_head()
72 * Luckily we do know the values ;-) in nv04_dfp_bind_head()
78 int ramdac = (dcbent->or & DCB_OUTPUT_C) >> 2; in nv04_dfp_bind_head()
84 if (dcbent->type == DCB_OUTPUT_LVDS) in nv04_dfp_bind_head()
87 nv_write_tmds(dev, dcbent->or, 0, 0x04, tmds04); in nv04_dfp_bind_head()
90 nv_write_tmds(dev, dcbent->or, 1, 0x04, tmds04 ^ 0x08); in nv04_dfp_bind_head()
95 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_disable()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
H A Ddce120_clk_mgr.c2 * Copyright 2012-16 Advanced Micro Devices, Inc.
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
36 /*ClocksStateInvalid - should not be used*/
38 /*ClocksStateUltraLow - currently by HW design team not supposed to be used*/
48 * dce121_clock_patch_xgmi_ss_info() - Save XGMI spread spectrum info
51 * Reads from VBIOS the XGMI spread spectrum info and saves it within
54 * sets the ->xgmi_enabled flag.
60 struct dc_bios *bp = clk_mgr_dce->base.ctx->dc_bios; in dce121_clock_patch_xgmi_ss_info()
62 clk_mgr_dce->xgmi_enabled = false; in dce121_clock_patch_xgmi_ss_info()
64 result = bp->funcs->get_spread_spectrum_info(bp, AS_SIGNAL_TYPE_XGMI, in dce121_clock_patch_xgmi_ss_info()
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/openbmc/linux/drivers/clk/
H A Dclk-renesas-pcie.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Renesas 9-series PCIe clock generator driver
6 * - 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ
8 * - 9FGV0241
9 * - 9FGV0441
14 #include <linux/clk-provider.h>
54 /* Supported Renesas 9-series models. */
60 /* Structure to describe features of a particular 9-series model */
78 * Renesas 9-series i2c regmap
114 return -EIO; in rs9_regmap_i2c_write()
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/openbmc/linux/drivers/scsi/isci/
H A Dprobe_roms.h7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
89 * 0 indicates that no ALIGN primitives will be inserted.
103 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
104 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
105 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
125 * These timer values specifies how long a link will remain open with no
142 * This timer value specifies how long a link will remain open with no
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/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu11_driver_if_sienna_cichlid.h16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
53 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
54 #define MAX_SMNCLK_DPM_LEVEL (NUM_SMNCLK_DPM_LEVELS - 1)
55 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)
56 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)
57 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)
58 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)
59 #define MAX_DCEFCLK_DPM_LEVEL (NUM_DCEFCLK_DPM_LEVELS - 1)
60 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)
61 #define MAX_PIXCLK_DPM_LEVEL (NUM_PIXCLK_DPM_LEVELS - 1)
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H A Dsmu11_driver_if_arcturus.h16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
44 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
45 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)
46 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)
47 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)
48 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)
49 #define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)
50 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1)
51 #define MAX_XGMI_LEVEL (NUM_XGMI_LEVELS - 1)
52 #define MAX_XGMI_PSTATE_LEVEL (NUM_XGMI_PSTATE_LEVELS - 1)
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-cubox-i-som-v15.dts4 * This file is dual-licensed: you can use it either under the terms
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 /dts-v1/;
44 #include "imx6qdl-sr-som.dtsi"
45 #include "imx6qdl-sr-som-ti.dtsi"
46 #include "imx6qdl-cubox-i.dtsi"
49 model = "SolidRun Cubox-i Dual/Quad (1.5som)";
50 compatible = "solidrun,cubox-i/q", "fsl,imx6q";
55 fsl,transmit-level-mV = <1104>;
56 fsl,transmit-boost-mdB = <0>;
[all …]
H A Dimx6q-cubox-i.dts4 * This file is dual-licensed: you can use it either under the terms
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 /dts-v1/;
44 #include "imx6qdl-sr-som.dtsi"
45 #include "imx6qdl-sr-som-brcm.dtsi"
46 #include "imx6qdl-cubox-i.dtsi"
49 model = "SolidRun Cubox-i Dual/Quad";
50 compatible = "solidrun,cubox-i/q", "fsl,imx6q";
55 fsl,transmit-level-mV = <1104>;
56 fsl,transmit-boost-mdB = <0>;
[all …]
H A Dimx6q-cubox-i-emmc-som-v15.dts4 * This file is dual-licensed: you can use it either under the terms
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 /dts-v1/;
44 #include "imx6qdl-sr-som.dtsi"
45 #include "imx6qdl-sr-som-ti.dtsi"
46 #include "imx6qdl-sr-som-emmc.dtsi"
47 #include "imx6qdl-cubox-i.dtsi"
50 model = "SolidRun Cubox-i Dual/Quad (1.5som+emmc)";
51 compatible = "solidrun,cubox-i/q", "fsl,imx6q";
56 fsl,transmit-level-mV = <1104>;
[all …]
H A Dimx6q-hummingboard2-emmc-som-v15.dts3 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
6 * This file is dual-licensed: you can use it either under the terms
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 /dts-v1/;
47 #include "imx6qdl-sr-som.dtsi"
48 #include "imx6qdl-sr-som-emmc.dtsi"
49 #include "imx6qdl-sr-som-ti.dtsi"
50 #include "imx6qdl-hummingboard2.dtsi"
59 fsl,transmit-level-mV = <1104>;
60 fsl,transmit-boost-mdB = <0>;
[all …]
H A Dimx6q-hummingboard2.dts2 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
5 * This file is dual-licensed: you can use it either under the terms
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 /dts-v1/;
45 #include "imx6qdl-sr-som.dtsi"
46 #include "imx6qdl-sr-som-brcm.dtsi"
47 #include "imx6qdl-hummingboard2.dtsi"
48 #include "imx6qdl-hummingboard2-emmc.dtsi"
57 fsl,transmit-level-mV = <1104>;
58 fsl,transmit-boost-mdB = <0>;
[all …]
H A Dimx6q-hummingboard2-som-v15.dts3 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
6 * This file is dual-licensed: you can use it either under the terms
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 /dts-v1/;
47 #include "imx6qdl-sr-som.dtsi"
48 #include "imx6qdl-sr-som-ti.dtsi"
49 #include "imx6qdl-hummingboard2.dtsi"
58 fsl,transmit-level-mV = <1104>;
59 fsl,transmit-boost-mdB = <0>;
60 fsl,transmit-atten-16ths = <9>;
[all …]
H A Dimx6q-dms-ba16.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx6q-ba16.dtsi"
9 model = "Advantech DMS-BA16";
10 compatible = "advantech,imx6q-dms-ba16", "advantech,imx6q-ba16", "fsl,imx6q";
12 reg_usb_otg_vbus: regulator-usbotgvbus {
13 compatible = "regulator-fixed";
14 regulator-name = "usb_otg_vbus";
15 regulator-min-microvolt = <5000000>;
[all …]
/openbmc/linux/drivers/phy/rockchip/
H A Dphy-rockchip-naneng-combphy.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/phy/phy.h>
156 temp = readl(priv->mmio + reg); in rockchip_combphy_updatel()
158 writel(temp, priv->mmio + reg); in rockchip_combphy_updatel()
166 tmp = en ? reg->enable : reg->disable; in rockchip_combphy_param_write()
167 mask = GENMASK(reg->bitend, reg->bitstart); in rockchip_combphy_param_write()
168 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in rockchip_combphy_param_write()
170 return regmap_write(base, reg->offset, val); in rockchip_combphy_param_write()
175 const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; in rockchip_combphy_is_ready()
178 mask = GENMASK(cfg->pipe_phy_status.bitend, in rockchip_combphy_is_ready()
[all …]
/openbmc/linux/drivers/usb/dwc3/
H A Ddwc3-octeon.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2010-2017 Cavium Networks
24 /* BIST fast-clear mode select. A BIST run with this bit set
39 /* 1 = Spread-spectrum clock enable, 0 = SS clock disable */
41 /* Spread-spectrum clock modulation range:
42 * 0x0 = -4980 ppm downspread
43 * 0x1 = -4492 ppm downspread
44 * 0x2 = -4003 ppm downspread
45 * 0x3 - 0x7 = Reserved
48 /* Enable non-standard oscillator frequencies:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Drenesas,raa215300.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 The RAA215300 is a high-performance, low-cost 9-channel PMIC designed for
14 32-bit and 64-bit MCU and MPU applications. It supports DDR3, DDR3L, DDR4,
16 built-in Real-Time Clock (RTC), 32kHz crystal oscillator, and coin cell
18 ideal for System-On-Module (SOM) applications. A spread spectrum feature
19 provides an ease-of-use solution for noise-sensitive audio or RF applications.
25 …-power-management/multi-channel-power-management-ics-pmics/ssdsoc-power-management-ics-pmic-and-pm…
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/openbmc/linux/drivers/gpu/drm/amd/display/include/
H A Dddc_service_types.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
102 /* support for Spread Spectrum(SS) */
104 /* DP link settings (laneCount, linkRate, Spread) */
110 indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
H A Dbios_parser_types.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
38 AS_SIGNAL_TYPE_NONE = 0L, /* no signal */
49 BP_RESULT_OK = 0, /* There was no error */
197 /* Input: Signal Type - to be converted to Encoder mode */
207 /* Output: If non-zero, this refDiv value should be used to calculate
210 /* Output: If non-zero, this postDiv value should be used to calculate
213 /* Input: Enable spread spectrum */
220 /* signal_type -> Encoder Mode - needed by VBIOS Exec table */
234 /* VBIOS returns a fixed display clock when DFS-bypass feature
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Datomfirmware.h6 * Description header file of general definitions for OS and pre-OS video drivers
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
31 * If a change in VBIOS/Driver/Tool's interface is only needed for pre-SoC15 products, then the chan…
115 ATOM_SCALER_DISABLE =0, /*scaler bypass mode, auto-center & no replication*/
116 ATOM_SCALER_CENTER =1, //For Fudo, it's bypass and auto-center & auto replication
202 #define BIOS_VERSION_PREFIX "ATOMBIOSBK-AMD"
245 …tom_string_def atom_bios_string; //Signature to distinguish between Atombios and non-atombios,
467 …ion==1, then this an info table for atomworks to use during debug session, no structure is associa…
604 uint32_t maco_pwrlimit_mw; // bomaco mode power limit in unit of m-watt
605 uint32_t usb_pwrlimit_mw; // power limit when USB is enable in unit of m-watt
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/openbmc/linux/drivers/gpu/drm/radeon/
H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
504 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
536 #define ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN 1 // 1-StrobeMode, 0-PerformanceMode
544 …bDiv; //Output:UPPER_WORD=FB_DIV_INTEGER, LOWER_WORD=FB_DIV_FRAC shl (16-FB_FRACTION_BITS)
549 … //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dbrcm,stb-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm4908-pcie
18 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
19 - brcm,bcm7278-pcie # Broadcom 7278 Arm
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