| /openbmc/u-boot/arch/arm/dts/ |
| H A D | am335x-brxre1.dts | 1 // SPDX-License-Identifier: GPL-2.0+
4 * http://www.br-automation.com
7 /dts-v1/;
15 fset: factory-settings {
16 bl-version = " ";
17 order-no = " ";
18 cpu-order-no = " ";
19 hw-revision = " ";
20 serial-no = <0>;
21 device-id = <0xE681>;
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| H A D | am335x-brppt1-mmc.dts | 1 // SPDX-License-Identifier: GPL-2.0+
4 * http://www.br-automation.com
7 /dts-v1/;
15 fset: factory-settings {
16 bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
18 order-no = "6PPT30 (MMC)";
19 hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
20 serial-no = "0";
21 device-id = <0x0>;
22 parent-id = <0x0>;
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| H A D | am335x-brppt1-spi.dts | 1 // SPDX-License-Identifier: GPL-2.0+
4 * http://www.br-automation.com
7 /dts-v1/;
15 fset: factory-settings {
16 bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
18 order-no = "6PPT30 (SPI)";
19 hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
20 serial-no = "0";
21 device-id = <0x0>;
22 parent-id = <0x0>;
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| H A D | am335x-brppt1-nand.dts | 1 // SPDX-License-Identifier: GPL-2.0+
4 * http://www.br-automation.com
7 /dts-v1/;
15 fset: factory-settings {
16 bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
18 order-no = "6PPT30 (NAND)";
19 hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
20 serial-no = "0";
21 device-id = <0x0>;
22 parent-id = <0x0>;
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| /openbmc/linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap3-beagle-ab4.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
4 #include "omap3-beagle.dts"
8 compatible = "ti,omap3-beagle-ab4", "ti,omap3-beagle", "ti,omap3430", "ti,omap3";
23 /delete-property/ti,no-reset-on-init;
24 /delete-property/ti,no-idle;
26 /delete-property/ti,timer-alwon;
30 /* Preferred always-on timer for clocksource */
32 ti,no-reset-on-init;
33 ti,no-idle;
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| H A D | omap3-sniper.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015-2016 Paul Kocialkowski <contact@paulk.fr>
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
12 compatible = "lg,omap3-sniper", "ti,omap3630", "ti,omap3";
16 cpu0-supply = <&vcc>;
27 pinctrl-names = "default";
29 uart3_pins: uart3-pins {
30 pinctrl-single,pins = <
36 dp3t_sel_pins: dp3t-sel-pins {
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| /openbmc/linux/arch/arm/mach-omap2/ |
| H A D | prm_common.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP2+ common Power & Reset Management (PRM) IP block functions
6 * Tero Kristo <t-kristo@ti.com>
10 * underlying registers are located in the PRM on OMAP3/4.
17 #include <linux/init.h>
24 #include <linux/clk-provider.h>
44 * omap_prcm_register_chain_handler() could allocate this based on the
59 * is currently running on. Defined and passed by initialization code
70 * prm_ll_data: function pointers to SoC-specific implementations of
86 for (i = 0; i < prcm_irq_setup->nr_regs; i++) { in omap_prcm_events_filter_priority()
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| H A D | wd_timer.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * OMAP2+ MPU WD_TIMER-specific code
12 #include <linux/platform_data/omap-wd-timer.h>
23 * settings, WDT module is reset during init. This enables the watchdog
24 * timer. Hence it is required to disable the watchdog after the WDT reset
25 * during init. Otherwise the system would reboot as per the default
37 return -EINVAL; in omap2_wd_timer_disable()
43 oh->name, __func__); in omap2_wd_timer_disable()
44 return -EINVAL; in omap2_wd_timer_disable()
60 * omap2_wdtimer_reset - reset and disable the WDTIMER IP block
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| /openbmc/u-boot/board/spear/x600/ |
| H A D | fpga.c | 1 // SPDX-License-Identifier: GPL-2.0+
16 * FPGA program pin configuration on X600:
18 * Only PROG and DONE are connected to GPIOs. INIT is not connected to the
27 * Set the active-low FPGA reset signal.
32 * On x600 we have no means to toggle the FPGA reset signal in fpga_reset()
34 debug("%s:%d: RESET (%d)\n", __func__, __LINE__, assert); in fpga_reset()
38 * Set the FPGA's active-low SelectMap program line to the specified level
50 * Test the state of the active-low FPGA INIT line. Return 1 on INIT
57 debug("%s:%d: init (state=%d)\n", __func__, __LINE__, state); in fpga_init_fn()
60 * On x600, the FPGA INIT signal is not connected to the SoC. in fpga_init_fn()
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| /openbmc/linux/Documentation/devicetree/bindings/bus/ |
| H A D | ti-sysc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/ti-sysc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
16 is mostly used for interaction between module and Power, Reset and Clock
31 pattern: "^target-module(@[0-9a-f]+)?$"
35 - items:
36 - enum:
37 - ti,sysc-omap2
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| /openbmc/u-boot/drivers/usb/host/ |
| H A D | ehci-omap.c | 1 // SPDX-License-Identifier: GPL-2.0+
4 * (C) Copyright 2004-2008
20 #include <asm/ehci-omap.h>
33 rev = readl(&uhh->rev); in omap_uhh_reset()
35 /* Soft RESET */ in omap_uhh_reset()
36 writel(OMAP_UHH_SYSCONFIG_SOFTRESET, &uhh->sysc); in omap_uhh_reset()
40 /* Wait for soft RESET to complete */ in omap_uhh_reset()
41 while (!(readl(&uhh->syss) & 0x1)) { in omap_uhh_reset()
43 printf("%s: RESET timeout\n", __func__); in omap_uhh_reset()
44 return -1; in omap_uhh_reset()
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| /openbmc/linux/Documentation/devicetree/bindings/arm/omap/ |
| H A D | omap.txt | 5 On top of that an omap_device is created to extend the platform_device
11 to move data from hwmod to device-tree representation.
15 - compatible: Every devices present in OMAP SoC should be in the
17 - ti,hwmods: list of hwmod names (ascii strings), that comes from the OMAP
22 - ti,no_idle_on_suspend: When present, it prevents the PM to idle the module
24 - ti,no-reset-on-init: When present, the module should not be reset at init
25 - ti,no-idle-on-init: When present, the module should not be idled at init
26 - ti,no-idle: When present, the module is never allowed to idle.
31 compatible = "ti,omap4-spinlock";
37 - General Purpose devices
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| /openbmc/linux/drivers/clk/ |
| H A D | clk-gemini.c | 1 // SPDX-License-Identifier: GPL-2.0
7 #define pr_fmt(fmt) "clk-gemini: " fmt
9 #include <linux/init.h>
15 #include <linux/clk-provider.h>
21 #include <linux/reset-controller.h>
22 #include <dt-bindings/reset/cortina,gemini-reset.h>
23 #include <dt-bindings/clock/cortina,gemini-clock.h>
53 * struct gemini_gate_data - Gemini gated clocks
67 * struct clk_gemini_pci - Gemini PCI clock
79 * struct gemini_reset - gemini reset controller
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| /openbmc/openbmc/meta-phosphor/recipes-phosphor/initrdscripts/files/ |
| H A D | obmc-init.sh | 11 mkdir -p $fslist
12 mount dev dev -tdevtmpfs
13 mount sys sys -tsysfs
14 mount proc proc -tproc
17 mount tmpfs run -t tmpfs -o mode=755,nodev
20 mkdir -p $rodir $rwdir
22 cp -rp init shutdown update whitelist bin sbin usr lib etc var run/initramfs
28 m=$(grep -xl "$1" /sys/class/mtd/*/name)
35 # Emulate util-linux's `blkid -s TYPE -o value $1`
40 blkid "$1" | sed -e 's/^.*TYPE="//' -e 's/".*$//'
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| /openbmc/linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_reset.c | 1 // SPDX-License-Identifier: MIT
3 * Copyright © 2008-2018 Intel Corporation
40 struct drm_i915_file_private *file_priv = ctx->file_priv; in client_mark_guilty()
51 prev_hang = xchg(&file_priv->hang_timestamp, jiffies); in client_mark_guilty()
56 atomic_add(score, &file_priv->ban_score); in client_mark_guilty()
58 drm_dbg(&ctx->i915->drm, in client_mark_guilty()
60 ctx->name, score, in client_mark_guilty()
61 atomic_read(&file_priv->ban_score)); in client_mark_guilty()
72 if (intel_context_is_closed(rq->context)) in mark_guilty()
76 ctx = rcu_dereference(rq->context->gem_context); in mark_guilty()
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| /openbmc/linux/Documentation/hwmon/ |
| H A D | w83791d.rst | 10 Addresses scanned: I2C 0x2c - 0x2f
12 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83791D_W83791Gb.pdf
22 - Frodo Looijaard <frodol@dds.nl>,
23 - Philip Edelbrock <phil@netroedge.com>,
24 - Mark Studebaker <mdsxyz123@yahoo.com>
28 - Shane Huang (Winbond),
29 - Rudolf Marek <r.marek@assembler.cz>
33 - Sven Anders <anders@anduras.de>
34 - Marc Hulsman <m.hulsman@tudelft.nl>
37 -----------------
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| /openbmc/u-boot/include/ |
| H A D | ahci.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
39 #define HOST_RESET (1 << 0) /* reset controller; self-clear */
70 #define PORT_IRQ_IF_NONFATAL (1 << 26) /* interface non-fatal error */
115 #define ATA_FLAG_NO_LEGACY (1 << 4) /* no legacy mode check */
119 #define ATA_FLAG_NO_ATAPI (1 << 11) /* No ATAPI support */
147 * struct ahci_uc_priv - information about an AHCI controller
156 * in a driver-model context (i.e. attached to a device with
180 * reset() - reset the controller
182 * @dev: Controller to reset
183 * @return 0 if OK, -ve on error
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| /openbmc/linux/drivers/firewire/ |
| H A D | init_ohci1394_dma.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * init_ohci1394_dma.c - Initializes physical DMA on all OHCI 1394 controllers
5 * Copyright (C) 2006-2007 Bernhard Kaindl <bk@suse.de>
7 * Derived from drivers/ieee1394/ohci1394.c and arch/x86/kernel/early-quirks.c
9 * - scan the PCI very early on boot for all OHCI 1394-compliant controllers
10 * - reset and initialize them and make them join the IEEE1394 bus and
11 * - enable physical DMA on them to allow remote debugging
18 * be sure that the stack enables it and (re-)attach after the bus reset
28 #include <asm/pci-direct.h> /* for direct PCI config space access */
42 writel(data, ohci->registers + offset); in reg_write()
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| /openbmc/linux/Documentation/devicetree/bindings/gpio/ |
| H A D | ti,omap-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Grygorii Strashko <grygorii.strashko@ti.com>
13 The general-purpose interface combines general-purpose input/output (GPIO) banks.
14 Each GPIO banks provides up to 32 dedicated general-purpose pins with input
15 and output capabilities; interrupt generation in active mode and wake-up
21 - enum:
22 - ti,omap2-gpio
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| /openbmc/openbmc/meta-facebook/meta-bletchley/recipes-phosphor/state/ |
| H A D | phosphor-state-manager_%.bbappend | 4 file://chassis-powercycle \
5 file://chassis-powercycle@.service \
6 file://chassis-poweroff@.service \
7 file://chassis-poweron \
8 file://chassis-poweron@.service \
9 file://host-poweroff@.service \
10 file://host-poweron@.service \
13 RDEPENDS:${PN}-discover:append = " bletchley-common-tool"
14 RDEPENDS:${PN}:append = " bash motor-ctrl"
17 install -d ${D}${systemd_system_unitdir}
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| /openbmc/u-boot/test/py/tests/ |
| H A D | test_tpm2.py | 1 # SPDX-License-Identifier: GPL-2.0+
26 """When a test fails, U-Boot is reset. Because TPM stack must be initialized
28 trying any command or they will fail with no reason. Executing 'tpm init'
29 twice will spawn an error used to detect that the TPM was not reset and no
32 output = u_boot_console.run_command('tpm2 init')
34 u_boot_console.run_command('echo --- start of init ---')
41 u_boot_console.run_command('echo --- end of init ---')
45 """Init the software stack to use TPMv2 commands."""
47 u_boot_console.run_command('tpm2 init')
89 Ask the TPM to reset entirely its internal state (including internal
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| /openbmc/openbmc/meta-hpe/meta-common/recipes-phosphor/initrdscripts/files/ |
| H A D | gxp-obmc-init.sh | 12 mkdir -p "$f"
14 mount dev dev -tdevtmpfs
15 mount sys sys -tsysfs
16 mount proc proc -tproc
19 mount tmpfs run -t tmpfs -o mode=755,nodev
22 mkdir -p $rodir $rwdir
24 cp -rp init shutdown update whitelist bin sbin usr lib etc var run/initramfs
30 m=$(grep -xl "$1" /sys/class/mtd/*/name)
37 # Emulate util-linux's `blkid -s TYPE -o value $1`
42 blkid "$1" | sed -e 's/^.*TYPE="//' -e 's/".*$//'
[all …]
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| /openbmc/linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | adf_pfvf_pf_proto.c | 1 // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
2 /* Copyright(c) 2015 - 2021 Intel Corporation */
16 NULL, /* no message type defined for value 0 */
17 NULL, /* no message type defined for value 1 */
23 * adf_send_pf2vf_msg() - send PF to VF message
30 * Return: 0 on success, error code otherwise.
35 u32 pfvf_offset = pfvf_ops->get_pf2vf_offset(vf_nr); in adf_send_pf2vf_msg()
37 return pfvf_ops->send_msg(accel_dev, msg, pfvf_offset, in adf_send_pf2vf_msg()
38 &accel_dev->pf.vf_info[vf_nr].pf2vf_lock); in adf_send_pf2vf_msg()
42 * adf_recv_vf2pf_msg() - receive a VF to PF message
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| /openbmc/u-boot/board/st/stm32mp1/ |
| H A D | stm32mp1.c | 1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
10 #include <generic-phy.h>
12 #include <reset.h>
35 int board_usb_init(int index, enum usb_init_type init) in board_usb_init() argument
39 const void *blob = gd->fdt_blob; in board_usb_init()
47 node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); in board_usb_init()
50 return -ENODEV; in board_usb_init()
55 return -ENODEV; in board_usb_init()
60 "#clock-cells", 0, 0, &args); in board_usb_init()
[all …]
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| /openbmc/u-boot/arch/mips/mach-mscc/include/mach/ |
| H A D | ddr.h | 1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
42 /* Micron MT41J128M16HA-15E:D (2Gbit DDR3, x16) @ 3.20ns */
65 /* Micron MT41K256M16 (4Gbit, DDR3L-800, 256Mbitx16) @ 3.20ns */
88 /* Hynix H5TQ4G63MFR-PBC (4Gbit, DDR3-800, 256Mbitx16) - 2kb pages @ 3.20ns */
111 /* Micron Micron MT41K128M16JT-125 (2Gbit DDR3L, 128Mbitx16) @ 3.20ns */
134 /* Micron 1Gb MT47H128M8-3 16Meg x 8 x 8 banks, DDR-533@CL4 @ 4.80ns */
160 #error Unknown DDR system configuration - please add!
190 #define VC3_MPAR_BURST_LENGTH 4 /* in DDR2 16-bit mode, use burstlen 4 */
192 #define VC3_MPAR_BURST_LENGTH 8 /* For 8-bit IF we must run burst-8 */
199 #define VC3_MPAR_WL (VC3_MPAR_RL - 1)
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