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/openbmc/linux/Documentation/driver-api/
H A Dmtdnand.rst2 MTD NAND Driver Programming Interface
10 The generic NAND driver supports almost all NAND and AG-AND based chips
15 board drivers or filesystem drivers suitable for NAND devices.
31 --------------------------
37 - [MTD Interface]
43 - [NAND Interface]
45 These functions are exported and provide the interface to the NAND
48 - [GENERIC]
53 - [DEFAULT]
58 via pointers in the NAND chip description structure. The board driver
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/openbmc/linux/drivers/mtd/nand/
H A Decc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Generic Error-Correcting Code (ECC) engine
10 * This file describes the abstraction of any NAND ECC engine. It has been
11 * designed to fit most cases, including parallel NANDs and SPI-NANDs.
13 * There are three main situations where instantiating this ECC engine makes
15 * - external: The ECC engine is outside the NAND pipeline, typically this
16 * is a software ECC engine, or an hardware engine that is
17 * outside the NAND controller pipeline.
18 * - pipelined: The ECC engine is inside the NAND pipeline, ie. on the
19 * controller's side. This is the case of most of the raw NAND
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/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Draw-nand-chip.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Raw NAND Chip Common Properties
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: nand-chip.yaml#
16 The ECC strength and ECC step size properties define the user
18 they request the ECC engine to correct {strength} bit errors per
19 {size} bytes for a particular raw NAND chip.
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/openbmc/linux/include/linux/mtd/
H A Dnand.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2017 - Free Electrons
6 * Boris Brezillon <boris.brezillon@free-electrons.com>
18 * struct nand_memory_organization - Memory organization structure
19 * @bits_per_cell: number of bits per NAND cell
27 * @ntargets: total number of targets exposed by the NAND device
55 * struct nand_row_converter - Information needed to convert an absolute offset
67 * struct nand_pos - NAND position object
68 * @target: the NAND target/die
74 * These information are usually used by specific sub-layers to select the
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H A Drawnand.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
8 * Contains standard defines and IDs for NAND flash devices
17 #include <linux/mtd/nand.h>
29 /* The maximum number of NAND chips in an array */
50 * Standard NAND flash commands
75 #define NAND_CMD_NONE -1
84 #define NAND_DATA_IFACE_CHECK_ONLY -1
87 * Constants for Hardware ECC
89 /* Reset Hardware ECC for read */
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/openbmc/u-boot/include/mtd/
H A Dmtd-abi.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al.
45 * @MTD_OPS_RAW: data are transferred as-is, with no error correction;
59 * struct mtd_write_req - data structure for requesting a write operation
64 * @usr_data: user-provided data buffer
65 * @usr_oob: user-provided OOB buffer
70 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
71 * write data-only, set @usr_oob == NULL. However, setting both @usr_data and
88 #define MTD_NANDFLASH 4 /* SLC NAND */
91 #define MTD_MLCNANDFLASH 8 /* MLC NAND (including TLC) */
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/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dnand_bch.c1 // SPDX-License-Identifier: GPL-2.0+
3 * This file provides ECC correction for more than 1 bit per block of data,
22 * struct nand_bch_control - private NAND BCH control structure
24 * @ecclayout: private ecc layout for this BCH configuration
26 * @eccmask: XOR ecc mask, allows erased pages to be decoded as valid
36 * nand_bch_calculate_ecc - [NAND Interface] Calculate ECC for data block
39 * @code: output buffer with ECC
45 struct nand_bch_control *nbc = chip->ecc.priv; in nand_bch_calculate_ecc()
48 memset(code, 0, chip->ecc.bytes); in nand_bch_calculate_ecc()
49 encode_bch(nbc->bch, buf, chip->ecc.size, code); in nand_bch_calculate_ecc()
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H A Dfsmc_nand.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <nand.h>
24 * ECC4 and ECC1 have 13 bytes and 3 bytes of ecc respectively for 512 bytes of
61 * ECC4 layout for NAND of pagesize 4096 bytes & OOBsize 224 bytes. 13*8 bytes
62 * of OOB size is reserved for ECC, Byte no. 0 & 1 reserved for bad block & 118
97 * ECC placement definitions in oobfree type format
98 * There are 13 bytes of ecc for every 512 byte block and it has to be read
101 * Managing the ecc bytes in the following way makes it easier for software to
102 * read ecc bytes consecutive to data bytes. This way is similar to
103 * oobfree structure maintained already in u-boot nand driver
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H A Dzynq_nand.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Xilinx Zynq NAND Flash Controller Driver
13 #include <nand.h>
21 /* The NAND flash driver defines */
36 (0x1 << 6)) /* Disable ECC interrupt */
54 #define ZYNQ_NAND_ECC_CONFIG ((0x1 << 2) | /* ECC available on APB */ \
55 (0x1 << 4) | /* ECC read at end of page */ \
83 /* ECC block registers bit position and bit mask */
84 #define ZYNQ_NAND_ECC_BUSY (1 << 6) /* ECC block is busy */
85 #define ZYNQ_NAND_ECC_MASK 0x00FFFFFF /* ECC value mask */
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H A Dmxc_nand.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2004-2007 Freescale Semiconductor, Inc.
9 #include <nand.h>
14 #include <asm/arch/imx-regs.h>
21 struct nand_chip *nand; member
38 /* Define delays in microsec for NAND device operations */
40 /* Macros to get byte and bit positions of ECC */
48 /* OOB placement block for use with hardware ecc generation */
103 while (size--) in mxc_nand_memcpy32()
117 while (max_retries-- > 0) {
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H A Dnand_base.c3 * This is the generic MTD driver for NAND flash devices. It should be
4 * capable of working with almost all NAND chips currently available.
7 * http://www.linux-mtd.infradead.org/doc/nand.html
10 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
20 * Check, if mtd->ecctype should be set to MTD_ECC_HW
21 * if we have HW ECC support.
49 /* Define default oob placement schemes for large and small page devices */
113 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
115 ret = -EINVAL; in check_offs_len()
119 if (len & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
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H A Dnand_bbt.c3 * Bad block table support for the NAND driver
29 * For manufacturer created BBTs like the one found on M-SYS DOC devices
35 * number which indicates which of both tables is more up to date. If the NAND
36 * controller needs the complete OOB area for the ECC information then the
55 * - bbts start at a page boundary, if autolocated on a block boundary
56 * - the space necessary for a bbt in FLASH does not exceed a block boundary
81 uint8_t entry = chip->bbt[block >> BBT_ENTRY_SHIFT]; in bbt_get_entry()
90 chip->bbt[block >> BBT_ENTRY_SHIFT] |= msk; in bbt_mark_entry()
95 if (memcmp(buf, td->pattern, td->len)) in check_pattern_no_oob()
96 return -1; in check_pattern_no_oob()
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/openbmc/linux/include/uapi/mtd/
H A Dmtd-abi.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al.
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
55 * @MTD_OPS_RAW: data are transferred as-is, with no error correction;
69 * struct mtd_write_req - data structure for requesting a write operation
74 * @usr_data: user-provided data buffer
75 * @usr_oob: user-provided OOB buffer
80 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
81 * write data-only, set @usr_oob == NULL. However, setting both @usr_data and
95 * struct mtd_read_req_ecc_stats - ECC statistics for a read operation
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/openbmc/linux/drivers/mtd/nand/raw/
H A Ddavinci_nand.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * davinci_nand.c - NAND Flash Driver for DaVinci family chips
8 * Sander Huijsen <Shuijsen@optelecom-nkf.com>
23 #include <linux/platform_data/mtd-davinci.h>
24 #include <linux/platform_data/mtd-davinci-aemif.h>
27 * This is a device driver for the NAND flash controller found on the
32 * The 1-bit ECC hardware is supported, as well as the newer 4-bit ECC
33 * available on chips like the DM355 and OMAP-L137 and needed with the
34 * more error-prone MLC NAND chips.
36 * This driver assumes EM_WAIT connects all the NAND devices' RDY/nBUSY
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H A Dnand_base.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * This is the generic MTD driver for NAND flash devices. It should be
5 * capable of working with almost all NAND chips currently available.
8 * http://www.linux-mtd.infradead.org/doc/nand.html
11 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
21 * Check, if mtd->ecctype should be set to MTD_ECC_HW
22 * if we have HW ECC support.
37 #include <linux/mtd/nand.h>
38 #include <linux/mtd/nand-ecc-sw-hamming.h>
39 #include <linux/mtd/nand-ecc-sw-bch.h>
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H A Dfsmc_nand.c1 // SPDX-License-Identifier: GPL-2.0
5 * Driver for NAND portions
11 * Based on drivers/mtd/nand/nomadik_nand.c (removed in v3.8)
20 #include <linux/dma-direction.h>
21 #include <linux/dma-mapping.h>
29 #include <linux/mtd/nand-ecc-sw-hamming.h>
37 #include <mtd/mtd-abi.h>
61 /* fsmc controller registers for NAND flash */
99 * TOUDEL = 7ns (Output delay from the flip-flops to the board)
120 * struct fsmc_nand_data - structure for FSMC NAND device state
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H A Dcafe_nand.c1 // SPDX-License-Identifier: GPL-2.0-only
23 #include <linux/dma-mapping.h>
61 struct nand_chip nand; member
101 #define cafe_readl(cafe, addr) readl((cafe)->mmio + CAFE_##addr)
102 #define cafe_writel(cafe, datum, addr) writel(datum, (cafe)->mmio + CAFE_##addr)
112 cafe_dev_dbg(&cafe->pdev->dev, "NAND device is%s ready, IRQ %x (%x) (%x,%x)\n", in cafe_device_ready()
124 if (cafe->usedma) in cafe_write_buf()
125 memcpy(cafe->dmabuf + cafe->datalen, buf, len); in cafe_write_buf()
127 memcpy_toio(cafe->mmio + CAFE_NAND_WRITE_DATA + cafe->datalen, buf, len); in cafe_write_buf()
129 cafe->datalen += len; in cafe_write_buf()
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H A Ds3c2410.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright © 2004-2008 Simtec Electronics
7 * Samsung S3C2410/S3C2440/S3C2412 NAND driver
10 #define pr_fmt(fmt) "nand-s3c2410: " fmt
34 #include <linux/platform_data/mtd-nand-s3c2410.h>
71 /* new oob placement block for use with hardware ecc generation
77 return -ERANGE; in s3c2410_ooblayout_ecc()
79 oobregion->offset = 0; in s3c2410_ooblayout_ecc()
80 oobregion->length = 3; in s3c2410_ooblayout_ecc()
89 return -ERANGE; in s3c2410_ooblayout_free()
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H A Dlpc32xx_slc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * NXP LPC32XX NAND SLC driver
24 #include <linux/dma-mapping.h>
30 #define LPC32XX_MODNAME "lpc32xx-nand"
33 * SLC NAND controller register offsets
55 #define SLCCTRL_SW_RESET (1 << 2) /* Reset the NAND controller bit */
56 #define SLCCTRL_ECC_CLEAR (1 << 1) /* Reset ECC bit */
63 #define SLCCFG_DMA_ECC (1 << 4) /* Enable DMA ECC bit */
64 #define SLCCFG_ECC_EN (1 << 3) /* ECC enable bit */
74 #define SLCSTAT_NAND_READY (1 << 0) /* NAND device is ready bit */
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H A Dr852.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2009 - Maxim Levitsky
31 MODULE_PARM_DESC(debug, "Debug level (0-2)");
36 uint8_t reg = readb(dev->mmio + address); in r852_read_reg()
44 writeb(value, dev->mmio + address); in r852_write_reg()
51 uint32_t reg = le32_to_cpu(readl(dev->mmio + address)); in r852_read_reg_dword()
59 writel(cpu_to_le32(value), dev->mmio + address); in r852_write_reg_dword()
73 dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) & in r852_dma_test()
76 if (!dev->dma_usable) in r852_dma_test()
81 dev->dma_usable = 0; in r852_dma_test()
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H A Ddiskonchip.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * converted to the generic Reed-Solomon library by Thomas Gleixner <tglx@linutronix.de>
16 * Interface to generic NAND code for M-Systems DiskOnChip devices
79 /* This is the ecc value computed by the HW ecc generator upon writing an empty
85 #define DoC_is_MillenniumPlus(doc) ((doc)->ChipID == DOC_ChipID_DocMilPlus16 || (doc)->ChipID == DO…
86 #define DoC_is_Millennium(doc) ((doc)->ChipID == DOC_ChipID_DocMil)
87 #define DoC_is_2000(doc) ((doc)->ChipID == DOC_ChipID_Doc2k)
115 /* Sector size for HW ECC */
129 * Reed-Solomon library code.
133 * of the generic Reed-Solomon library. tglx
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H A Ddenali.c1 // SPDX-License-Identifier: GPL-2.0
3 * NAND Flash Controller Device Driver
4 * Copyright © 2009-2010, Intel Corporation and its suppliers.
6 * Copyright (c) 2017-2019 Socionext Inc.
12 #include <linux/dma-mapping.h>
23 #define DENALI_NAND_NAME "denali-nand"
31 #define DENALI_MAP10 (2 << 26) /* high-level control plane */
39 #define DENALI_BANK(denali) ((denali)->active_bank << 24)
41 #define DENALI_INVALID_BANK -1
50 return container_of(chip->controller, struct denali_controller, in to_denali_controller()
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H A Dnand_bbt.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Bad block table support for the NAND driver
26 * For manufacturer created BBTs like the one found on M-SYS DOC devices
32 * number which indicates which of both tables is more up to date. If the NAND
33 * controller needs the complete OOB area for the ECC information then the
52 * - bbts start at a page boundary, if autolocated on a block boundary
53 * - the space necessary for a bbt in FLASH does not exceed a block boundary
78 uint8_t entry = chip->bbt[block >> BBT_ENTRY_SHIFT]; in bbt_get_entry()
87 chip->bbt[block >> BBT_ENTRY_SHIFT] |= msk; in bbt_mark_entry()
92 if (memcmp(buf, td->pattern, td->len)) in check_pattern_no_oob()
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/openbmc/u-boot/drivers/mtd/onenand/
H A Donenand_base.c4 * Copyright (C) 2005-2007 Samsung Electronics
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes
14 * Flex-OneNAND support
33 /* It should access 16-bit instead of 8-bit */
41 while (len-- > 0) in memcpy_16()
47 * onenand_oob_128 - oob info for Flex-Onenand with 4KB page
48 * For now, we expose only 64 out of 80 ecc bytes
68 * onenand_oob_64 - oob info for large (2KB) page
85 * onenand_oob_32 - oob info for middle (1KB) page
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/openbmc/linux/drivers/mtd/nand/onenand/
H A Donenand_base.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2005-2009 Samsung Electronics
9 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
10 * auto-placement support, read-while load support, various fixes
13 * Flex-OneNAND support
39 /* Default Flex-OneNAND boundary and lock respectively */
40 static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
43 MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
47 " : 0->Set boundary in unlocked status"
48 " : 1->Set boundary in locked status");
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