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/openbmc/u-boot/cmd/mvebu/
H A DKconfig1 menu "MVEBU commands"
10 in doc/mvebu/cmd/bubt.txt
23 in doc/mvebu/cmd/bubt.txt
32 in doc/mvebu/cmd/bubt.txt
41 in doc/mvebu/cmd/bubt.txt
50 MVEBU "bubt" command if the source file name is omitted
/openbmc/linux/drivers/phy/marvell/
H A DMakefile7 obj-$(CONFIG_PHY_MVEBU_A3700_COMPHY) += phy-mvebu-a3700-comphy.o
8 obj-$(CONFIG_PHY_MVEBU_A3700_UTMI) += phy-mvebu-a3700-utmi.o
10 obj-$(CONFIG_PHY_MVEBU_CP110_COMPHY) += phy-mvebu-cp110-comphy.o
11 obj-$(CONFIG_PHY_MVEBU_CP110_UTMI) += phy-mvebu-cp110-utmi.o
12 obj-$(CONFIG_PHY_MVEBU_SATA) += phy-mvebu-sata.o
H A Dphy-mvebu-sata.c3 * phy-mvebu-sata.c: SATA Phy driver for the Marvell mvebu SoCs.
117 { .compatible = "marvell,mvebu-sata-phy" },
124 .name = "phy-mvebu-sata",
/openbmc/linux/arch/arm/mach-mvebu/
H A Dmvebu-soc-id.c3 * ID and revision information for mvebu SoCs
9 * All the mvebu SoCs have information related to their variant and
15 #define pr_fmt(fmt) "mvebu-soc-id: " fmt
26 #include "mvebu-soc-id.h"
106 pr_info("MVEBU SoC ID=0x%X, Rev=0x%X\n", soc_dev_id, soc_rev); in get_soc_id_by_pci()
140 pr_info("MVEBU SoC ID=0x%X, Rev=0x%X\n", soc_dev_id, soc_rev); in mvebu_soc_id_init()
153 /* Also protects against running on non-mvebu systems */ in mvebu_soc_device()
H A Dcoherency.c18 #define pr_fmt(fmt) "mvebu-coherency: " fmt
35 #include "mvebu-soc-id.h"
148 "arm/mvebu/coherency:starting", in armada_370_coherency_init()
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-mvebu.txt1 * Marvell MVEBU SATA PHY
3 Power control for the SATA phy found on Marvell MVEBU SoCs.
10 - compatible : Should be "marvell,mvebu-sata-phy"
16 compatible = "marvell,mvebu-sata-phy";
H A Dphy-mvebu-comphy.txt1 MVEBU comphy drivers
4 COMPHY controllers can be found on the following Marvell MVEBU SoCs:
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmvebu-devbus.txt1 Device tree bindings for MVEBU Device Bus controllers
10 "marvell,mvebu-devbus" compatible string.
68 Mandatory for "marvell,mvebu-devbus" compatible string,
80 Mandatory for "marvell,mvebu-devbus" compatible string,
106 Mandatory for "marvell,mvebu-devbus" compatible string,
118 This address window handling is done in this mvebu-devbus only as a temporary
H A Dmarvell,mvebu-sdram-controller.yaml4 $id: http://devicetree.org/schemas/memory-controllers/marvell,mvebu-sdram-controller.yaml#
7 title: Marvell MVEBU SDRAM controller
/openbmc/u-boot/arch/arm/mach-mvebu/include/mach/
H A Dconfig.h11 * It supports common definitions for MVEBU platforms
35 * By default the generated mvebu kwbimage.cfg is used
40 #define CONFIG_SYS_KWD_CONFIG arch/arm/mach-mvebu/kwbimage.cfg
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dmarvell,mvebu-pinctrl.txt8 - compatible: "marvell,mvebu-pinctrl",
33 compatible = "marvell,mvebu-pinctrl",
54 compatible = "marvell,mvebu-pinctrl",
91 compatible = "marvell,mvebu-pinctrl",
/openbmc/u-boot/drivers/clk/mvebu/
H A DKconfig2 bool "MVEBU clock drivers"
5 Enable support for clock present on Marvell MVEBU SoCs.
/openbmc/linux/Documentation/devicetree/bindings/arm/marvell/
H A Dmvebu-cpu-config.txt1 MVEBU CPU Config registers
4 MVEBU (Marvell SOCs: Armada 370/XP)
H A Dmvebu-system-controller.txt1 MVEBU System Controller
3 MVEBU (Marvell SOCs: Armada 370/375/XP, Dove, mv78xx0, Kirkwood, Orion5x)
/openbmc/linux/drivers/irqchip/
H A DMakefile79 obj-$(CONFIG_MVEBU_GICP) += irq-mvebu-gicp.o
80 obj-$(CONFIG_MVEBU_ICU) += irq-mvebu-icu.o
81 obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o
82 obj-$(CONFIG_MVEBU_PIC) += irq-mvebu-pic.o
83 obj-$(CONFIG_MVEBU_SEI) += irq-mvebu-sei.o
/openbmc/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-mvebu.h3 * Marvell MVEBU pinctrl driver
71 * register for common mpp pin configuration registers on MVEBU. SoC specific
108 * struct mvebu_pinctrl_soc_info - SoC specific info passed to pinctrl-mvebu
186 .name = "mvebu-gpio", \
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-370-xp.dtsi51 compatible = "marvell,mvebu-devbus";
61 compatible = "marvell,mvebu-devbus";
71 compatible = "marvell,mvebu-devbus";
81 compatible = "marvell,mvebu-devbus";
91 compatible = "marvell,mvebu-devbus";
/openbmc/u-boot/arch/arm/dts/
H A Darmada-370-xp.dtsi90 compatible = "marvell,mvebu-devbus";
100 compatible = "marvell,mvebu-devbus";
110 compatible = "marvell,mvebu-devbus";
120 compatible = "marvell,mvebu-devbus";
130 compatible = "marvell,mvebu-devbus";
H A Darmada-cp110-master.dtsi122 compatible = "marvell,mvebu-pinctrl",
244 compatible = "marvell,mvebu-comphy", "marvell,comphy-cp110";
252 compatible = "marvell,mvebu-utmi-2.6.0";
261 compatible = "marvell,mvebu-utmi-2.6.0";
278 compatible = "marvell,mvebu-pxa3xx-nand";
H A Darmada-38x.dtsi50 compatible = "marvell,mvebu-devbus";
60 compatible = "marvell,mvebu-devbus";
70 compatible = "marvell,mvebu-devbus";
80 compatible = "marvell,mvebu-devbus";
90 compatible = "marvell,mvebu-devbus";
340 coreclk: mvebu-sar@18600 {
557 compatible = "marvell,armada370-nand","marvell,mvebu-pxa3xx-nand";
/openbmc/linux/drivers/pci/controller/
H A Dpci-mvebu.c261 * as read-only but this mvebu controller has it as read-write and must in mvebu_pcie_setup_hw()
279 * Note that this mvebu PCI Bridge does not have compliant Type 1 in mvebu_pcie_setup_hw()
286 * different things: they are aliased into internal mvebu registers in mvebu_pcie_setup_hw()
291 * access to configuration space via internal mvebu registers or in mvebu_pcie_setup_hw()
294 * also via standard mvebu way for accessing PCI config space. in mvebu_pcie_setup_hw()
587 * secondary bus number which is mvebu local bus number. in mvebu_pci_bridge_emul_base_conf_read()
923 * Older mvebu hardware provides PCIe Capability structure only in in mvebu_pci_bridge_emul_init()
934 * Set physical slot number to port+1 as mvebu ports are indexed from in mvebu_pci_bridge_emul_init()
936 * as Root Port which is not mvebu case. in mvebu_pci_bridge_emul_init()
1046 .name = "mvebu-INTx",
[all …]
/openbmc/linux/include/linux/
H A Dmbus.h75 * On all ARM32 MVEBU platforms with MBus support, this stub in mvebu_mbus_get_io_win_info()
77 * MBus driver is called instead. ARM64 MVEBU platforms like in mvebu_mbus_get_io_win_info()
/openbmc/u-boot/drivers/usb/host/
H A DKconfig33 bool "MVEBU USB 3.0 support"
38 Choose this option to add support for USB 3.0 driver on mvebu
140 Enables support for the on-chip EHCI controller on MVEBU SoCs.
/openbmc/u-boot/arch/arm/mach-mvebu/
H A DKconfig191 default "mvebu"
213 Enable support for reading and writing eFuses on mvebu SoCs.
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmvebu-core-clock.txt1 * Core Clock bindings for Marvell MVEBU SoCs
3 Marvell MVEBU SoCs usually allow to determine core clock frequencies by

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