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Searched +full:mt8192 +full:- +full:vdecsys_soc (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/arm/mediatek/
H A Dmediatek,mt8192-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8192-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek Functional Clock Controller for MT8192
10 - Chun-Jie Chen <chun-jie.chen@mediatek.com>
13 The Mediatek functional clock controller provides various clocks on MT8192.
18 - enum:
19 - mediatek,mt8192-scp_adsp
20 - mediatek,mt8192-imp_iic_wrap_c
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/openbmc/linux/drivers/clk/mediatek/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
360 to PCI-E and USB.
390 to PCI-E and USB.
677 This driver supports MediaTek MT8186 vdecsys and vdecsys_soc clocks.
742 This driver supports MediaTek MT8188 vdecsys and vdecsys_soc clocks.
773 tristate "Clock driver for MediaTek MT8192"
779 This driver supports MediaTek MT8192 basic clocks.
782 tristate "Clock driver for MediaTek MT8192 audsys"
786 This driver supports MediaTek MT8192 audsys clocks.
789 tristate "Clock driver for MediaTek MT8192 camsys"
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H A Dclk-mt8192-vdec.c1 // SPDX-License-Identifier: GPL-2.0-only
4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
6 #include <linux/clk-provider.h>
10 #include "clk-mtk.h"
11 #include "clk-gate.h"
13 #include <dt-bindings/clock/mt8192-clk.h>
76 .compatible = "mediatek,mt8192-vdecsys",
79 .compatible = "mediatek,mt8192-vdecsys_soc",
91 .name = "clk-mt8192-vdec",
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dmediatek,vcodec-subdev-decoder.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yunfei Dong <yunfei.dong@mediatek.com>
20 +------------------------------------------------+-------------------------------------+
22 | input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output |
24 +------------||-------------||-------------------+---------------------||--------------+
26 -------------||-------------||-------------------|---------------------||---------------
27 ||<------------||----------------HW index---------------->|| <child>
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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8192-clk.h>
9 #include <dt-bindings/gce/mt8192-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8192-larb-port.h>
13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14 #include <dt-bindings/phy/phy.h>
15 #include <dt-bindings/power/mt8192-power.h>
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H A Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
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