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Searched full:mpr (Results 1 – 25 of 33) sorted by relevance

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/openbmc/u-boot/arch/arm/include/asm/arch-mx25/
H A Dmacro.h25 * - MPR: Set all MPROTx to be non-bufferable, trusted for R/W, not forced to
28 .macro init_aips mpr=0x77777777
30 ldr r1, =\mpr
42 * - MPR: priority is IAHB > DAHB > USBOTG > RTIC > eSDHC2/SDMA
46 .macro init_max mpr=0x00043210, sgpcr=0x00000010, mgpcr=0x00000000
48 ldr r1, =\mpr
/openbmc/u-boot/arch/arm/include/asm/arch-mx35/
H A Dlowlevel_macro.S17 * - MPR: Set all MPROTx to be non-bufferable, trusted for R/W, not forced to
22 .macro init_aips mpr=0x77777777, opacr=0x00000000 argument
24 ldr r1, =\mpr
49 * - MPR: priority is M4 > M2 > M3 > M5 > M0 > M1
53 .macro init_max mpr=0x00302154, sgpcr=0x00000010, mgpcr=0x00000000 argument
55 ldr r1, =\mpr
/openbmc/linux/sound/firewire/
H A Dcmp.c17 /* MPR common fields */
126 u32 mpr; in cmp_connection_init() local
134 mpr = be32_to_cpu(mpr_be); in cmp_connection_init()
136 if (pcr_index >= (mpr & MPR_PLUGS_MASK)) in cmp_connection_init()
147 c->max_speed = (mpr & MPR_SPEED_MASK) >> MPR_SPEED_SHIFT; in cmp_connection_init()
149 c->max_speed += (mpr & MPR_XSPEED_MASK) >> MPR_XSPEED_SHIFT; in cmp_connection_init()
/openbmc/linux/Documentation/devicetree/bindings/iio/pressure/
H A Dhoneywell,mprls0025pa.yaml19 calls them "mpr series". All of them have the identical programming model and
34 micropressure-mpr-series/documents/
35 sps-siot-mpr-series-datasheet-32332628-ciid-172626.pdf
/openbmc/linux/drivers/net/ethernet/renesas/
H A Dsh_eth.h69 MPR, enumerator
341 /* MPR */
506 unsigned mpr:1; /* EtherC has MPR */ member
H A Dsh_eth.c89 [MPR] = 0x0558,
164 [MPR] = 0x0358,
212 [MPR] = 0x0158,
298 [MPR] = 0x01bc,
565 .mpr = 1,
614 .mpr = 1,
671 .mpr = 1,
705 .mpr = 1,
740 .mpr = 1,
786 .mpr = 1,
[all …]
H A Dravb.h193 MPR = 0x0558, enumerator
861 /* MPR */
/openbmc/u-boot/drivers/net/
H A Dsh_eth.h144 MPR, enumerator
209 [MPR] = 0x0558,
241 [MPR] = 0x0158,
572 /* MPR */
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_mc.h70 u32 mpr; /* 0x0C MC Master Priority Register */ member
/openbmc/linux/drivers/iio/pressure/
H A Dmprls0025pa.c10 * micropressure-mpr-series/documents/
11 * sps-siot-mpr-series-datasheet-32332628-ciid-172626.pdf
/openbmc/qemu/tests/bench/
H A Datomic_add-bench.c146 c = getopt(argc, argv, "hd:n:mpr:"); in parse_args()
/openbmc/linux/sound/pci/ctxfi/
H A Dcthw20k2.c87 u16 mpr:1; member
100 unsigned int mpr; member
324 set_field(&ctl->mpr, MPRLH_PITCH, pitch); in src_set_pitch()
325 ctl->dirty.bf.mpr = 1; in src_set_pitch()
377 if (ctl->dirty.bf.mpr) { in src_commit_write()
383 hw_write_20kx(hw, MIXER_PRING_LO_HI+4*pm_idx, ctl->mpr); in src_commit_write()
386 ctl->dirty.bf.mpr = 0; in src_commit_write()
H A Dcthw20k1.c87 u16 mpr:1; member
100 unsigned int mpr; member
324 set_field(&ctl->mpr, MPRLH_PITCH, pitch); in src_set_pitch()
325 ctl->dirty.bf.mpr = 1; in src_set_pitch()
377 if (ctl->dirty.bf.mpr) { in src_commit_write()
383 hw_write_20kx(hw, PRING_LO_HI+4*pm_idx, ctl->mpr); in src_commit_write()
386 ctl->dirty.bf.mpr = 0; in src_commit_write()
/openbmc/u-boot/arch/m68k/cpu/mcf5227x/
H A Dcpu_init.c38 out_be32(&scm1->mpr, 0x77777777); in cpu_init_f()
/openbmc/u-boot/arch/m68k/include/asm/
H A Dimmap_5275.h74 u8 mpr; member
H A Dimmap_520x.h48 u32 mpr; /* 0x00 Master Privilege */ member
H A Dimmap_5235.h71 u8 mpr; /* 0x20 */ member
H A Dimmap_5227x.h196 u32 mpr; /* 0x00 Master Privilege */ member
H A Dimmap_5301x.h65 u32 mpr; /* 0x00 Master Privilege */ member
/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A Dddrphy-regs.h101 #define PHY_DTCR_DTMPR BIT(6) /* Data Training using MPR */
/openbmc/linux/arch/csky/abiv2/inc/abi/
H A Dentry.h269 mtcr r6, cr<6, 15> /* Set MPR with 4K page size */
/openbmc/docs/designs/
H A Dpower-systems-memory-preserving-reboot.md48 - **Memory Preserving Reboot (MPR)**: A method of reboot with preserving the
H A Ddump-manager.md22 - **Memory Preserving Reboot(MPR)**: A method of reboot with preserving the
/openbmc/u-boot/arch/m68k/cpu/mcf532x/
H A Dcpu_init.c29 out_be32(&scm1->mpr, 0x77777777); in cpu_init_f()
/openbmc/qemu/hw/alpha/
H A Dtyphoon.c150 /* MPR: Memory Programming Register. */ in cchip_read()
406 /* MPR: Memory Programming Register. */ in cchip_write()

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