/openbmc/u-boot/arch/mips/ |
H A D | Kconfig | 8 default "mips32" if CPU_MIPS32 16 bool "Support qemu-mips" 63 bool "Support MSCC VCore-III" 150 source "board/qemu-mips/Kconfig" 151 source "arch/mips/mach-ath79/Kconfig" 152 source "arch/mips/mach-mscc/Kconfig" 153 source "arch/mips/mach-bmips/Kconfig" 154 source "arch/mips/mach-jz47xx/Kconfig" 155 source "arch/mips/mach-pic32/Kconfig" 156 source "arch/mips/mach-mt7620/Kconfig" [all …]
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/openbmc/linux/arch/mips/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 135 bool "Generic board-agnostic MIPS kernel" 224 Support for the Texas Instruments AR7 System-on-a-Chip 298 Build a generic DT-based kernel image that boots on select 299 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 391 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 392 DECstation porting pages on <http://decstation.unix-ag.org/>. 432 Olivetti M700-10 workstations. 468 bool "Loongson 32-bit family of machines" 471 This enables support for the Loongson-1 family of machines. [all …]
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H A D | Makefile | 11 # architecture-specific flags and dependencies. 15 $(Q)$(MAKE) $(build)=arch/mips/tools elf-entry 17 $(Q)$(MAKE) $(build)=arch/mips/tools loongson3-llsc-check 28 32bit-tool-archpref = mipsel 29 64bit-tool-archpref = mips64el 30 32bit-bfd = elf32-tradlittlemips 31 64bit-bfd = elf64-tradlittlemips 32 32bit-emul = elf32ltsmip 33 64bit-emul = elf64ltsmip 35 32bit-tool-archpref = mips [all …]
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/openbmc/openbmc/poky/meta/classes-recipe/ |
H A D | rust-target-config.bbclass | 4 # SPDX-License-Identifier: MIT 7 # Right now this is focused on arm-specific tune features. 8 # We get away with this for now as one can only use x86-64 as the build host 26 f.append("-d32") 31 f.append("-d32") 38 f.append("-neon") 40 if 'mips32' in feat: 41 f.append("+mips32") 52 f.append("+strict-align") 55 f.append("+strict-align") [all …]
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/openbmc/u-boot/arch/mips/include/asm/ |
H A D | sgidefs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 11 * Using a Linux compiler for building Linux seems logic but not to 15 #error Use a Linux compiler or give up. 21 * With the introduction of MIPS32 / MIPS64 instruction sets definitions
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H A D | mipsregs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 80 * by Linux. A future ELKS port might take make Linux run on them 127 /* MIPS32/64 EntryLo bit definitions */ 129 #define MIPS_ENTRYLO_XI (_ULCAST_(1) << (BITS_PER_LONG - 2)) 130 #define MIPS_ENTRYLO_RI (_ULCAST_(1) << (BITS_PER_LONG - 1)) 189 /* MIPS32/64 EntryHI bit definitions */ 453 /* Bits specific to the MIPS32/64 PRA. */ 463 * Bits in the MIPS32/64 PRA coprocessor 0 config registers 1 and above. 542 /* bits 10:8 in FTLB-only configurations */ 544 /* bits 12:8 in VTLB-FTLB only configurations */ [all …]
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/openbmc/openbmc/poky/meta/recipes-devtools/gdb/gdb/ |
H A D | 0001-mips-linux-nat-Define-_ABIO32-if-not-defined.patch | 4 Subject: [PATCH] mips-linux-nat: Define _ABIO32 if not defined 9 case gcc emits it as built-in define and hence 10 it works ok for mips32 12 Upstream-Status: Pending 13 Signed-off-by: Khem Raj <raj.khem@gmail.com> 14 --- 15 gdb/mips-linux-nat.c | 4 ++++ 18 diff --git a/gdb/mips-linux-nat.c b/gdb/mips-linux-nat.c 20 --- a/gdb/mips-linux-nat.c 21 +++ b/gdb/mips-linux-nat.c [all …]
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/openbmc/linux/arch/mips/mm/ |
H A D | sc-mips.c | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <linux/init.h> 6 #include <linux/kernel.h> 7 #include <linux/sched.h> 8 #include <linux/mm.h> 10 #include <asm/cpu-type.h> 17 #include <asm/mips-cps.h> 21 * MIPS32/MIPS64 L2 cache handling 38 unsigned long almask = ~(lsize - 1); in mips_sc_inv() 41 cache_op(Hit_Writeback_Inv_SD, (addr + size - 1) & almask); in mips_sc_inv() [all …]
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/openbmc/linux/arch/mips/include/uapi/asm/ |
H A D | resource.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 15 * These five resource limit IDs have a MIPS/Linux-specific ordering, 22 #define RLIMIT_MEMLOCK 9 /* max locked-in-memory address space */ 27 * but we keep the old value on MIPS32, 34 #include <asm-generic/resource.h>
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H A D | sgidefs.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 17 * With the introduction of MIPS32 / MIPS64 instruction sets definitions
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H A D | sembuf.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 12 * Pad space is left for 2 miscellaneous 64-bit values on mips64, 13 * but used for the upper 32 bit of the time values on mips32.
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H A D | ptrace.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 13 #include <linux/types.h> 15 /* 0 - 31 are integer registers, 32 - 63 are fp registers. */ 30 * format is the same for both 32- and 64-bit processes. Registers for 32-bit 80 * bit 0 -- 1 if W bit is usable. 81 * bit 1 -- 1 if R bit is usable. 82 * bit 2 -- 1 if I bit is usable. 83 * bits 3 - 11 -- Valid watchhi mask bits. 100 struct mips32_watch_regs mips32; member
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H A D | inst.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 97 * Bits 10-6 minor opcode for r6 spec mult/div encodings 253 * func field for page table walker (Loongson-3). 757 struct ps_format { /* MIPS-3D / paired single format */ 819 * microMIPS instruction formats (32-bit length) 823 * if it is MIPS32 instruction re-encoded for use in the microMIPS ASE. 825 struct fb_format { /* FPU branch format (MIPS32) */ 834 struct fp0_format { /* FPU multiply and add format (MIPS32) */ 855 struct fp1_format { /* FPU mfc1 and cfc1 format (MIPS32) */ 946 struct mm_m_format { /* Multi-word load/store format (microMIPS) */ [all …]
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/openbmc/linux/tools/testing/ktest/examples/ |
H A D | crosstests.conf | 14 # /usr/local/gcc-4.5.2-nolibc/mips-linux/bin/mips-linux-gcc 16 # Some of the archs will use gcc-4.5.1 instead of gcc-4.5.2 30 BUILD_DIR = ${THIS_DIR}/linux.git 33 OUTPUT_DIR = ${THIS_DIR}/cross-compile 35 # The build will be compiled with -j8 36 BUILD_OPTIONS = -j8 78 MAKE_CMD = PATH=/usr/local/gcc-${GCC_VER}-nolibc/${CROSS}/bin:$PATH CROSS_COMPILE=${CROSS}- make AR… 84 # the add-config file and uncomment this option. This is useful if you want to test 86 #ADD_CONFIG = ${THIS_DIR}/add-config 101 CROSS = alpha-linux [all …]
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/openbmc/qemu/linux-headers/asm-mips/ |
H A D | sgidefs.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 17 * With the introduction of MIPS32 / MIPS64 instruction sets definitions
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/openbmc/u-boot/doc/ |
H A D | README.mips | 2 Notes for the MIPS architecture port of U-Boot 5 ---------- 11 Embedded Debian -- Cross-development toolchains 17 ------------ 23 incoherency in most cases, unless the code gets loaded after U-Boot 24 re-initializes the cache. The more common uImage 'bootm' command does 31 * Note that Linux users need to kill dcache_disable() in do_bootelf_exec() 32 or override do_bootelf_exec() not to disable I-/D-caches, because most 33 Linux/MIPS ports don't re-enable caches after entering kernel_entry. 36 ----- [all …]
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/openbmc/linux/arch/mips/kernel/ |
H A D | genex.S | 6 * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle 11 #include <linux/init.h> 75 * load / store will be re-executed. 79 li k1, -4 # Is this ... 211 PTR_LI t1, ~(_THREAD_SIZE-1) 323 PTR_LI t1, ~(_THREAD_SIZE-1) 406 .set mips32 define 448 * Clear ERL - restore segment mapping 449 * Clear BEV - required for page fault exception handler to work 504 * register. All GSExc-equipped processors have MIPS32. [all …]
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H A D | idle.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 * Copyright (C) 1994 - 2006 Ralf Baechle 10 #include <linux/cpu.h> 11 #include <linux/export.h> 12 #include <linux/init.h> 13 #include <linux/irqflags.h> 14 #include <linux/printk.h> 15 #include <linux/sched.h> 17 #include <asm/cpu-info.h> 18 #include <asm/cpu-type.h> [all …]
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/openbmc/openbmc/poky/meta/recipes-connectivity/openssl/openssl/ |
H A D | 0001-Configure-do-not-tweak-mips-cflags.patch | 3 Date: Tue, 30 May 2023 09:11:27 -0700 8 | Error: -mips3 conflicts with the other architecture options, which imply -mips64r2 10 Upstream-Status: Inappropriate [oe-core specific] 11 Signed-off-by: Alexander Kanavin <alex@linutronix.de> 13 Refreshed for openssl-3.1.1 14 Signed-off-by: Tim Orling <tim.orling@konsulko.com> 15 --- 16 Configure | 10 ---------- 17 1 file changed, 10 deletions(-) 19 diff --git a/Configure b/Configure [all …]
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/mozjs/mozjs-128/ |
H A D | riscv32.patch | 3 Date: Sun, 24 Oct 2021 22:32:50 -0700 6 Upstream-Status: Pending 7 Signed-off-by: Khem Raj <raj.khem@gmail.com> 8 --- 14 diff --git a/build/moz.configure/init.configure b/build/moz.configure/init.configure 16 --- a/build/moz.configure/init.configure 18 @@ -594,6 +594,9 @@ def split_triplet(triplet, allow_wasi=False): 28 diff --git a/python/mozbuild/mozbuild/configure/constants.py b/python/mozbuild/mozbuild/configure/c… 30 --- a/python/mozbuild/mozbuild/configure/constants.py 32 @@ -73,6 +73,7 @@ CPU_bitness = { [all …]
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/openbmc/linux/arch/mips/alchemy/ |
H A D | board-xxs1500.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 10 #include <linux/kernel.h> 11 #include <linux/init.h> 12 #include <linux/interrupt.h> 13 #include <linux/platform_device.h> 14 #include <linux/gpio.h> 15 #include <linux/delay.h> 16 #include <linux/pm.h> 20 #include <asm/mach-au1x00/au1000.h> 21 #include <asm/mach-au1x00/gpio-au1000.h> [all …]
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/openbmc/linux/tools/testing/selftests/vDSO/ |
H A D | vdso_test_clock_getres.c | 1 // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note 7 * gcc -std=gnu99 vdso_clock_getres.c 9 * Tested on ARM, ARM64, MIPS32, x86 (32-bit and 64-bit), 10 * Power (32-bit and 64-bit), S390x (32-bit and 64-bit).
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/openbmc/openbmc/poky/meta/recipes-devtools/valgrind/ |
H A D | valgrind_3.23.0.bb | 5 LICENSE = "GPL-2.0-only & GPL-2.0-or-later & BSD-3-Clause" 15 SRC_URI = "https://sourceware.org/pub/valgrind/valgrind-${PV}.tar.bz2 \ 16 file://fixed-perl-path.patch \ 17 file://Added-support-for-PPC-instructions-mfatbu-mfatbl.patch \ 18 file://run-ptest \ 19 file://remove-for-aarch64 \ 20 file://remove-for-all \ 22 file://0005-Modify-vg_test-wrapper-to-support-PTEST-formats.patch \ 23 file://use-appropriate-march-mcpu-mfpu-for-ARM-test-apps.patch \ 24 file://avoid-neon-for-targets-which-don-t-support-it.patch \ [all …]
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/openbmc/linux/arch/mips/include/asm/ |
H A D | cpu.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 12 #include <linux/bits.h> 15 As of the MIPS32 and MIPS64 specs from MTI, the PRId register (CP0 18 +----------------+----------------+----------------+----------------+ 20 +----------------+----------------+----------------+----------------+ 24 that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64 92 #define PRID_IMP_LOONGSON_32 0x4200 /* Loongson-1 */ 95 #define PRID_IMP_LOONGSON_64R 0x6100 /* Reduced Loongson-2 */ 96 #define PRID_IMP_LOONGSON_64C 0x6300 /* Classic Loongson-2 and Loongson-3 */ 97 #define PRID_IMP_LOONGSON_64G 0xc000 /* Generic Loongson-2 and Loongson-3 */ [all …]
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H A D | elf.h | 11 #include <linux/auxvec.h> 12 #include <linux/fs.h> 13 #include <linux/mm_types.h> 15 #include <uapi/linux/elf.h> 21 #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */ 22 #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */ 23 #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */ 24 #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */ 25 #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ 26 #define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */ [all …]
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