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/openbmc/qemu/hw/pci-host/
H A Dq35.c2 * QEMU MCH/ICH9 PCI Bridge Emulation
53 memory_region_add_subregion(s->mch.address_space_io, in q35_host_realize()
57 memory_region_add_subregion(s->mch.address_space_io, in q35_host_realize()
66 s->mch.pci_address_space, in q35_host_realize()
67 s->mch.address_space_io, in q35_host_realize()
70 qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal); in q35_host_realize()
87 val64 = range_is_empty(&s->mch.pci_hole) in q35_host_get_pci_hole_start()
88 ? 0 : range_lob(&s->mch.pci_hole); in q35_host_get_pci_hole_start()
102 val64 = range_is_empty(&s->mch.pci_hole) in q35_host_get_pci_hole_end()
103 ? 0 : range_upb(&s->mch.pci_hole) + 1; in q35_host_get_pci_hole_end()
[all …]
/openbmc/qemu/hw/core/
H A Dnull-machine.c20 static void machine_none_init(MachineState *mch) in machine_none_init() argument
25 if (mch->cpu_type) { in machine_none_init()
26 cpu = cpu_create(mch->cpu_type); in machine_none_init()
34 if (mch->ram) { in machine_none_init()
35 memory_region_add_subregion(get_system_memory(), 0, mch->ram); in machine_none_init()
38 if (mch->kernel_filename) { in machine_none_init()
/openbmc/linux/drivers/pnp/
H A Dquirks.c331 /* Device IDs of parts that have 32KB MCH space */
358 struct resource mch; in quirk_intel_mch() local
367 * MCHBAR is not an architected PCI BAR, so MCH space is usually in quirk_intel_mch()
368 * reported as a PNP0C02 resource. The MCH space was originally in quirk_intel_mch()
371 * MCH space is consumed but unreported. in quirk_intel_mch()
385 memset(&mch, 0, sizeof(mch)); in quirk_intel_mch()
386 mch.flags = IORESOURCE_MEM; in quirk_intel_mch()
387 pcibios_bus_to_resource(host->bus, &mch, &region); in quirk_intel_mch()
391 if (res->end < mch.start || res->start > mch.end) in quirk_intel_mch()
393 if (res->start == mch.start && res->end == mch.end) in quirk_intel_mch()
[all …]
/openbmc/qemu/tests/functional/
H A Dtest_arm_microbit.py26 exec_command_and_wait_for_pattern(self, 'import machine as mch', '>>>')
27 exec_command_and_wait_for_pattern(self, 'mch.reset()', 'MicroPython')
/openbmc/linux/drivers/gpu/drm/i915/
H A Dintel_mchbar_regs.h31 /* Pineview MCH register contains DDR3 setting */
35 /* 915-945 and GM965 MCH register controlling DRAM channel access */
46 /* 965 MCH register controlling DRAM channel configuration */
139 /* snb MCH registers for reading the DRAM channel configuration */
225 /* snb MCH registers for priority tuning */
/openbmc/linux/drivers/video/fbdev/vermilion/
H A Dcr_pll.c147 "Could not find Carillo Ranch MCH device.\n"); in cr_pll_init()
154 "Carillo Ranch MCH device was not enabled.\n"); in cr_pll_init()
165 "Carillo Ranch MCH device was not enabled.\n"); in cr_pll_init()
/openbmc/qemu/include/hw/pci-host/
H A Dq35.h35 #define TYPE_MCH_PCI_DEVICE "mch"
67 MCHPCIState mch; member
78 #define MCH_HOST_BRIDGE "MCH"
/openbmc/linux/drivers/hwmon/
H A Dabituguru3.c192 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
193 { "MCH 2.5V", 5, 0, 20, 1, 0 },
214 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
215 { "MCH 2.5V", 5, 0, 20, 1, 0 },
243 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
244 { "MCH 2.5V", 5, 0, 20, 1, 0 },
265 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
266 { "MCH 2.5V", 5, 0, 20, 1, 0 },
357 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
358 { "MCH 2.5V", 5, 0, 20, 1, 0 },
[all …]
/openbmc/linux/drivers/edac/
H A DKconfig186 i5400 MCH chipset (Seaburg).
220 tristate "Intel San Clemente MCH"
224 San Clemente MCH.
227 tristate "Intel Clarksboro MCH"
231 Clarksboro MCH (Intel 7300 chipset).
H A Di3000_edac.c27 #define I3000_MCHBAR 0x44 /* MCH Memory Mapped Register BAR */
76 * 11 MCH Thermal Sensor Event
92 * 11 SERR on MCH Thermal Sensor Event
H A Dx38_edac.c31 #define X38_MCHBAR_LOW 0x48 /* MCH Memory Mapped Register BAR */
52 * 11 MCH Thermal Sensor Event
H A Di7300_edac.c10 * Intel 7300 Chipset Memory Controller Hub (MCH) - Datasheet
258 [31] = "Internal MCH Fatal Error",
274 [15] = "Internal MCH Non-Fatal Error",
924 * i7300_get_devices() - Find and perform 'get' operation on the MCH's
941 /* Attempt to 'get' the MCH register we want */ in i7300_get_devices()
H A Di3200_edac.c31 #define I3200_MCHBAR_LOW 0x48 /* MCH Memory Mapped Register BAR */
52 * 11 MCH Thermal Sensor Event
H A Di5000_edac.c12 * Intel 5000X Chipset Memory Controller Hub (MCH) - Datasheet
357 /* I5000 MCH error information retrieved from Hardware */
774 * i5000_get_devices Find and perform 'get' operation on the MCH's
787 /* Attempt to 'get' the MCH register we want */ in i5000_get_devices()
813 /* Attempt to 'get' the MCH register we want */ in i5000_get_devices()
H A Di5400_edac.c18 * Intel 5400 Chipset Memory Controller Hub (MCH) - Datasheet
357 /* I5400 MCH error information retrieved from Hardware */
713 * i5400_get_devices Find and perform 'get' operation on the MCH's
729 /* Attempt to 'get' the MCH register we want */ in i5400_get_devices()
/openbmc/linux/arch/s390/kernel/
H A Dnmi.c178 * So we just stop listening for the WARNING MCH and avoid continuously in s390_handle_mcck()
188 __ctl_clear_bit(14, 24); /* Disable WARNING MCH */ in s390_handle_mcck()
508 ctl_set_bit(14, 25); /* enable external damage MCH */ in machine_check_init()
509 ctl_set_bit(14, 27); /* enable system recovery MCH */ in machine_check_init()
510 ctl_set_bit(14, 24); /* enable warning MCH */ in machine_check_init()
/openbmc/qemu/pc-bios/
H A Dpetalogix-s3adsp1800.dts132 compatible = "xlnx,xps-mch-emc-2.00.a\0cfi-flash";
143 xlnx,mch-native-dwidth = <0x20>;
144 xlnx,mch-plb-clk-period-ps = <0x3e80>;
145 xlnx,mch-splb-awidth = <0x20>;
/openbmc/linux/arch/microblaze/boot/dts/
H A Dsystem.dts125 compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash";
136 xlnx,mch-native-dwidth = <0x20>;
137 xlnx,mch-plb-clk-period-ps = <0x1f40>;
138 xlnx,mch-splb-awidth = <0x20>;
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dmediatek,mt6331-regulator.yaml39 "^ldo-v(dig18|emc33|ibr|mc|mch|mipi|rtc|sram|usb10)$":
45 pattern: "^v(dig18|emc33|ibr|mc|mch|mipi|rtc|sram|usb10)$"
/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Dampdu.c643 u16 mch; in brcms_c_ampdu_finalize() local
768 mch = le16_to_cpu(txh->MacTxControlHigh); in brcms_c_ampdu_finalize()
773 if ((mch & TXC_PREAMBLE_RTS_MAIN_SHORT) == in brcms_c_ampdu_finalize()
777 if ((mch & TXC_PREAMBLE_RTS_FB_SHORT) == in brcms_c_ampdu_finalize()
801 mch |= TXC_AMPDU_FBR; in brcms_c_ampdu_finalize()
802 txh->MacTxControlHigh = cpu_to_le16(mch); in brcms_c_ampdu_finalize()
/openbmc/linux/drivers/gpu/drm/i915/soc/
H A Dintel_gmch.c35 /* Allocate space for the MCH regs if needed, return nonzero on error */
/openbmc/linux/drivers/s390/cio/
H A Dcrw.c159 ctl_set_bit(14, 28); /* enable channel report MCH */ in crw_machine_check_init()
/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dmtd-physmap.yaml50 - xlnx,xps-mch-emc-2.00.a
/openbmc/linux/drivers/platform/x86/
H A Dintel_ips.c322 /* Optional MCH interfaces for if i915 is in use */
647 * Check the MCH temp & power against their maximums.
845 return 0; /* MCH temp reporting buggy */ in read_mgtv()
1060 /* MCH */ in ips_monitor()
/openbmc/qemu/tests/qtest/
H A Dq35-test.c134 qts = qtest_initf("-M q35 -m %uM -global mch.extended-tseg-mbytes=%u", in test_tseg_size()

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