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/openbmc/linux/drivers/gpio/
H A Dgpio-cs5535.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2007-2009 Andres Salomon <dilinger@collabora.co.uk>
17 #define DRV_NAME "cs5535-gpio"
21 * 31-29,23 : reserved (always mask out)
24 * 22-16 : LPC
44 * design pattern, see Documentation/driver-api/driver-model/design-patterns.rst
51 spinlock_t lock; member
63 unsigned long addr = chip->base + 0x80 + reg; in errata_outl()
68 * non-selected bits; the recommended workaround is a in errata_outl()
69 * read-modify-write operation. in errata_outl()
[all …]
H A Dgpio-max730x.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * - DIN must be stable at the rising edge of clock.
12 * - when writing:
13 * - always clock in 16 clocks at once
14 * - at DIN: D15 first, D0 last
15 * - D0..D7 = databyte, D8..D14 = commandbyte
16 * - D15 = low -> write command
17 * - when reading
18 * - always clock in 16 clocks at once
19 * - at DIN: D15 first, D0 last
[all …]
H A Dgpio-siox.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2015-2018 Pengutronix, Uwe Kleine-König <kernel@pengutronix.de>
13 struct mutex lock; member
29 struct gpio_siox_ddata *ddata = dev_get_drvdata(&sdevice->dev); in gpio_siox_set_data()
31 mutex_lock(&ddata->lock); in gpio_siox_set_data()
32 buf[0] = ddata->setdata[0]; in gpio_siox_set_data()
33 mutex_unlock(&ddata->lock); in gpio_siox_set_data()
40 struct gpio_siox_ddata *ddata = dev_get_drvdata(&sdevice->dev); in gpio_siox_get_data()
41 size_t offset; in gpio_siox_get_data() local
44 mutex_lock(&ddata->lock); in gpio_siox_get_data()
[all …]
H A Dgpio-viperboard.c1 // SPDX-License-Identifier: GPL-2.0+
45 u8 offset; member
77 …"gpio-a sampling freq in Hz (default is 1000Hz) valid values: 10, 100, 1000, 10000, 100000, 100000…
79 /* ----- begin of gipo a chip -------------------------------------------- */
82 unsigned int offset) in vprbrd_gpioa_get() argument
86 struct vprbrd *vb = gpio->vb; in vprbrd_gpioa_get()
87 struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf; in vprbrd_gpioa_get()
90 if (gpio->gpioa_out & (1 << offset)) in vprbrd_gpioa_get()
91 return !!(gpio->gpioa_val & (1 << offset)); in vprbrd_gpioa_get()
93 mutex_lock(&vb->lock); in vprbrd_gpioa_get()
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H A Dgpio-sch311x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * GPIO driver for the SMSC SCH311x Super-I/O chips
20 #define DRV_NAME "gpio-sch311x"
44 spinlock_t lock; /* lock for this GPIO block */ member
93 * Super-IO functions
102 return -EBUSY; in sch311x_sio_enter()
132 static int sch311x_gpio_request(struct gpio_chip *chip, unsigned offset) in sch311x_gpio_request() argument
136 if (block->config_regs[offset] == 0) /* GPIO is not available */ in sch311x_gpio_request()
137 return -ENODEV; in sch311x_gpio_request()
139 if (!request_region(block->runtime_reg + block->config_regs[offset], in sch311x_gpio_request()
[all …]
H A Dgpio-aspeed.c1 // SPDX-License-Identifier: GPL-2.0-or-later
45 * @offset_timer: Maps an offset to an @timer_users index, or zero if disabled
58 raw_spinlock_t lock; member
216 return gpio->base + bank->val_regs + GPIO_VAL_VALUE; in bank_reg()
218 return gpio->base + bank->rdata_reg; in bank_reg()
220 return gpio->base + bank->val_regs + GPIO_VAL_DIR; in bank_reg()
222 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE; in bank_reg()
224 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0; in bank_reg()
226 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1; in bank_reg()
228 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2; in bank_reg()
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H A Dgpio-pl061.c1 // SPDX-License-Identifier: GPL-2.0-only
52 raw_spinlock_t lock; member
63 static int pl061_get_direction(struct gpio_chip *gc, unsigned offset) in pl061_get_direction() argument
67 if (readb(pl061->base + GPIODIR) & BIT(offset)) in pl061_get_direction()
73 static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) in pl061_direction_input() argument
79 raw_spin_lock_irqsave(&pl061->lock, flags); in pl061_direction_input()
80 gpiodir = readb(pl061->base + GPIODIR); in pl061_direction_input()
81 gpiodir &= ~(BIT(offset)); in pl061_direction_input()
82 writeb(gpiodir, pl061->base + GPIODIR); in pl061_direction_input()
83 raw_spin_unlock_irqrestore(&pl061->lock, flags); in pl061_direction_input()
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H A Dgpio-timberdale.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #define DRIVER_NAME "timb-gpio"
36 spinlock_t lock; /* mutual exclusion */ member
43 unsigned offset, bool enabled) in timbgpio_update_bit() argument
49 spin_lock_irqsave(&tgpio->lock, flags); in timbgpio_update_bit()
50 reg = ioread32(tgpio->membase + offset); in timbgpio_update_bit()
57 iowrite32(reg, tgpio->membase + offset); in timbgpio_update_bit()
58 spin_unlock_irqrestore(&tgpio->lock, flags); in timbgpio_update_bit()
73 value = ioread32(tgpio->membase + TGPIOVAL); in timbgpio_gpio_get()
89 static int timbgpio_to_irq(struct gpio_chip *gpio, unsigned offset) in timbgpio_to_irq() argument
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H A Dgpio-mockup.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2015-2016 Bamvor Jian Zhang <bamv2005@gmail.com>
39 * struct gpio_pin_status - structure describing a GPIO status
54 struct mutex lock; member
60 unsigned int offset; member
84 unsigned int offset) in __gpio_mockup_get() argument
86 return chip->lines[offset].value; in __gpio_mockup_get()
89 static int gpio_mockup_get(struct gpio_chip *gc, unsigned int offset) in gpio_mockup_get() argument
94 mutex_lock(&chip->lock); in gpio_mockup_get()
95 val = __gpio_mockup_get(chip, offset); in gpio_mockup_get()
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H A Dgpio-omap.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2003-2005 Nokia Corporation
9 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
27 #include <linux/platform_data/gpio-omap.h>
59 raw_spinlock_t lock; member
84 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage)
85 #define LINE_USED(line, offset) (line & (BIT(offset))) argument
112 bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction, in omap_set_gpio_direction()
118 static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, in omap_set_gpio_dataout_reg() argument
121 void __iomem *reg = bank->base; in omap_set_gpio_dataout_reg()
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H A Dgpio-74x164.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
22 struct mutex lock; member
37 return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer, in __gen_74x164_write_config()
38 chip->registers); in __gen_74x164_write_config()
41 static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset) in gen_74x164_get_value() argument
44 u8 bank = chip->registers - 1 - offset / 8; in gen_74x164_get_value()
45 u8 pin = offset % 8; in gen_74x164_get_value()
48 mutex_lock(&chip->lock); in gen_74x164_get_value()
49 ret = (chip->buffer[bank] >> pin) & 0x1; in gen_74x164_get_value()
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H A Dgpio-xgene.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * AppliedMicro X-Gene SoC GPIO Driver
33 spinlock_t lock; member
37 static int xgene_gpio_get(struct gpio_chip *gc, unsigned int offset) in xgene_gpio_get() argument
43 bank_offset = GPIO_DATA_OFFSET + GPIO_BANK_OFFSET(offset); in xgene_gpio_get()
44 bit_offset = GPIO_BIT_OFFSET(offset); in xgene_gpio_get()
45 return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset)); in xgene_gpio_get()
48 static void __xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) in __xgene_gpio_set() argument
54 bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset); in __xgene_gpio_set()
55 bit_offset = GPIO_BIT_OFFSET(offset) + XGENE_GPIOS_PER_BANK; in __xgene_gpio_set()
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H A Dgpio-mb86s7x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/gpio/gpio-mb86s7x.c
24 #include "gpiolib-acpi.h"
34 #define OFFSET(x) BIT((x) % 8) macro
40 spinlock_t lock; member
49 spin_lock_irqsave(&gchip->lock, flags); in mb86s70_gpio_request()
51 val = readl(gchip->base + PFR(gpio)); in mb86s70_gpio_request()
52 val &= ~OFFSET(gpio); in mb86s70_gpio_request()
53 writel(val, gchip->base + PFR(gpio)); in mb86s70_gpio_request()
55 spin_unlock_irqrestore(&gchip->lock, flags); in mb86s70_gpio_request()
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H A Dgpio-sim.c1 // SPDX-License-Identifier: GPL-2.0-or-later
48 struct mutex lock; member
54 unsigned int offset; member
64 unsigned int offset, int value) in gpio_sim_apply_pull() argument
70 gc = &chip->gc; in gpio_sim_apply_pull()
71 desc = &gc->gpiodev->descs[offset]; in gpio_sim_apply_pull()
73 guard(mutex)(&chip->lock); in gpio_sim_apply_pull()
75 if (test_bit(FLAG_REQUESTED, &desc->flags) && in gpio_sim_apply_pull()
76 !test_bit(FLAG_IS_OUT, &desc->flags)) { in gpio_sim_apply_pull()
77 if (value == !!test_bit(offset, chip->value_map)) in gpio_sim_apply_pull()
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H A Dgpio-tangier.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <linux/pinctrl/pinconf-generic.h>
28 #include "gpio-tangier.h"
44 * struct tng_gpio_context - Context to be saved during suspend-resume
61 static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned int offset, in gpio_reg() argument
65 u8 reg_offset = offset / 32; in gpio_reg()
67 return priv->reg_base + reg + reg_offset * 4; in gpio_reg()
70 static void __iomem *gpio_reg_and_bit(struct gpio_chip *chip, unsigned int offset, in gpio_reg_and_bit() argument
74 u8 reg_offset = offset / 32; in gpio_reg_and_bit()
75 u8 shift = offset % 32; in gpio_reg_and_bit()
[all …]
H A Dgpio-aspeed-sgpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
35 raw_spinlock_t lock; member
110 return gpio->base + bank->val_regs + GPIO_VAL_VALUE; in bank_reg()
112 return gpio->base + bank->rdata_reg; in bank_reg()
114 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE; in bank_reg()
116 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0; in bank_reg()
118 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1; in bank_reg()
120 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2; in bank_reg()
122 return gpio->base + bank->irq_regs + GPIO_IRQ_STATUS; in bank_reg()
124 return gpio->base + bank->tolerance_regs; in bank_reg()
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H A Dgpio-reg.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * gpio-reg: single register individually fixed-direction GPIOs
19 #include <linux/gpio/gpio-reg.h>
23 spinlock_t lock; member
33 static int gpio_reg_get_direction(struct gpio_chip *gc, unsigned offset) in gpio_reg_get_direction() argument
37 return r->direction & BIT(offset) ? GPIO_LINE_DIRECTION_IN : in gpio_reg_get_direction()
41 static int gpio_reg_direction_output(struct gpio_chip *gc, unsigned offset, in gpio_reg_direction_output() argument
46 if (r->direction & BIT(offset)) in gpio_reg_direction_output()
47 return -ENOTSUPP; in gpio_reg_direction_output()
49 gc->set(gc, offset, value); in gpio_reg_direction_output()
[all …]
/openbmc/linux/drivers/pinctrl/actions/
H A Dpinctrl-owl.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Author: David Liu <liuwei@actions-semi.com>
25 #include <linux/pinctrl/pinconf-generic.h>
31 #include "../pinctrl-utils.h"
32 #include "pinctrl-owl.h"
35 * struct owl_pinctrl - pinctrl state of the device
39 * @lock: spinlock to protect registers
50 raw_spinlock_t lock; member
74 tmp = readl_relaxed(pctrl->base + reg); in owl_read_field()
75 mask = (1 << width) - 1; in owl_read_field()
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/openbmc/linux/Documentation/locking/
H A Drobust-futex-ABI.rst48 kernel, then it can actually have two such structures - one using 32 bit
56 pointer to a single linked list of 'lock entries', one per lock,
58 to itself, 'head'. The last 'lock entry' points back to the 'head'.
60 The second word, called 'offset', specifies the offset from the
61 address of the associated 'lock entry', plus or minus, of what will
62 be called the 'lock word', from that 'lock entry'. The 'lock word'
63 is always a 32 bit word, unlike the other words above. The 'lock
65 of the thread holding the lock in the bottom 30 bits. See further
69 the address of the 'lock entry', during list insertion and removal,
73 Each 'lock entry' on the single linked list starting at 'head' consists
[all …]
/openbmc/linux/arch/sparc/lib/
H A Dbitext.c1 // SPDX-License-Identifier: GPL-2.0
19 * bit_map_string_get - find and set a bit string in bit map.
24 * Returns offset in the map or -1 if out of space.
30 int offset, count; /* siamese twins */ in bit_map_string_get() local
35 if (t->num_colors) { in bit_map_string_get()
38 align = t->num_colors; in bit_map_string_get()
44 align1 = align - 1; in bit_map_string_get()
47 if (align < 0 || align >= t->size) in bit_map_string_get()
49 if (len <= 0 || len > t->size) in bit_map_string_get()
53 spin_lock(&t->lock); in bit_map_string_get()
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/openbmc/linux/drivers/gpu/drm/lima/
H A Dlima_vm.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
5 #include <linux/dma-mapping.h>
26 #define LIMA_VM_PT_MASK ((1 << LIMA_VM_PD_SHIFT) - 1)
27 #define LIMA_VM_BT_MASK ((1 << LIMA_VM_PB_SHIFT) - 1)
43 vm->bts[pbe].cpu[bte] = 0; in lima_vm_unmap_range()
52 if (!vm->bts[pbe].cpu) { in lima_vm_map_page()
57 vm->bts[pbe].cpu = dma_alloc_wc( in lima_vm_map_page()
58 vm->dev->dev, LIMA_PAGE_SIZE << LIMA_VM_NUM_PT_PER_BT_SHIFT, in lima_vm_map_page()
59 &vm->bts[pbe].dma, GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO); in lima_vm_map_page()
[all …]
/openbmc/linux/drivers/clk/hisilicon/
H A Dreset.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2015-2016 HiSilicon Technologies Co., Ltd.
11 #include <linux/reset-controller.h>
21 spinlock_t lock; member
33 u32 offset; in hisi_reset_of_xlate() local
36 offset = (reset_spec->args[0] << HISI_RESET_OFFSET_SHIFT) in hisi_reset_of_xlate()
38 bit = reset_spec->args[1] & HISI_RESET_BIT_MASK; in hisi_reset_of_xlate()
40 return (offset | bit); in hisi_reset_of_xlate()
48 u32 offset, reg; in hisi_reset_assert() local
51 offset = (id & HISI_RESET_OFFSET_MASK) >> HISI_RESET_OFFSET_SHIFT; in hisi_reset_assert()
[all …]
/openbmc/linux/drivers/pinctrl/spear/
H A Dpinctrl-plgpio.c56 * lock: lock for guarding gpio registers
59 * p2o: function ptr for pin to offset conversion. This is required only for
60 * machines where mapping b/w pin and offset is not 1-to-1.
61 * o2p: function ptr for offset to pin conversion. This is required only for
62 * machines where mapping b/w pin and offset is not 1-to-1.
68 spinlock_t lock; member
73 int (*o2p)(int offset); /* offset_to_pin */
84 u32 offset = PIN_OFFSET(pin); in is_plgpio_set() local
90 return !!(val & (1 << offset)); in is_plgpio_set()
95 u32 offset = PIN_OFFSET(pin); in plgpio_reg_set() local
[all …]
/openbmc/linux/mm/
H A Dswapfile.c1 // SPDX-License-Identifier: GPL-2.0-only
22 #include <linux/blk-cgroup.h>
31 #include <linux/backing-dev.h>
65 /* protected with swap_lock. reading in vm_swap_full() doesn't need lock */
67 static int least_priority = -1;
75 static const char Bad_offset[] = "Bad swap offset entry ";
76 static const char Unused_offset[] = "Unused swap offset entry ";
90 * This uses its own lock instead of swap_lock because when a
91 * swap_info_struct changes between not-full/full, it needs to
92 * add/remove itself to/from this list, but the swap_info_struct->lock
[all …]
/openbmc/linux/drivers/clk/rockchip/
H A Dsoftrst.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/reset-controller.h>
20 spinlock_t lock; member
29 int bank, offset; in rockchip_softrst_assert() local
31 if (softrst->lut) in rockchip_softrst_assert()
32 id = softrst->lut[id]; in rockchip_softrst_assert()
34 bank = id / softrst->num_per_reg; in rockchip_softrst_assert()
35 offset = id % softrst->num_per_reg; in rockchip_softrst_assert()
37 if (softrst->flags & ROCKCHIP_SOFTRST_HIWORD_MASK) { in rockchip_softrst_assert()
38 writel(BIT(offset) | (BIT(offset) << 16), in rockchip_softrst_assert()
[all …]

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