/openbmc/linux/Documentation/devicetree/bindings/gpio/ |
H A D | gpio-latch.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/gpio-latch.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sascha Hauer <s.hauer@pengutronix.de> 14 other GPIOs, like this: 16 CLK0 ----------------------. ,--------. 17 CLK1 -------------------. `--------|> #0 | 19 OUT0 ----------------+--|-----------|D0 Q0|-----|< 20 OUT1 --------------+-|--|-----------|D1 Q1|-----|< [all …]
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/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | tlv320adcx140.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter 11 - Andrew Davis <afd@ti.com> 14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital 15 PDM microphones recording), high-performance audio, analog-to-digital 28 - ti,tlv320adc3140 29 - ti,tlv320adc5140 30 - ti,tlv320adc6140 [all …]
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/openbmc/linux/Documentation/devicetree/bindings/input/touchscreen/ |
H A D | eeti.txt | 4 - compatible: should be "eeti,exc3000-i2c" 5 - reg: I2C address of the chip. Should be set to <0xa> 6 - interrupts: interrupt to which the chip is connected 9 - attn-gpios: A handle to a GPIO to check whether interrupt is still 10 latched. This is necessary for platforms that lack 11 support for level-triggered IRQs. 16 - touchscreen-inverted-x 17 - touchscreen-inverted-y 18 - touchscreen-swapped-x-y 22 i2c-master { [all …]
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/openbmc/skeleton/libopenbmc_intf/ |
H A D | gpio_configs.h | 9 * http://www.apache.org/licenses/LICENSE-2.0 26 /* Optional active high pin enabling writes to latched power_up pins. */ 51 /* Read system configuration for GPIOs. */ 52 gboolean read_gpios(GpioConfigs *gpios); 53 /* Frees internal buffers. Does not free parameter. Does not close GPIOs. */ 54 void free_gpios(GpioConfigs *gpios);
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/openbmc/u-boot/drivers/gpio/ |
H A D | pcf8575_gpio.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ 10 * Driver for TI PCF-8575 16-bit I2C gpio expander. Based on 11 * gpio-pcf857x Linux Kernel(v4.7) driver. 20 * supports PCF8575 16-bit expander by TI and NXP. 29 #include <asm-generic/gpio.h> 34 int gpio_count; /* No. GPIOs supported by the chip */ 36 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. 40 * came out of reset (if any). We can't read the latched output. 45 * our software copy of the "latch" then matches the chip's all-ones [all …]
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/openbmc/linux/drivers/gpio/ |
H A D | gpio-latch.c | 1 // SPDX-License-Identifier: GPL-2.0 10 * CLK0 ----------------------. ,--------. 11 * CLK1 -------------------. `--------|> #0 | 13 * OUT0 ----------------+--|-----------|D0 Q0|-----|< 14 * OUT1 --------------+-|--|-----------|D1 Q1|-----|< 15 * OUT2 ------------+-|-|--|-----------|D2 Q2|-----|< 16 * OUT3 ----------+-|-|-|--|-----------|D3 Q3|-----|< 17 * OUT4 --------+-|-|-|-|--|-----------|D4 Q4|-----|< 18 * OUT5 ------+-|-|-|-|-|--|-----------|D5 Q5|-----|< 19 * OUT6 ----+-|-|-|-|-|-|--|-----------|D6 Q6|-----|< [all …]
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H A D | gpio-ich.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver 19 * Each chunk of 32 GPIOs is manipulated via its own USE_SELx, IO_SELx, and 34 {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */ 35 {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */ 36 {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */ 54 #define ICHX_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start) 55 #define ICHX_READ(reg, base_res) inl((reg) + (base_res)->start) 91 struct ichx_desc *desc; /* Pointer to chipset-specific description */ 97 static int modparam_gpiobase = -1; /* dynamic */ [all …]
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H A D | gpio-pcf857x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 59 * that pin be used as an input; it's not an open-drain model, but acts 60 * a bit like one. This is described as "quasi-bidirectional"; read the 80 /*-------------------------------------------------------------------------*/ 82 /* Talk to 8-bit I/O expander */ 94 /* Talk to 16-bit I/O expander */ 116 /*-------------------------------------------------------------------------*/ 123 mutex_lock(&gpio->lock); in pcf857x_input() 124 gpio->out |= (1 << offset); in pcf857x_input() 125 status = gpio->write(gpio->client, gpio->out); in pcf857x_input() [all …]
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H A D | gpio-mvebu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 15 * non-SMP platforms (Orion, Dove, Kirkwood, Armada 370) and the SMP 19 * - the basic variant, called "orion-gpio", with the simplest 21 * non-SMP Discovery systems 22 * - the mv78200 variant for MV78200 Discovery systems. This variant 26 * - the armadaxp variant for Armada XP systems. This variant keeps 28 * interrupts are used, but adds per-CPU cause/edge mask/level mask 29 * registers n a separate memory area for the per-CPU GPIO 72 /* Armada 8k variant gpios register offsets */ [all …]
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/openbmc/linux/drivers/pinctrl/qcom/ |
H A D | pinctrl-msm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 24 #include <linux/pinctrl/pinconf-generic.h> 32 #include "../pinctrl-utils.h" 34 #include "pinctrl-msm.h" 41 * struct msm_pinctrl - state for a pinctrl-msm device 89 return readl(pctrl->regs[g->tile] + g->name##_reg); \ 94 writel(val, pctrl->regs[g->tile] + g->name##_reg); \ 106 u32 val = g->intr_ack_high ? BIT(g->intr_status_bit) : 0; in MSM_ACCESSOR() 115 return pctrl->soc->ngroups; in msm_get_groups_count() 123 return pctrl->soc->groups[group].grp.name; in msm_get_group_name() [all …]
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/openbmc/linux/drivers/pinctrl/bcm/ |
H A D | pinctrl-bcm2835.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 * pinctrl-nomadik.c, please see original file for copyright information 9 * pinctrl-tegra.c, please see original file for copyright information 32 #include <linux/pinctrl/pinconf-generic.h> 38 #include <dt-bindings/pinctrl/bcm2835.h> 40 #define MODULE_NAME "pinctrl-bcm2835" 58 #define GPPUD 0x94 /* Pin Pull-up/down Enable */ 59 #define GPPUDCLK0 0x98 /* Pin Pull-up/down Enable Clock */ 60 #define GP_GPIO_PUP_PDN_CNTRL_REG0 0xe4 /* 2711 Pin Pull-up/down select */ 240 [IRQ_TYPE_EDGE_RISING] = "edge-rising", [all …]
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/openbmc/linux/drivers/pinctrl/ |
H A D | pinctrl-cy8c95x0.c | 1 // SPDX-License-Identifier: GPL-2.0-only 27 #include <linux/pinctrl/pinconf-generic.h> 82 { "irq-gpios", &cy8c95x0_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER }, 94 ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0); in cy8c95x0_acpi_get_irq() 107 * Since first controller (gpio-sch.c) and second 108 * (gpio-dwapb.c) are at the fixed bases, we may safely 126 * struct cy8c95x0_pinctrl - driver data 421 bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE); in cy8c95x0_write_regs_mask() 423 bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_write_regs_mask() 425 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); in cy8c95x0_write_regs_mask() [all …]
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/openbmc/phosphor-power/phosphor-power-supply/ |
H A D | power_supply.cpp | 56 bindDevice.append("-"); in PowerSupply() 69 // GPIOs are in use by the kernel, meaning it is using gpio-keys. in PowerSupply() 70 // So, I should rely on phosphor-gpio-presence to update D-Bus, and in PowerSupply() 73 // Setup the functions to call when the D-Bus inventory path for the in PowerSupply() 79 [this](auto& msg) { this->inventoryChanged(msg); }); in PowerSupply() 85 [this](auto& msg) { this->inventoryAdded(msg); }); in PowerSupply() 175 std::format("D-Bus property {} access failure exception", in updatePresence() 187 if (presenceGPIO->read() > 0) in updatePresenceGPIO() 217 pmbusIntf->findHwmonDir(); in updatePresenceGPIO() 479 // IBM MFR_SPECIFIC[7] is 12V Current-Share fault. in determineMFRFault() [all …]
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/openbmc/linux/drivers/net/ethernet/amd/xgbe/ |
H A D | xgbe-phy-v2.c | 125 #include "xgbe-common.h" 149 /* Rate-change complete wait/retry count */ 276 ((_x)->extd[XGBE_SFP_EXTD_SFF_8472] && \ 277 !((_x)->extd[XGBE_SFP_EXTD_DIAG] & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE)) 284 #define XGBE_BEL_FUSE_VENDOR "BEL-FUSE " 285 #define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 " 306 /* Re-driver related definitions */ 375 /* Re-driver support */ 399 return pdata->i2c_if.i2c_xfer(pdata, i2c_op); in xgbe_phy_i2c_xfer() 405 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_redrv_write() [all …]
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/openbmc/linux/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x_link.c | 1 /* Copyright 2008-2013 Broadcom Corporation 8 * at http://www.gnu.org/licenses/gpl-2.0.html (the "GPL"). 43 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1) 205 (_phy)->def_md_devad, \ 211 (_phy)->def_md_devad, \ 239 * bnx2x_check_lfa - This function checks if link reinitialization is required, 251 struct bnx2x *bp = params->bp; in bnx2x_check_lfa() 254 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa() 257 /* NOTE: must be first condition checked - in bnx2x_check_lfa() 262 REG_WR(bp, params->lfa_base + in bnx2x_check_lfa() [all …]
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