| /openbmc/linux/arch/x86/lib/ |
| H A D | retpoline.S | 22 int3
41 … __stringify(lfence; ANNOTATE_RETPOLINE_SAFE; jmp *%\reg; int3), X86_FEATURE_RETPOLINE_LFENCE, \
86 int3
112 int3
168 int3
204 int3
205 int3
228 int3
283 * As part of the TEST above, RET is the ModRM byte, and INT3 the imm8.
288 * no branch) which is halted by the INT3.
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| /openbmc/linux/arch/x86/entry/vsyscall/ |
| H A D | vsyscall_emu_64.S | 23 int3
29 int3
35 int3
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| /openbmc/linux/tools/testing/selftests/x86/ |
| H A D | sigreturn.c | 93 * An aligned int3 instruction used as a trampoline. Some of the tests
95 * before the int3.
98 ".type int3, @function\n\t"
100 "int3:\n\t"
102 "int3\n\t"
103 ".size int3, . - int3\n\t"
106 extern char int3[4096];
113 * - code16_sel: A 16-bit LDT code segment pointing to int3.
115 * - npcode32_sel: A 32-bit not-present LDT code segment pointing to int3.
178 if ((unsigned long)int3 > (1ULL << 32) - sizeof(int3)) in setup_ldt()
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| H A D | mov_ss_trap.c | 12 * - INT $N, INT3, INTO, SYSCALL, SYSENTER: enter the kernel and then
160 printf("[RUN]\tMOV SS; INT3\n"); in main()
161 asm volatile ("mov %[ss], %%ss; int3" :: [ss] "m" (ss)); in main()
166 printf("[RUN]\tMOV SS; CS CS INT3\n"); in main()
167 asm volatile ("mov %[ss], %%ss; .byte 0x2e, 0x2e; int3" :: [ss] "m" (ss)); in main()
169 printf("[RUN]\tMOV SS; CSx14 INT3\n"); in main()
170 asm volatile ("mov %[ss], %%ss; .fill 14,1,0x2e; int3" :: [ss] "m" (ss)); in main()
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| H A D | entry_from_vm86.c | 86 "int3\n\t"
94 "int3\n\t"
116 "int3\n\t"
121 "int3\n\t"
202 /* UMIP -- exit with INT3 unless kernel emulation did not trap #GP */ in do_umip_tests()
321 /* INT3 -- should cause #BP */ in main()
322 do_test(&v86, vmcode_int3 - vmcode, VM86_TRAP, 3, "INT3"); in main()
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| /openbmc/linux/arch/x86/kernel/kprobes/ |
| H A D | core.c | 217 * by int3. And the instruction at kp->addr is not modified by kprobes in __recover_probed_insn()
426 /* Prepare reljump or int3 right after instruction */
444 /* Otherwise, put an int3 for trapping singlestep */ in prepare_singlestep()
612 * int3 single stepping. in prepare_emulation()
625 case 0xcc: /* int3 */ in prepare_emulation()
734 /* Add int3 for single-step or booster jmp */ in arch_copy_kprobe()
779 u8 int3 = INT3_INSN_OPCODE; in arch_arm_kprobe() local
781 text_poke(p->addr, &int3, 1); in arch_arm_kprobe()
783 perf_event_text_poke(p->addr, &p->opcode, 1, &int3, 1); in arch_arm_kprobe()
788 u8 int3 = INT3_INSN_OPCODE; in arch_disarm_kprobe() local
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| H A D | opt.c | 466 * Replace breakpoints (INT3) with relative jumps (JMP.d32).
471 * the 4 bytes after the INT3 are unused and can now be overwritten.
498 * Replace a relative jump (JMP.d32) with a breakpoint (INT3).
500 * After that, we can restore the 4 bytes after the INT3 to undo what
502 * unused once the INT3 lands.
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| /openbmc/linux/arch/x86/kernel/ |
| H A D | relocate_kernel_32.S | 98 int3
168 int3
202 int3
222 int3
287 int3
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| H A D | relocate_kernel_64.S | 113 int3
210 int3
231 int3
262 int3
321 int3
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| H A D | alternative.c | 132 * each single-byte NOPs). If @len to fill out is > ASM_NOP_MAX, pad with INT3 and
648 * The compiler is supposed to EMIT an INT3 after every unconditional in patch_retpoline()
650 * or SLS isn't enabled, we still need an INT3 after indirect JMPs in patch_retpoline()
1465 * Self-test for the INT3 based CALL emulation code.
1467 * This exercises int3_emulate_call() to make sure INT3 pt_regs are set up
1468 * properly and that there is a stack gap between the INT3 frame and the
1470 * stack would corrupt the INT3 IRET frame.
1531 * INT3 padded with NOP to CALL_INSN_SIZE. The int3_exception_nb in int3_selftest()
1536 " int3; nop; nop; nop; nop\n\t" in int3_selftest()
2089 * Having observed our INT3 instruction, we now must observe in poke_int3_handler()
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| H A D | ftrace_64.S | 302 int3
306 __stringify(ANNOTATE_UNRET_SAFE; ret; int3), \
373 int3
377 __stringify(ANNOTATE_UNRET_SAFE; ret; int3), \
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| H A D | traps.c | 757 if (kgdb_ll_trap(DIE_INT3, "int3", regs, 0, X86_TRAP_BP, in do_int3()
766 res = notify_die(DIE_INT3, "int3", regs, 0, X86_TRAP_BP, SIGTRAP); in do_int3()
778 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, 0, 0, NULL); in do_int3_user()
787 * INT3. in DEFINE_IDTENTRY_RAW()
794 * and therefore can trigger INT3, hence poke_int3_handler() must in DEFINE_IDTENTRY_RAW()
796 * nmi_enter() because the INT3 could have been hit in any context in DEFINE_IDTENTRY_RAW()
810 die("int3", regs, 0); in DEFINE_IDTENTRY_RAW()
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| /openbmc/linux/arch/mips/sgi-ip22/ |
| H A D | ip22-hpc.c | 49 /* Guiness comes with INT3 which is part of IOC */ in sgihpc_init()
50 sgint = &sgioc->int3; in sgihpc_init()
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| /openbmc/linux/tools/testing/selftests/kvm/x86_64/ |
| H A D | debug_regs.c | 33 * NOTE: sw_bp need to be before the cmd here, because int3 is an in guest_code()
37 asm volatile("sw_bp: int3"); in guest_code()
103 /* Test software BPs - int3 */ in main()
111 "INT3: exit %d exception %d rip 0x%llx (should be 0x%llx)", in main()
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| /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | loongson,liointc.yaml | 51 - const: int3
115 <0x00000000>; /* int3 */
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| /openbmc/linux/arch/x86/um/shared/sysdep/ |
| H A D | stub_64.h | 83 __asm("int3"); in trap_myself()
98 "int3" in remap_stack_and_trap()
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| /openbmc/linux/arch/x86/include/asm/ |
| H A D | linkage.h | 47 #define RET ret; int3
59 #define ASM_RET "ret; int3\n\t"
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| H A D | text-patching.h | 81 __CASE(INT3); in text_opcode_size()
154 * The int3 handler in entry_64.S adds a gap between the in int3_emulate_push()
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| /openbmc/linux/arch/x86/mm/ |
| H A D | mem_encrypt_boot.S | 71 int3
160 int3
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| /openbmc/linux/arch/x86/um/ |
| H A D | stub_64.S | 50 int3
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| H A D | stub_32.S | 56 int3
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| /openbmc/linux/arch/mips/boot/dts/loongson/ |
| H A D | loongson64g-package.dtsi | 38 <0x00000000>; /* int3 */
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| H A D | loongson64c-package.dtsi | 41 <0x00000000>; /* int3 */
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| /openbmc/linux/drivers/pinctrl/ |
| H A D | pinctrl-pic32.c | 279 FUNCTION(INT3, input0),
389 PIC32_PINCTRL_FUNCTION(INT3, INT3R, 13),
539 PIC32_PINCTRL_FUNCTION(INT3, INT3R, 8),
644 PIC32_PINCTRL_FUNCTION(INT3, INT3R, 5),
671 PIC32_PINCTRL_FUNCTION(INT3, INT3R, 6),
749 PIC32_PINCTRL_FUNCTION(INT3, INT3R, 10),
875 PIC32_PINCTRL_FUNCTION(INT3, INT3R, 7),
926 PIC32_PINCTRL_FUNCTION(INT3, INT3R, 0),
1028 PIC32_PINCTRL_FUNCTION(INT3, INT3R, 14),
1170 PIC32_PINCTRL_FUNCTION(INT3, INT3R, 11),
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| /openbmc/qemu/tests/tcg/x86_64/ |
| H A D | cross-modifying-code.c | 8 * involves patching the first byte with int3.
|