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/openbmc/linux/Documentation/devicetree/bindings/firmware/
H A Dfsl,scu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/fsl,scu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The System Controller Firmware (SCFW) is a low-level system function
14 which runs on a dedicated Cortex-M core to provide power, clock, and
17 The AP communicates with the SC using a multi-ported MU module found
26 const: fsl,imx-scu
28 clock-controller:
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/openbmc/linux/Documentation/devicetree/bindings/power/
H A Dfsl,scu-pd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,scu-pd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX SCU Client Device Node - Power Domain Based on SCU Message Protocol
10 - Dong Aisheng <aisheng.dong@nxp.com>
12 description: i.MX SCU Client Device Node
13 Client nodes are maintained as children of the relevant IMX-SCU device node.
14 Power domain bindings based on SCU Message Protocol
17 - $ref: power-domain.yaml#
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/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qxp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2020 NXP
8 #include <dt-bindings/clock/imx8-clock.h>
9 #include <dt-bindings/clock/imx8-lpcg.h>
10 #include <dt-bindings/firmware/imx/rsrc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/pinctrl/pads-imx8qxp.h>
15 #include <dt-bindings/thermal/thermal.h>
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H A Dimx8-ss-dma.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
11 compatible = "simple-bus";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 dma_ipg_clk: clock-dma-ipg {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
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H A Dimx8dxl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx8-clock.h>
7 #include <dt-bindings/firmware/imx/rsrc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/pinctrl/pads-imx8dxl.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
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H A Dimx8dxl-ss-conn.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 /delete-node/ &enet1_lpcg;
7 /delete-node/ &fec2;
10 conn_enet0_root_clk: clock-conn-enet0-root {
11 compatible = "fixed-clock";
12 #clock-cells = <0>;
13 clock-frequency = <250000000>;
14 clock-output-names = "conn_enet0_root_clk";
18 compatible = "nxp,imx8dxl-dwmac-eqos", "snps,dwmac-5.10a";
20 interrupt-parent = <&gic>;
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H A Dimx8qm.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/pads-imx8qm.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
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/openbmc/linux/Documentation/devicetree/bindings/bus/
H A Dfsl,imx8qxp-pixel-link-msi-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
15 from i.MX8 System Controller Unit (SCU) which is used to control power,
18 i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks,
35 - $ref: simple-pm-bus.yaml#
37 # We need a select here so we don't match all nodes with 'simple-pm-bus'.
43 - fsl,imx8qxp-display-pixel-link-msi-bus
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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dimx8qxp-lpcg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock
10 - Aisheng Dong <aisheng.dong@nxp.com>
13 The Low-Power Clock Gate (LPCG) modules contain a local programming
18 by the SCU resources and clock controls. Thus even if the clock is
24 include/dt-bindings/clock/imx8-lpcg.h
29 - const: fsl,imx8qxp-lpcg
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/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Dfsl,imx8qxp-pxl2dpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
14 interfaces the pixel link 36-bit data output and the DSI controller’s
15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module
25 const: fsl,imx8qxp-pxl2dpi
27 fsl,sc-resource:
29 description: The SCU resource ID associated with this PXL2DPI instance.
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/openbmc/linux/drivers/pmdomain/imx/
H A Dscu-pd.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
7 * Implementation of the SCU based Power Domains
10 * single global power domain and implement the ->attach|detach_dev()
12 * From within the ->attach_dev(), we could get the OF node for
13 * the device that is being attached and then parse the power-domain
18 * Additionally, we need to implement the ->stop() and ->start()
20 * rather than using the above ->power_on|off() callbacks.
23 * 1. The ->attach_dev() of power domain infrastructure still does
25 * in is a virtual PD device, it does not help for parsing the real
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/openbmc/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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