/openbmc/linux/Documentation/devicetree/bindings/soc/imx/ |
H A D | imx8m-soc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/imx8m-soc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8M Series SoC 10 - Alice Guo <alice.guo@nxp.com> 13 NXP i.MX8M series SoCs contain fuse entries from which SoC Unique ID can be 21 - fsl,imx8mm 22 - fsl,imx8mn 23 - fsl,imx8mp [all …]
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H A D | fsl,imx8mm-vpu-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MM VPU blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to 15 located in the VPU domain of the SoC. 20 - const: fsl,imx8mm-vpu-blk-ctrl 21 - const: syscon [all …]
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H A D | fsl,imx8mm-disp-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MM DISP blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to 15 peripherals located in the DISP domain of the SoC. 20 - const: fsl,imx8mm-disp-blk-ctrl 21 - const: syscon [all …]
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H A D | fsl,imx-iomuxc-gpr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peng Fan <peng.fan@nxp.com> 19 - items: 20 - const: fsl,imx8mq-iomuxc-gpr 21 - const: syscon 22 - const: simple-mfd 23 - items: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | fsl,imx8m-noc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/interconnect/fsl,imx8m-noc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peng Fan <peng.fan@nxp.com> 13 The i.MX SoC family has multiple buses for which clock frequency (and 18 for normal (non-secure) world. 20 The buses are based on externally licensed IPs such as ARM NIC-301 and 27 - items: 28 - enum: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | fsl,imx8-pcie-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX8 SoC series PCIe PHY 10 - Richard Zhu <hongxing.zhu@nxp.com> 13 "#phy-cells": 18 - fsl,imx8mm-pcie-phy 19 - fsl,imx8mp-pcie-phy 27 clock-names: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/nvmem/ |
H A D | imx-ocotp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX On-Chip OTP Controller (OCOTP) 10 - Anson Huang <Anson.Huang@nxp.com> 13 This binding represents the on-chip eFuse OTP controller found on 18 - $ref: nvmem.yaml# 23 - items: 24 - enum: [all …]
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/openbmc/linux/drivers/soc/imx/ |
H A D | soc-imx8m.c | 1 // SPDX-License-Identifier: GPL-2.0 12 #include <linux/arm-smccc.h> 55 of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp"); in imx8mq_soc_revision() 63 return -EINVAL; in imx8mq_soc_revision() 67 return -EINVAL; in imx8mq_soc_revision() 78 * SOC revision on older imx8mq is not available in fuses so query in imx8mq_soc_revision() 108 of_find_compatible_node(NULL, NULL, "fsl,imx8mm-ocotp"); in imx8mm_soc_uid() 116 return -EINVAL; in imx8mm_soc_uid() 120 return -EINVAL; in imx8mm_soc_uid() 145 of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop"); in imx8mm_soc_revision() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | fsl,imx-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX Co-Processor 10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs. 13 - Peng Fan <peng.fan@nxp.com> 18 - fsl,imx6sx-cm4 19 - fsl,imx7d-cm4 20 - fsl,imx7ulp-cm4 [all …]
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/openbmc/linux/drivers/interconnect/imx/ |
H A D | imx8mm.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Interconnect framework driver for i.MX8MM SoC 6 * Copyright (c) 2019-2020, NXP 13 #include <dt-bindings/interconnect/imx8mm.h> 100 .name = "imx8mm-interconnect", 107 MODULE_ALIAS("platform:imx8mm-interconnect");
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/imx8mm-power.h> 11 #include <dt-bindings/reset/imx8mq-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mm-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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H A D | imx8mm-data-modul-edm-sbc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/net/qca-ar803x.h> 9 #include <dt-bindings/phy/phy-imx8-pcie.h> 10 #include "imx8mm.dtsi" 14 compatible = "dmo,imx8mm-data-modul-edm-sbc", "fsl,imx8mm"; 22 stdout-path = &uart3; 32 compatible = "pwm-backlight"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&pinctrl_panel_backlight>; [all …]
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H A D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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H A D | imx8ulp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8ulp-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/power/imx8ulp-power.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8ulp-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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/openbmc/linux/drivers/phy/freescale/ |
H A D | phy-fsl-imx8m-pcie.c | 1 // SPDX-License-Identifier: GPL-2.0+ 12 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h> 20 #include <dt-bindings/phy/phy-imx8-pcie.h> 50 IMX8MM, enumerator 79 pad_mode = imx8_phy->refclk_pad_mode; in imx8_pcie_phy_power_on() 80 switch (imx8_phy->drvdata->variant) { in imx8_pcie_phy_power_on() 81 case IMX8MM: in imx8_pcie_phy_power_on() 82 reset_control_assert(imx8_phy->reset); in imx8_pcie_phy_power_on() 84 /* Tune PHY de-emphasis setting to pass PCIe compliance. */ in imx8_pcie_phy_power_on() 85 if (imx8_phy->tx_deemph_gen1) in imx8_pcie_phy_power_on() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/arm/ |
H A D | fsl.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 11 - Li Yang <leoyang.li@nxp.com> 18 - description: i.MX1 based Boards 20 - enum: 21 - armadeus,imx1-apf9328 22 - fsl,imx1ads 23 - const: fsl,imx1 [all …]
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/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi-nxp-fspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Han Xu <han.xu@nxp.com> 11 - Kuldeep Singh <singh.kuldeep87k@gmail.com> 14 - $ref: spi-controller.yaml# 19 - enum: 20 - nxp,imx8dxl-fspi 21 - nxp,imx8mm-fspi [all …]
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H A D | fsl-imx-cspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/fsl-imx-cspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 13 - $ref: /schemas/spi/spi-controller.yaml# 18 - const: fsl,imx1-cspi 19 - const: fsl,imx21-cspi 20 - const: fsl,imx27-cspi 21 - const: fsl,imx31-cspi [all …]
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/openbmc/linux/Documentation/devicetree/bindings/pwm/ |
H A D | imx-pwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Philipp Zabel <p.zabel@pengutronix.de> 13 - $ref: pwm.yaml# 16 "#pwm-cells": 21 - 2 22 - 3 26 - enum: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mtd/ |
H A D | gpmi-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale General-Purpose Media Interface (GPMI) 10 - Han Xu <han.xu@nxp.com> 14 flash chips. The device tree may optionally contain sub-nodes 21 - enum: 22 - fsl,imx23-gpmi-nand 23 - fsl,imx28-gpmi-nand [all …]
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/openbmc/linux/drivers/clk/imx/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 2 # common clock support for NXP i.MX SoC family. 67 tristate "IMX8MM CCM Clock Driver"
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/openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
H A D | samsung,mipi-dsim.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inki Dae <inki.dae@samsung.com> 11 - Jagan Teki <jagan@amarulasolutions.com> 12 - Marek Szyprowski <m.szyprowski@samsung.com> 16 and i.MX8M Mini/Nano/Plus SoC's. 21 - enum: 22 - samsung,exynos3250-mipi-dsi [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mailbox/ |
H A D | fsl,mu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dong Aisheng <aisheng.dong@nxp.com> 13 The Messaging Unit module enables two processors within the SoC to 22 registers (Processor A-facing, Processor B-facing). 27 - const: fsl,imx6sx-mu 28 - const: fsl,imx7ulp-mu 29 - const: fsl,imx8ulp-mu 30 - const: fsl,imx8-mu-scu [all …]
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/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | fsl,spdif.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shengjiu Wang <shengjiu.wang@nxp.com> 20 - fsl,imx35-spdif 21 - fsl,vf610-spdif 22 - fsl,imx6sx-spdif 23 - fsl,imx8qm-spdif 24 - fsl,imx8qxp-spdif 25 - fsl,imx8mq-spdif [all …]
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | fsl,fec.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 11 - Wei Fang <wei.fang@nxp.com> 12 - NXP Linux Team <linux-imx@nxp.com> 15 - $ref: ethernet-controller.yaml# 20 - enum: 21 - fsl,imx25-fec 22 - fsl,imx27-fec [all …]
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