/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | imx31-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/imx31-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Fabio Estevam <festevam@gmail.com> 18 ----------------------- 81 const: fsl,imx31-ccm 87 description: CCM provides 2 interrupt requests, request 1 is to generate 91 - description: CCM DVFS interrupt request 1 92 - description: CCM DPTC interrupt request 2 [all …]
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/openbmc/qemu/hw/arm/ |
H A D | fsl-imx31.c | 2 * Copyright (c) 2013 Jean-Christophe Dubois <jcd@tribudubois.net> 6 * Based on hw/arm/fsl-imx31.c 24 #include "hw/arm/fsl-imx31.h" 26 #include "exec/address-spaces.h" 27 #include "hw/qdev-properties.h" 29 #include "target/arm/cpu-qom.h" 36 object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm1136")); in fsl_imx31_init() 38 object_initialize_child(obj, "avic", &s->avic, TYPE_IMX_AVIC); in fsl_imx31_init() 40 object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX31_CCM); in fsl_imx31_init() 43 object_initialize_child(obj, "uart[*]", &s->uart[i], TYPE_IMX_SERIAL); in fsl_imx31_init() [all …]
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H A D | fsl-imx6.c | 2 * Copyright (c) 2015 Jean-Christophe Dubois <jcd@tribudubois.net> 6 * Based on hw/arm/fsl-imx31.c 24 #include "hw/arm/fsl-imx6.h" 26 #include "hw/usb/imx-usb-phy.h" 28 #include "hw/qdev-properties.h" 31 #include "qemu/error-report.h" 33 #include "target/arm/cpu-qom.h" 46 for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) { in fsl_imx6_init() 48 object_initialize_child(obj, name, &s->cpu[i], in fsl_imx6_init() 49 ARM_CPU_TYPE_NAME("cortex-a9")); in fsl_imx6_init() [all …]
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx31.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com> 4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 * pre-existing /chosen node to be available to insert the 34 #address-cells = <1>; 35 #size-cells = <0>; 38 compatible = "arm,arm1136jf-s"; 44 avic: interrupt-controller@68000000 { [all …]
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H A D | imx35.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include "imx35-pinfunc.h" 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 38 #address-cells = <1>; 39 #size-cells = <0>; 42 compatible = "arm,arm1136jf-s"; 48 avic: avic-interrupt-controller@68000000 { 49 compatible = "fsl,imx35-avic", "fsl,avic"; [all …]
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H A D | imx25.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx25-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 13 * pre-existing /chosen node to be available to insert the 46 #address-cells = <1>; 47 #size-cells = <0>; 50 compatible = "arm,arm926ej-s"; 56 asic: asic-interrupt-controller@68000000 { [all …]
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H A D | imx50.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 #include "imx50-pinfunc.h" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/imx5-clock.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a8"; [all …]
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H A D | imx51.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx51-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 42 tzic: tz-interrupt-controller@e0000000 { [all …]
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H A D | imx53.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx53-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; [all …]
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H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 * pre-existing /chosen node to be available to insert the 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <32768>; [all …]
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H A D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
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H A D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; 51 #size-cells = <0>; 54 compatible = "arm,cortex-a9"; [all …]
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/openbmc/qemu/include/hw/misc/ |
H A D | imx31_ccm.h | 2 * IMX31 Clock Control Module 5 * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> 8 * See the COPYING file in the top-level directory. 75 #define TYPE_IMX31_CCM "imx31.ccm"
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/openbmc/linux/arch/arm/mach-imx/ |
H A D | mm-imx3.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. 7 * - add MX31 specific definitions 17 #include <asm/hardware/cache-l2x0.h> 21 #include "crmregs-imx3.h" 107 np = of_find_compatible_node(NULL, NULL, "fsl,imx31-ccm"); in imx31_init_early() 144 np = of_find_compatible_node(NULL, NULL, "fsl,imx35-ccm"); in imx35_init_early()
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/openbmc/qemu/hw/misc/ |
H A D | imx_ccm.c | 2 * IMX31 Clock Control Module 5 * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> 8 * See the COPYING file in the top-level directory. 11 * retrieve the CCM frequencies from the various i.MX SOC. 36 if (klass->get_clock_frequency) { in imx_ccm_get_clock_frequency() 37 freq = klass->get_clock_frequency(dev, clock); in imx_ccm_get_clock_frequency() 54 uint32_t pd = 1 + PD(pllreg); /* Pre-divider */ in imx_ccm_calc_pll() 60 /* mfn is 10-bit signed twos-complement */ in imx_ccm_calc_pll() 61 mfn <<= 32 - 10; in imx_ccm_calc_pll() 62 mfn >>= 32 - 10; in imx_ccm_calc_pll()
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H A D | imx31_ccm.c | 2 * IMX31 Clock Control Module 5 * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> 8 * See the COPYING file in the top-level directory. 11 * the i.MX31 CCM. 112 if ((s->reg[IMX31_CCM_CCMR_REG] & CCMR_PRCS) == 2) { in imx31_ccm_get_pll_ref_clk() 113 if (s->reg[IMX31_CCM_CCMR_REG] & CCMR_FPME) { in imx31_ccm_get_pll_ref_clk() 115 if (s->reg[IMX31_CCM_CCMR_REG] & CCMR_FPMF) { in imx31_ccm_get_pll_ref_clk() 133 freq = imx_ccm_calc_pll(s->reg[IMX31_CCM_MPCTL_REG], in imx31_ccm_get_mpll_clk() 146 if ((s->reg[IMX31_CCM_CCMR_REG] & CCMR_MDS) || in imx31_ccm_get_mcu_main_clk() 147 !(s->reg[IMX31_CCM_CCMR_REG] & CCMR_MPE)) { in imx31_ccm_get_mcu_main_clk() [all …]
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/openbmc/linux/drivers/clk/imx/ |
H A D | clk-imx31.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 128 void __iomem *ccm; in mx31_clocks_init_dt() local 130 for_each_compatible_node(osc_np, NULL, "fixed-clock") { in mx31_clocks_init_dt() 131 if (!of_device_is_compatible(osc_np, "fsl,imx-osc26m")) in mx31_clocks_init_dt() 134 if (!of_property_read_u32(osc_np, "clock-frequency", &fref)) { in mx31_clocks_init_dt() 140 ccm = of_iomap(np, 0); in mx31_clocks_init_dt() 141 if (!ccm) in mx31_clocks_init_dt() 144 _mx31_clocks_init(ccm, fref); in mx31_clocks_init_dt() 151 CLK_OF_DECLARE(imx31_ccm, "fsl,imx31-ccm", mx31_clocks_init_dt);
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/openbmc/qemu/include/hw/arm/ |
H A D | fsl-imx31.h | 4 * Copyright (C) 2015 Jean-Christophe Dubois <jcd@tribudubois.net> 32 #define TYPE_FSL_IMX31 "fsl-imx31" 47 IMX31CCMState ccm; member
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/openbmc/linux/Documentation/devicetree/bindings/dma/ |
H A D | fsl,imx-sdma.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/dma/fsl,imx-sdma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Joy Zou <joy.zou@nxp.com> 13 - $ref: dma-controller.yaml# 18 - items: 19 - enum: 20 - fsl,imx50-sdma 21 - fsl,imx51-sdma [all …]
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/openbmc/qemu/include/hw/timer/ |
H A D | imx_gpt.h | 8 * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> 79 #define TYPE_IMX31_GPT "imx31.gpt" 97 IMXCCMState *ccm; member
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/openbmc/u-boot/arch/arm/dts/ |
H A D | imx6sx.dtsi | 9 #include <dt-bindings/clock/imx6sx-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "imx6sx-pinfunc.h" 55 #address-cells = <1>; 56 #size-cells = <0>; 59 compatible = "arm,cortex-a9"; 62 next-level-cache = <&L2>; 63 operating-points = < [all …]
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H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 16 * Also for U-Boot there must be a pre-existing /memory node. 55 compatible = "fsl,imx-ckil", "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <32768>; [all …]
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H A D | imx6ull.dtsi | 2 * Copyright 2015-2016 Freescale Semiconductor, Inc. 9 #include <dt-bindings/clock/imx6ul-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "imx6ull-pinfunc.h" 14 #include "imx6ull-pinfunc-snvs.h" 52 #address-cells = <1>; 53 #size-cells = <0>; 56 compatible = "arm,cortex-a7"; [all …]
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H A D | imx6sll.dtsi | 9 #include <dt-bindings/clock/imx6sll-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include "imx6sll-pinfunc.h" 43 #address-cells = <1>; 44 #size-cells = <0>; 47 compatible = "arm,cortex-a9"; 50 next-level-cache = <&L2>; 51 operating-points = < 58 fsl,soc-operating-points = < [all …]
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H A D | imx6sl.dtsi | 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "imx6sl-pinfunc.h" 12 #include <dt-bindings/clock/imx6sl-clock.h> 15 #address-cells = <1>; 16 #size-cells = <1>; 19 * pre-existing /chosen node to be available to insert the 21 * Also for U-Boot there must be a pre-existing /memory node. 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a9"; [all …]
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