/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | fsl,fec.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/fsl,fec.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale Fast Ethernet Controller (FEC) 10 - Shawn Guo <shawnguo@kernel.org> 11 - Wei Fang <wei.fang@nxp.com> 12 - NXP Linux Team <linux-imx@nxp.com> 15 - $ref: ethernet-controller.yaml# 20 - enum: [all …]
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx27.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include "imx27-pinfunc.h" 7 #include <dt-bindings/clock/imx27-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 23 ethernet0 = &fec; [all …]
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H A D | imx27-phytec-phycard-s-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2012 Sascha Hauer, Uwe Kleine-König, Steffen Trumtrar 7 /dts-v1/; 8 #include "imx27.dtsi" 12 compatible = "phytec,imx27-pca100", "fsl,imx27"; 21 cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, 26 &fec { 27 pinctrl-names = "default"; 28 pinctrl-0 = <&pinctrl_fec1>; 33 pinctrl-names = "default"; [all …]
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H A D | imx27-apf27.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 /dts-v1/; 10 #include "imx27.dtsi" 14 compatible = "armadeus,imx27-apf27", "fsl,imx27"; 23 clock-frequency = <0>; 27 imx27-apf27 { 61 pinctrl-names = "default"; 62 pinctrl-0 = <&pinctrl_uart1>; 66 &fec { 67 pinctrl-names = "default"; [all …]
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H A D | imx35.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 // based on imx27.dtsi 7 #include "imx35-pinfunc.h" 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 20 ethernet0 = &fec; 38 #address-cells = <1>; 39 #size-cells = <0>; 42 compatible = "arm,arm1136jf-s"; [all …]
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H A D | imx51.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx51-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 23 ethernet0 = &fec; [all …]
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H A D | imx27-pdk.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 /dts-v1/; 6 #include "imx27.dtsi" 10 compatible = "fsl,imx27-pdk", "fsl,imx27"; 18 compatible = "simple-bus"; 19 #address-cells = <1>; 20 #size-cells = <0>; 23 compatible = "usb-nop-xceiv"; 26 clock-names = "main_clk"; 27 #phy-cells = <0>; [all …]
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H A D | imx27-phytec-phycore-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 /dts-v1/; 7 #include "imx27.dtsi" 11 compatible = "phytec,imx27-pcm038", "fsl,imx27"; 18 reg_3v3: regulator-0 { 19 compatible = "regulator-fixed"; 20 regulator-name = "3V3"; 21 regulator-min-microvolt = <3300000>; 22 regulator-max-microvolt = <3300000>; 25 reg_5v0: regulator-1 { [all …]
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H A D | imx50.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 #include "imx50-pinfunc.h" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/imx5-clock.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 22 ethernet0 = &fec; 47 #address-cells = <1>; 48 #size-cells = <0>; [all …]
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H A D | imx53.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx53-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 23 ethernet0 = &fec; [all …]
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H A D | imx25.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx25-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 13 * pre-existing /chosen node to be available to insert the 19 ethernet0 = &fec; 46 #address-cells = <1>; 47 #size-cells = <0>; 50 compatible = "arm,arm926ej-s"; [all …]
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H A D | imx27-eukrea-cpuimx27.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 /dts-v1/; 7 #include "imx27.dtsi" 11 compatible = "eukrea,cpuimx27", "fsl,imx27"; 18 clk14745600: clk-uart { 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; 21 clock-frequency = <14745600>; 25 &fec { 26 pinctrl-names = "default"; [all …]
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H A D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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H A D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 20 ethernet0 = &fec; 50 #address-cells = <1>; 51 #size-cells = <0>; [all …]
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H A D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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H A D | imx7d.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 7 #include <dt-bindings/reset/imx7-reset.h> 18 clock-frequency = <996000000>; 19 operating-points-v2 = <&cpu0_opp_table>; 20 #cooling-cells = <2>; 21 nvmem-cells = <&fuse_grade>; 22 nvmem-cell-names = "speed_grade"; 26 compatible = "arm,cortex-a7"; 29 clock-frequency = <996000000>; 30 operating-points-v2 = <&cpu0_opp_table>; [all …]
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H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 * pre-existing /chosen node to be available to insert the 21 ethernet0 = &fec; 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | imx6ul.dtsi | 9 #include <dt-bindings/clock/imx6ul-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "imx6ul-pinfunc.h" 54 #address-cells = <1>; 55 #size-cells = <0>; 58 compatible = "arm,cortex-a7"; 61 clock-latency = <61036>; /* two CLK32 periods */ 62 operating-points = < [all …]
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H A D | imx6sx.dtsi | 9 #include <dt-bindings/clock/imx6sx-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "imx6sx-pinfunc.h" 55 #address-cells = <1>; 56 #size-cells = <0>; 59 compatible = "arm,cortex-a9"; 62 next-level-cache = <&L2>; 63 operating-points = < [all …]
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H A D | imx6sl.dtsi | 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "imx6sl-pinfunc.h" 12 #include <dt-bindings/clock/imx6sl-clock.h> 15 #address-cells = <1>; 16 #size-cells = <1>; 19 * pre-existing /chosen node to be available to insert the 21 * Also for U-Boot there must be a pre-existing /memory node. 27 ethernet0 = &fec; 47 #address-cells = <1>; 48 #size-cells = <0>; [all …]
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H A D | imx6ull.dtsi | 2 * Copyright 2015-2016 Freescale Semiconductor, Inc. 9 #include <dt-bindings/clock/imx6ul-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "imx6ull-pinfunc.h" 14 #include "imx6ull-pinfunc-snvs.h" 52 #address-cells = <1>; 53 #size-cells = <0>; 56 compatible = "arm,cortex-a7"; [all …]
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H A D | imx7d.dtsi | 5 * This file is dual-licensed: you can use it either under the terms 49 operating-points = < 54 clock-frequency = <996000000>; 58 compatible = "arm,cortex-a7"; 61 clock-frequency = <996000000>; 67 compatible = "arm,coresight-etm3x", "arm,primecell"; 72 * without arm,primecell-periphid because amba bus try to 75 arm,primecell-periphid = <0xbb956>; 78 clock-names = "apb_pclk"; 82 remote-endpoint = <&ca_funnel_in_port1>; [all …]
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H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 16 * Also for U-Boot there must be a pre-existing /memory node. 22 ethernet0 = &fec; 55 compatible = "fsl,imx-ckil", "fixed-clock"; 56 #clock-cells = <0>; [all …]
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H A D | imx7s.dtsi | 5 * This file is dual-licensed: you can use it either under the terms 44 #include <dt-bindings/clock/imx7d-clock.h> 45 #include <dt-bindings/power/imx7-power.h> 46 #include <dt-bindings/gpio/gpio.h> 47 #include <dt-bindings/input/input.h> 48 #include <dt-bindings/interrupt-controller/arm-gic.h> 49 #include "imx7d-pinfunc.h" 52 #address-cells = <1>; 53 #size-cells = <1>; 56 * pre-existing /chosen node to be available to insert the [all …]
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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