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/openbmc/linux/drivers/staging/sm750fb/
H A Dddk750_hwi2c.c1 // SPDX-License-Identifier: GPL-2.0
23 * Enable Hardware I2C power. in sm750_hw_i2c_init()
28 /* Enable the I2C Controller and set the bus speed mode */ in sm750_hw_i2c_init()
42 /* Disable I2C controller */ in sm750_hw_i2c_close()
46 /* Disable I2C Power */ in sm750_hw_i2c_close()
63 timeout--; in hw_i2c_wait_tx_done()
66 return -1; in hw_i2c_wait_tx_done()
72 * This function writes data to the i2c slave device registers.
75 * addr - i2c Slave device address
76 * length - Total number of bytes to be written to the device
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H A Dddk750_swi2c.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * swi2c.h --- SM750/SM718 DDK
6 * This file contains the definitions for i2c using software
14 /* Default i2c CLK and Data GPIO. These are the default i2c pins */
19 * This function initializes the i2c attributes and bus
22 * i2cClkGPIO - The GPIO pin to be used as i2c SCL
23 * i2cDataGPIO - The GPIO pin to be used as i2c SDA
26 * -1 - Fail to initialize the i2c
27 * 0 - Success
32 * This function reads the slave device's register
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H A Dddk750_swi2c.c1 // SPDX-License-Identifier: GPL-2.0
5 * swi2c.c --- SM750/SM718 DDK
6 * This file contains the source code for I2C using software
16 * I2C Software Master Driver:
18 * Each i2c cycle is split into 4 sections. Each of these section marks
22 * +-------------+-------------+-------------+-------------+
37 * ---------------+---+---+---+---+
40 * ---------------+---+---+---+---+
43 * ---------------+---+---+---+---+
46 * ---------------+---+---+---+---+
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/openbmc/qemu/include/hw/i2c/
H A Di2c.h4 #include "hw/qdev-core.h"
7 /* The QEMU I2C implementation only supports simple transfers that complete
8 immediately. It does not support slave devices that need to be able to
9 defer their response (eg. CPU slave interfaces where the data is supplied
22 #define TYPE_I2C_SLAVE "i2c-slave"
29 /* Master to slave. Returns non-zero for a NAK, 0 for success. */
32 /* Master to slave (asynchronous). Receiving slave must call i2c_ack(). */
36 * Slave to master. This cannot fail, the device should always
42 * Notify the slave of a bus state change. For start event,
43 * returns non-zero to NAK an operation. For other events the
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/openbmc/linux/drivers/mfd/
H A Dpalmas.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2011-2012 Texas Instruments Inc.
14 #include <linux/i2c.h>
328 struct palmas_pmic_driver_data *pmic_ddata = palmas->pmic_ddata; in palmas_ext_control_req_config()
350 bit_pos = pmic_ddata->sleep_req_info[id].bit_pos; in palmas_ext_control_req_config()
351 reg_add += pmic_ddata->sleep_req_info[id].reg_offset; in palmas_ext_control_req_config()
359 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n", in palmas_ext_control_req_config()
368 dev_err(palmas->dev, "POWER_CTRL register update failed %d\n", in palmas_ext_control_req_config()
376 static int palmas_set_pdata_irq_flag(struct i2c_client *i2c, in palmas_set_pdata_irq_flag() argument
379 struct irq_data *irq_data = irq_get_irq_data(i2c->irq); in palmas_set_pdata_irq_flag()
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/openbmc/phosphor-mrw-tools/
H A Dgen_callouts.pl31 my $targets = Targets->new;
32 $targets->loadXML($mrwFile);
40 …ys/devices/platform/ahb/ahb:apb/ahb:apb:bus\@1e78a000/1e78a100.i2c-bus/i2c-<port>/<port>-00<addres…
41 my $fsiMasterPath = "/sys/devices/platform/gpio-fsi/fsi0/slave\@00:00/raw";
42 my $fsiSlavePath = "/sys/devices/platform/gpio-fsi/fsi0/slave\@00:00/00:00:00:0a/fsi1/slave\@<link>…
56 my $connections = $targets->findConnections($bmc, "I2C");
57 # hash of arrays - {I2C master port : list of connected slave Targets}
60 for my $i2c (@{$connections->{CONN}})
62 my $master = $i2c->{SOURCE};
63 my $port = $targets->getAttribute($master,"I2C_PORT");
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/openbmc/linux/drivers/i2c/busses/
H A Di2c-stm32f7.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STMicroelectronics STM32F7 I2C controller
5 * This I2C controller is described in the STM32F75xxx and STM32F74xxx Soc
14 * This driver is based on i2c-stm32f4.c
20 #include <linux/i2c.h>
21 #include <linux/i2c-smbus.h>
38 #include "i2c-stm32.h"
40 /* STM32F7 I2C registers */
52 /* STM32F7 I2C control 1 */
83 /* STM32F7 I2C control 2 */
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H A Di2c-at91-slave.c1 // SPDX-License-Identifier: GPL-2.0
3 * i2c slave support for Atmel's AT91 Two-Wire Interface (TWI)
9 #include <linux/i2c.h>
13 #include "i2c-at91.h"
25 /* slave address has been detected on I2C bus */ in atmel_twi_interrupt_slave()
28 i2c_slave_event(dev->slave, in atmel_twi_interrupt_slave()
30 writeb_relaxed(value, dev->base + AT91_TWI_THR); in atmel_twi_interrupt_slave()
34 i2c_slave_event(dev->slave, in atmel_twi_interrupt_slave()
44 i2c_slave_event(dev->slave, I2C_SLAVE_READ_PROCESSED, &value); in atmel_twi_interrupt_slave()
45 writeb_relaxed(value, dev->base + AT91_TWI_THR); in atmel_twi_interrupt_slave()
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H A Di2c-mlxbf.c1 // SPDX-License-Identifier: GPL-2.0
3 * Mellanox BlueField I2C bus driver
13 #include <linux/i2c.h>
57 * memory-mapped region whose addresses are specified in either the DT or
67 /* Reference clock for Bluefield - 156 MHz. */
124 * Slave cause status flags. Note that those bits might be considered
132 /* Slave busy bit reset. */
149 * SMBUS GW0 -> bits[26:25]
150 * SMBUS GW1 -> bits[28:27]
151 * SMBUS GW2 -> bits[30:29]
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H A Di2c-cadence.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * I2C bus driver for the Cadence I2C controller.
5 * Copyright (C) 2009 - 2014 Xilinx, Inc.
10 #include <linux/i2c.h>
21 /* Register offsets for the I2C device. */
24 #define CDNS_I2C_ADDR_OFFSET 0x08 /* I2C Address Register, RW */
25 #define CDNS_I2C_DATA_OFFSET 0x0C /* I2C Data Register, RW */
60 * I2C Address Register Bit mask definitions
62 * bits. A write access to this register always initiates a transfer if the I2C
65 #define CDNS_I2C_ADDR_MASK 0x000003FF /* I2C Address Mask */
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H A Di2c-axxia.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * This driver implements I2C master functionality using the LSI API2C
8 * (-EINVAL) is returned.
14 #include <linux/i2c.h>
84 #define SLV_ADDR_DEC_SA1M BIT(3) /* 10-bit addressing for addr_1 enabled */
86 #define SLV_ADDR_DEC_SA2M BIT(5) /* 10-bit addressing for addr_2 enabled */
107 #define SLV_STATUS_SRS1 BIT(2) /* Slave read from addr 1 */
108 #define SLV_STATUS_SRRS1 BIT(3) /* Repeated start from addr 1 */
111 #define SLV_STATUS_SRAT1 BIT(6) /* Slave Read timed out */
121 * struct axxia_i2c_dev - I2C device context
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/openbmc/linux/drivers/media/usb/dvb-usb/
H A Dm920x.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include "dvb-usb.h"
27 0x80 write addr
31 0x80 write addr
33 0x80 read addr
38 0x80 read addr
42 Guess at API of the I2C function:
43 I2C operation is done one byte at a time with USB control messages. The
45 the I2C bus state:
47 always send the 7-bit slave I2C address as the 7 MSB, followed by
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/openbmc/linux/drivers/i2c/
H A Di2c-core-smbus.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Linux I2C core SMBus and SMBus emulation code
5 * This file contains the SMBus functions which are always included in the I2C
6 * core because they can be emulated via I2C. SMBus specific extensions
7 * (e.g. smbalert) are handled in a separate i2c-smbus module.
9 * All SMBus-related things are written by Frodo Looijaard <frodol@dds.nl>
15 #include <linux/i2c.h>
16 #include <linux/i2c-smbus.h>
20 #include "i2c-core.h"
42 * i2c_smbus_pec - Incremental CRC8 over the given input data array
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H A Di2c-slave-testunit.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C slave mode testunit
5 * Copyright (C) 2020 by Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
10 #include <linux/i2c.h>
53 msg.addr = I2C_CLIENT_END; in i2c_slave_testunit_work()
56 switch (tu->regs[TU_REG_CMD]) { in i2c_slave_testunit_work()
58 msg.addr = tu->regs[TU_REG_DATAL]; in i2c_slave_testunit_work()
60 msg.len = tu->regs[TU_REG_DATAH]; in i2c_slave_testunit_work()
64 msg.addr = 0x08; in i2c_slave_testunit_work()
67 msgbuf[0] = tu->client->addr; in i2c_slave_testunit_work()
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/openbmc/linux/Documentation/devicetree/bindings/soc/tegra/
H A Dnvidia,nvec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
26 - description: divider clock
27 - description: fast clock
29 clock-names:
32 - const: div-clk
33 - const: fast-clk
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/openbmc/linux/Documentation/devicetree/bindings/fsi/
H A Dfsi.txt4 The FSI bus is probe-able, so the OS is able to enumerate FSI slaves, and
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
8 that is an I2C master - the I2C bus can be described by the device tree under
13 the fsi-master-* binding specifications.
16 represent the FSI slaves and their slave engines. As a basic outline:
18 fsi-master {
19 /* top-level of FSI bus topology, bound to an FSI master driver and
22 fsi-slave@<link,id> {
23 /* this node defines the FSI slave device, and is handled
26 fsi-slave-engine@<addr> {
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/openbmc/linux/drivers/w1/slaves/
H A Dw1_ds28e17.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * w1_ds28e17.c - w1 family 19 (DS28E17) driver
11 #include <linux/i2c.h>
28 MODULE_DESCRIPTION("w1 family 19 driver for DS28E17, 1-wire to I2C master bridge");
29 MODULE_ALIAS("w1-family-" __stringify(W1_FAMILY_DS28E17));
32 /* Default I2C speed to be set when a DS28E17 is detected. */
35 MODULE_PARM_DESC(speed, "Default I2C speed to be set when a DS28E17 is detected");
37 /* Default I2C stretch value to be set when a DS28E17 is detected. */
40 MODULE_PARM_DESC(stretch, "Default I2C stretch value to be set when a DS28E17 is detected");
60 * Maximum number of I2C bytes to transfer within one CRC16 protected onewire
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/openbmc/linux/include/linux/
H A Di2c.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * i2c.h - definitions for the Linux i2c bus interface
4 * Copyright (C) 1995-2000 Simon G. Vogl
5 * Copyright (C) 2013-2019 Wolfram Sang <wsa@kernel.org>
24 #include <uapi/linux/i2c.h>
30 /* --- General options ------------------------------------------------ */
44 /* I2C Frequency Modes */
70 * i2c_master_recv - issue a single I2C message in master receive mode
71 * @client: Handle to slave device
72 * @buf: Where to store data read from slave
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/openbmc/u-boot/drivers/i2c/
H A Ds3c24x0_i2c.c1 // SPDX-License-Identifier: GPL-2.0+
19 #include <i2c.h>
33 * @param i2c- pointer to the appropriate i2c register bank.
39 static int WaitForXfer(struct s3c24x0_i2c *i2c) in WaitForXfer() argument
44 if (readl(&i2c->iiccon) & I2CCON_IRPND) in WaitForXfer()
45 return (readl(&i2c->iicstat) & I2CSTAT_NACK) ? in WaitForXfer()
52 static void read_write_byte(struct s3c24x0_i2c *i2c) in read_write_byte() argument
54 clrbits_le32(&i2c->iiccon, I2CCON_IRPND); in read_write_byte()
57 static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd) in i2c_ch_init() argument
75 writel((div & 0x0F) | 0xA0 | ((pres == 512) ? 0x40 : 0), &i2c->iiccon); in i2c_ch_init()
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/openbmc/linux/include/uapi/linux/
H A Di2c.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * i2c.h - definitions for the I2C bus interface
5 * Copyright (C) 1995-2000 Simon G. Vogl
16 * struct i2c_msg - an I2C transaction segment beginning with START
18 * @addr: Slave address, either 7 or 10 bits. When this is a 10 bit address,
24 * %I2C_M_RD: read data (from slave to master). Guaranteed to be 0x0001!
45 * @len: Number of data bytes in @buf being read from or written to the I2C
46 * slave address. For read transactions where %I2C_M_RECV_LEN is set, the
48 * bytes in addition to the initial length byte sent by the slave (plus,
54 * An i2c_msg is the low level representation of one segment of an I2C
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/openbmc/linux/drivers/media/usb/dvb-usb-v2/
H A Dmxl111sf-i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * mxl111sf-i2c.c - driver for the MaxLinear MXL111SF
5 * Copyright (C) 2010-2014 Michael Krufky <mkrufky@linuxtv.org>
8 #include "mxl111sf-i2c.h"
11 /* SW-I2C ----------------------------------------------------------------- */
79 ret = -EIO; in mxl111sf_i2c_bitbang_sendbyte()
210 /* SDA high to signal last byte read from slave */ in mxl111sf_i2c_nack()
223 /* ------------------------------------------------------------------------ */
232 if (msg->flags & I2C_M_RD) { in mxl111sf_i2c_sw_xfer_msg()
239 (msg->addr << 1) | 0x01); in mxl111sf_i2c_sw_xfer_msg()
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/openbmc/qemu/include/hw/misc/
H A Dauxbus.h29 #include "hw/qdev-core.h"
36 #define TYPE_AUXTOI2C "aux-to-i2c-bridge"
57 #define TYPE_AUX_BUS "aux-bus"
76 #define TYPE_AUX_SLAVE "aux-slave"
111 * @address The 20bits address of the slave.
119 * aux_get_i2c_bus: Get the i2c bus for I2C over AUX command.
121 * Returns the i2c bus associated to this AUX bus.
128 * aux_init_mmio: Init an mmio for an AUX slave.
130 * @aux_slave The AUX slave.
135 /* aux_map_slave: Map the mmio for an AUX slave on the bus.
[all …]
/openbmc/linux/drivers/media/tuners/
H A Dtda18271.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 tda18271.h - header for the Philips / NXP TDA18271 silicon tuner
12 #include <linux/i2c.h>
60 /* slave tuner output & loop through & xtal oscillator always on */
63 /* slave tuner output loop through off */
81 /* master / slave tuner: master uses main pll, slave uses cal pll */
84 /* use i2c gate provided by analog or digital demod */
90 /* some i2c providers can't write all 39 registers at once */
113 extern struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
114 struct i2c_adapter *i2c,
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/openbmc/linux/Documentation/i2c/
H A Dsmbus-protocol.rst11 which is a subset from the I2C protocol. Fortunately, many devices use
14 If you write a driver for some I2C device, please try to use the SMBus
16 I2C protocol). This makes it possible to use the device driver on both
17 SMBus adapters and I2C adapters (the SMBus command set is automatically
18 translated to I2C on I2C adapters, but plain I2C commands can not be
29 the corresponding functionality flag to ensure that the underlying I2C
31 Documentation/i2c/functionality.rst for the details.
44 Addr (7 bits) I2C 7 bit address. Note that this can be expanded to
45 get a 10 bit I2C address.
52 [..] Data sent by I2C device, as opposed to data sent by the host
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/openbmc/linux/include/linux/i3c/
H A Dccc.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 /* Broadcast-only commands */
36 /* Unicast-only commands */
56 * struct i3c_ccc_events - payload passed to ENEC/DISEC CCC
69 * struct i3c_ccc_mwl - payload passed to SETMWL/GETMWL CCC
81 * struct i3c_ccc_mrl - payload passed to SETMRL/GETMRL CCC
88 * The IBI length is only valid if the I3C slave is IBI capable
97 * struct i3c_ccc_dev_desc - I3C/I2C device descriptor used for DEFSLVS
99 * @dyn_addr: dynamic address assigned to the I3C slave or 0 if the entry is
100 * describing an I2C slave.
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