/openbmc/linux/tools/perf/util/ |
H A D | sort.c | 2259 struct hpp_sort_entry *hse; in perf_hpp__reset_sort_width() local 2264 hse = container_of(fmt, struct hpp_sort_entry, hpp); in perf_hpp__reset_sort_width() 2265 hists__new_col_len(hists, hse->se->se_width_idx, strlen(fmt->name)); in perf_hpp__reset_sort_width() 2272 struct hpp_sort_entry *hse; in __sort__hpp_header() local 2275 hse = container_of(fmt, struct hpp_sort_entry, hpp); in __sort__hpp_header() 2278 len = hists__col_len(hists, hse->se->se_width_idx); in __sort__hpp_header() 2287 struct hpp_sort_entry *hse; in __sort__hpp_width() local 2290 hse = container_of(fmt, struct hpp_sort_entry, hpp); in __sort__hpp_width() 2293 len = hists__col_len(hists, hse->se->se_width_idx); in __sort__hpp_width() 2301 struct hpp_sort_entry *hse; in __sort__hpp_entry() local [all …]
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/openbmc/u-boot/drivers/clk/ |
H A D | clk_stm32h7.c | 375 /* disable HSE to configure it */ in configure_clocks() 380 /* clear HSE bypass and set it ON */ in configure_clocks() 382 /* Switch on HSE */ in configure_clocks() 392 /* Select HSE as PLL clock source */ in configure_clocks() 440 HSE, enumerator 450 [HSE] = "clk-hse", 513 pllsrc = stm32_get_rate(regs, HSE); in stm32_get_PLL1_rate() 650 sysclk = stm32_get_rate(regs, HSE); in stm32_clk_get_rate()
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H A D | clk_stm32f.c | 160 /* Configure for HSE+PLL operation */ in configure_clocks() 171 setbits_le32(®s->pllcfgr, RCC_PLLCFGR_PLLSRC); /* pll source HSE */ in configure_clocks() 648 /* retrieve HSE frequency (external oscillator) */ in stm32_clk_probe() 649 err = uclass_get_device_by_name(UCLASS_CLK, "clk-hse", in stm32_clk_probe() 666 * frequency (HSE). For STM32F4 and STM32F7, we want VCO in stm32_clk_probe() 674 pr_err("%s: unexpected HSE clock rate = %ld \"n", __func__, in stm32_clk_probe()
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/openbmc/u-boot/doc/device-tree-bindings/clock/ |
H A D | st,stm32mp1.txt | 162 - clk-hse 171 a) for external oscillator: "clk-lse", "clk-hse" 185 clk_hse: clk-hse {
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H A D | st,stm32h7-rcc.txt | 21 - high speed external clock signal (HSE)
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | st,stm32mp1-rcc.yaml | 90 - const: hse 118 clock-names = "hse", "hsi", "csi", "lse", "lsi";
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H A D | st,stm32-rcc.txt | 24 - high speed external clock signal (HSE) 79 4 CLK_HSE_RTC (HSE division factor for RTC clock)
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H A D | st,stm32h7-rcc.txt | 21 - high speed external clock signal (HSE)
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/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | stm32mp157a-dk1-scmi.dts | 67 clock-names = "hse", "hsi", "csi", "lse", "lsi";
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H A D | stm32mp157c-ed1-scmi.dts | 72 clock-names = "hse", "hsi", "csi", "lse", "lsi";
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H A D | stm32mp157c-dk2-scmi.dts | 73 clock-names = "hse", "hsi", "csi", "lse", "lsi";
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H A D | stm32mp157c-ev1-scmi.dts | 77 clock-names = "hse", "hsi", "csi", "lse", "lsi";
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/openbmc/qemu/hw/misc/ |
H A D | stm32l4x5_rcc.c | 463 * HSEON cannot be reset if the HSE oscillator is used directly or in rcc_update_cr_register() 472 clock_update_hz(s->hse, s->hse_frequency); in rcc_update_cr_register() 477 clock_update(s->hse, 0); in rcc_update_cr_register() 1244 QDEV_CLOCK_IN(Stm32l4x5RccState, hse, NULL, 0), 1300 [RCC_CLOCK_MUX_SRC_HSE] = s->hse, in connect_mux_sources() 1376 VMSTATE_CLOCK(hse, Stm32l4x5RccState), 1394 "HSE frequency is outside of the allowed [4-48]Mhz range: %" PRIx64 "", in stm32l4x5_rcc_realize()
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/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/dvb-apps/files/dvb-scan-table/dvb-t/ |
H A D | de-Berlin | 75 [CH50: Tele5, HSE 24, WDR, SWR (BW / RP)]
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/openbmc/linux/drivers/usb/renesas_usbhs/ |
H A D | common.c | 101 u16 mask = DCFM | DRPD | DPRPU | HSE | USBE; in usbhs_sys_host_ctrl() 102 u16 val = DCFM | DRPD | HSE | USBE; in usbhs_sys_host_ctrl() 115 u16 mask = DCFM | DRPD | DPRPU | HSE | USBE; in usbhs_sys_function_ctrl() 116 u16 val = HSE | USBE; in usbhs_sys_function_ctrl()
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/openbmc/u-boot/arch/arm/mach-exynos/include/mach/ |
H A D | mipi_dsim.h | 120 * @hse: set horizontal sync event mode. 171 unsigned char hse; member
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/openbmc/qemu/include/hw/misc/ |
H A D | stm32l4x5_rcc.h | 221 Clock *hse; member
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/openbmc/u-boot/arch/arm/dts/ |
H A D | stm32h743.dtsi | 50 clk_hse: clk-hse {
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/openbmc/linux/drivers/gpu/drm/omapdrm/dss/ |
H A D | dsi.c | 3584 bl = t->hss + t->hsa + t->hse + t->hbp + t->hfp; in print_dsi_vm() 3593 t->hss, t->hsa, t->hse, t->hbp, pps, t->hfp, in print_dsi_vm() 3597 TO_DSI_T(t->hse), in print_dsi_vm() 3649 dsi_htot = t->hss + t->hsa + t->hse + t->hbp + dsi_hact + t->hfp; in print_dsi_dispc_vm() 3652 vm.hsync_len = div64_u64((u64)(t->hsa + t->hse) * pck, byteclk); in print_dsi_dispc_vm() 3763 int dsi_htot, dsi_hact, dsi_hbl, hss, hse; /* byteclks */ in dsi_vm_calc_blanking() local 3814 hse = 1; in dsi_vm_calc_blanking() 3816 hse = DIV_ROUND_UP(4, ndl); in dsi_vm_calc_blanking() 3818 hse = 0; in dsi_vm_calc_blanking() 3825 if (dsi_htot < hss + hse + dsi_hact) in dsi_vm_calc_blanking() [all …]
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H A D | dsi.h | 199 u16 hse; member
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/openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/ |
H A D | dsi.c | 4325 bl = t->hss + t->hsa + t->hse + t->hbp + t->hfp; in print_dsi_vm() 4334 t->hss, t->hsa, t->hse, t->hbp, pps, t->hfp, in print_dsi_vm() 4338 TO_DSI_T(t->hse), in print_dsi_vm() 4390 dsi_htot = t->hss + t->hsa + t->hse + t->hbp + dsi_hact + t->hfp; in print_dsi_dispc_vm() 4393 vm.hsw = div64_u64((u64)(t->hsa + t->hse) * pck, byteclk); in print_dsi_dispc_vm() 4502 int dsi_htot, dsi_hact, dsi_hbl, hss, hse; /* byteclks */ in dsi_vm_calc_blanking() local 4552 hse = 1; in dsi_vm_calc_blanking() 4554 hse = DIV_ROUND_UP(4, ndl); in dsi_vm_calc_blanking() 4556 hse = 0; in dsi_vm_calc_blanking() 4563 if (dsi_htot < hss + hse + dsi_hact) in dsi_vm_calc_blanking() [all …]
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/openbmc/qemu/hw/usb/ |
H A D | xlnx-versal-usb2-ctrl-regs.c | 85 * TODO: This should also clear USBSTS.HSE field in USB XHCI register. in ir_status_postw()
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/openbmc/linux/include/drm/ |
H A D | drm_modes.h | 134 #define DRM_MODE(nm, t, c, hd, hss, hse, ht, hsk, vd, vss, vse, vt, vs, f) \ argument 136 .hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
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/openbmc/linux/drivers/clk/ |
H A D | clk-stm32f4.c | 1117 "no-clock", "lse", "lsi", "hse-rtc" 1848 clks[CLK_HSE_RTC] = clk_hw_register_divider(NULL, "hse-rtc", "clk-hse", in stm32f4_rcc_init() 1853 pr_err("Unable to register hse-rtc clock\n"); in stm32f4_rcc_init()
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/openbmc/u-boot/arch/arm/mach-stm32mp/ |
H A D | cpu.c | 111 * Bit 19 ITAMP4E: HSE monitoring in security_init()
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