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/openbmc/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC HDMI
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,exynos4210-hdmi
[all …]
/openbmc/linux/drivers/gpu/drm/mediatek/
H A Dmtk_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/arm-smccc.h>
10 #include <linux/hdmi.h>
24 #include <sound/hdmi-codec.h>
191 static u32 mtk_hdmi_read(struct mtk_hdmi *hdmi, u32 offset) in mtk_hdmi_read() argument
193 return readl(hdmi->regs + offset); in mtk_hdmi_read()
196 static void mtk_hdmi_write(struct mtk_hdmi *hdmi, u32 offset, u32 val) in mtk_hdmi_write() argument
198 writel(val, hdmi->regs + offset); in mtk_hdmi_write()
201 static void mtk_hdmi_clear_bits(struct mtk_hdmi *hdmi, u32 offset, u32 bits) in mtk_hdmi_clear_bits() argument
203 void __iomem *reg = hdmi->regs + offset; in mtk_hdmi_clear_bits()
[all …]
/openbmc/linux/drivers/video/
H A Dhdmi.c17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
29 #include <linux/hdmi.h>
44 return 256 - csum; in hdmi_infoframe_checksum()
55 * hdmi_avi_infoframe_init() - initialize an HDMI AVI infoframe
56 * @frame: HDMI AVI infoframe
62 frame->type = HDMI_INFOFRAME_TYPE_AVI; in hdmi_avi_infoframe_init()
63 frame->version = 2; in hdmi_avi_infoframe_init()
64 frame->length = HDMI_AVI_INFOFRAME_SIZE; in hdmi_avi_infoframe_init()
70 if (frame->type != HDMI_INFOFRAME_TYPE_AVI || in hdmi_avi_infoframe_check_only()
71 frame->version != 2 || in hdmi_avi_infoframe_check_only()
[all …]
/openbmc/linux/sound/soc/mediatek/mt8183/
H A Dmt8183-dai-tdm.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "mt8183-afe-clk.h"
11 #include "mt8183-afe-common.h"
12 #include "mt8183-interconnection.h"
13 #include "mt8183-reg.h"
92 return snd_pcm_format_physical_width(format) - 1; in get_tdm_lrck_width()
97 switch (ch) { in get_tdm_ch()
250 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mtk_tdm_bck_en_event()
252 struct mt8183_afe_private *afe_priv = afe->platform_priv; in mtk_tdm_bck_en_event()
253 struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[MT8183_DAI_TDM]; in mtk_tdm_bck_en_event()
[all …]
/openbmc/u-boot/drivers/video/
H A Ddw_hdmi.c1 // SPDX-License-Identifier: GPL-2.0+
74 static void dw_hdmi_write(struct dw_hdmi *hdmi, u8 val, int offset) in dw_hdmi_write() argument
76 switch (hdmi->reg_io_width) { in dw_hdmi_write()
78 writeb(val, hdmi->ioaddr + offset); in dw_hdmi_write()
81 writel(val, hdmi->ioaddr + (offset << 2)); in dw_hdmi_write()
89 static u8 dw_hdmi_read(struct dw_hdmi *hdmi, int offset) in dw_hdmi_read() argument
91 switch (hdmi->reg_io_width) { in dw_hdmi_read()
93 return readb(hdmi->ioaddr + offset); in dw_hdmi_read()
95 return readl(hdmi->ioaddr + (offset << 2)); in dw_hdmi_read()
104 static u8 (*hdmi_read)(struct dw_hdmi *hdmi, int offset) = dw_hdmi_read;
[all …]
/openbmc/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-dai-tdm.c1 // SPDX-License-Identifier: GPL-2.0
11 #include "mt8192-afe-clk.h"
12 #include "mt8192-afe-common.h"
13 #include "mt8192-afe-gpio.h"
14 #include "mt8192-interconnection.h"
84 return snd_pcm_format_physical_width(format) - 1; in get_tdm_lrck_width()
89 switch (ch) { in get_tdm_ch()
248 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mtk_tdm_en_event()
250 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mtk_tdm_en_event()
251 int dai_id = get_tdm_id_by_name(w->name); in mtk_tdm_en_event()
[all …]
/openbmc/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi-i2s-audio.c1 // SPDX-License-Identifier: GPL-2.0
3 * dw-hdmi-i2s-audio.c
9 #include <linux/dma-mapping.h>
15 #include <sound/hdmi-codec.h>
17 #include "dw-hdmi.h"
18 #include "dw-hdmi-audio.h"
20 #define DRIVER_NAME "dw-hdmi-i2s-audio"
25 struct dw_hdmi *hdmi = audio->hdmi; in hdmi_write() local
27 audio->write(hdmi, val, offset); in hdmi_write()
32 struct dw_hdmi *hdmi = audio->hdmi; in hdmi_read() local
[all …]
H A Ddw-hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DesignWare High-Definition Multimedia Interface (HDMI) driver
5 * Copyright (C) 2013-2015 Mentor Graphics Inc.
6 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
12 #include <linux/hdmi.h>
20 #include <linux/dma-mapping.h>
23 #include <media/cec-notifier.h>
25 #include <uapi/linux/media-bus-format.h>
38 #include "dw-hdmi-audio.h"
39 #include "dw-hdmi-cec.h"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/rockchip/
H A Dinno_hdmi-rockchip.txt1 Rockchip specific extensions to the Innosilicon HDMI
5 - compatible:
6 "rockchip,rk3036-inno-hdmi";
7 - reg:
9 - clocks, clock-names:
10 Phandle to hdmi controller clock, name should be "pclk"
11 - interrupts:
12 HDMI interrupt number
13 - ports:
16 - pinctrl-0, pinctrl-name:
[all …]
H A Drockchip,rk3066-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip rk3066 HDMI controller
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
15 const: rockchip,rk3066-hdmi
26 clock-names:
29 power-domains:
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Duoutp.c33 struct nvkm_ior *ior = outp->ior; in nvkm_uoutp_mthd_dp_mst_vcpi()
36 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_dp_mst_vcpi()
37 return -ENOSYS; in nvkm_uoutp_mthd_dp_mst_vcpi()
38 if (!ior->func->dp || !ior->func->dp->vcpi || !nvkm_head_find(outp->disp, args->v0.head)) in nvkm_uoutp_mthd_dp_mst_vcpi()
39 return -EINVAL; in nvkm_uoutp_mthd_dp_mst_vcpi()
41 ior->func->dp->vcpi(ior, args->v0.head, args->v0.start_slot, args->v0.num_slots, in nvkm_uoutp_mthd_dp_mst_vcpi()
42 args->v0.pbn, args->v0.aligned_pbn); in nvkm_uoutp_mthd_dp_mst_vcpi()
51 if (argc != sizeof(args->vn)) in nvkm_uoutp_mthd_dp_retrain()
52 return -ENOSYS; in nvkm_uoutp_mthd_dp_retrain()
54 if (!atomic_read(&outp->dp.lt.done)) in nvkm_uoutp_mthd_dp_retrain()
[all …]
/openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi_common.c1 // SPDX-License-Identifier: GPL-2.0
3 #define DSS_SUBSYS_NAME "HDMI"
10 #include "hdmi.h"
23 dev_err(&pdev->dev, "bad number of lanes\n"); in hdmi_parse_lanes_of()
24 return -EINVAL; in hdmi_parse_lanes_of()
30 dev_err(&pdev->dev, "failed to read lane data\n"); in hdmi_parse_lanes_of()
36 dev_err(&pdev->dev, "failed to parse lane data\n"); in hdmi_parse_lanes_of()
44 dev_err(&pdev->dev, "failed to parse lane data\n"); in hdmi_parse_lanes_of()
58 return -EINVAL; in hdmi_compute_acr()
64 * When using deep color, the default N value (as in the HDMI in hdmi_compute_acr()
[all …]
/openbmc/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi_common.c1 // SPDX-License-Identifier: GPL-2.0
3 #define DSS_SUBSYS_NAME "HDMI"
10 #include "hdmi.h"
23 dev_err(&pdev->dev, "bad number of lanes\n"); in hdmi_parse_lanes_of()
24 return -EINVAL; in hdmi_parse_lanes_of()
30 dev_err(&pdev->dev, "failed to read lane data\n"); in hdmi_parse_lanes_of()
36 dev_err(&pdev->dev, "failed to parse lane data\n"); in hdmi_parse_lanes_of()
44 dev_err(&pdev->dev, "failed to parse lane data\n"); in hdmi_parse_lanes_of()
58 return -EINVAL; in hdmi_compute_acr()
64 * When using deep color, the default N value (as in the HDMI in hdmi_compute_acr()
[all …]
/openbmc/linux/sound/pci/oxygen/
H A Dxonar_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * helper functions for HDMI models (Xonar HDAV1.3/HDAV1.3 Slim)
37 struct xonar_hdmi *hdmi) in xonar_hdmi_init_commands() argument
46 hdmi_write_command(chip, 0x54, 5, hdmi->params); in xonar_hdmi_init_commands()
49 void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *hdmi) in xonar_hdmi_init() argument
51 hdmi->params[1] = IEC958_AES3_CON_FS_48000; in xonar_hdmi_init()
52 hdmi->params[4] = 1; in xonar_hdmi_init()
53 xonar_hdmi_init_commands(chip, hdmi); in xonar_hdmi_init()
63 void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi) in xonar_hdmi_resume() argument
65 xonar_hdmi_init_commands(chip, hdmi); in xonar_hdmi_resume()
[all …]
/openbmc/u-boot/drivers/video/sunxi/
H A Dsunxi_display.c1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2013-2014 Luc Verhaegen <libv@skynet.be>
6 * (C) Copyright 2014-2015 Hans de Goede <hdegoede@redhat.com>
83 return -ETIME; in await_completion()
93 struct sunxi_hdmi_reg * const hdmi = in sunxi_hdmi_hpd_detect() local
100 /* Set hdmi parent to pll3 */ in sunxi_hdmi_hpd_detect()
101 clrsetbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_PLL_MASK, in sunxi_hdmi_hpd_detect()
106 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_HDMI); in sunxi_hdmi_hpd_detect()
108 setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_HDMI); in sunxi_hdmi_hpd_detect()
111 setbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_GATE); in sunxi_hdmi_hpd_detect()
[all …]
/openbmc/linux/drivers/gpu/drm/msm/hdmi/
H A Dhdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <sound/hdmi-codec.h>
17 #include "hdmi.h"
19 void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on) in msm_hdmi_set_mode() argument
24 spin_lock_irqsave(&hdmi->reg_lock, flags); in msm_hdmi_set_mode()
27 if (!hdmi->hdmi_mode) { in msm_hdmi_set_mode()
29 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); in msm_hdmi_set_mode()
38 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); in msm_hdmi_set_mode()
39 spin_unlock_irqrestore(&hdmi->reg_lock, flags); in msm_hdmi_set_mode()
40 DBG("HDMI Core: %s, HDMI_CTRL=0x%08x", in msm_hdmi_set_mode()
[all …]
/openbmc/linux/sound/soc/ti/
H A Domap-hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap-hdmi-audio.c -- OMAP4+ DSS HDMI audio support library
5 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com
20 #include <sound/omap-hdmi-audio.h>
22 #include "sdma-pcm.h"
24 #define DRV_NAME "omap-hdmi-audio"
43 struct snd_soc_pcm_runtime *rtd = ss->private_data; in card_drvdata_substream()
45 return snd_soc_card_get_drvdata(rtd->card); in card_drvdata_substream()
52 mutex_lock(&ad->current_stream_lock); in hdmi_dai_abort()
53 if (ad->current_stream && ad->current_stream->runtime && in hdmi_dai_abort()
[all …]
/openbmc/linux/drivers/gpu/drm/sti/
H A Dsti_hdmi.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/hdmi.h>
26 #include <sound/hdmi-codec.h>
96 #define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4)) /* n from 1 to 6 */
164 struct sti_hdmi *hdmi; member
177 u32 hdmi_read(struct sti_hdmi *hdmi, int offset) in hdmi_read() argument
179 return readl(hdmi->regs + offset); in hdmi_read()
182 void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset) in hdmi_write() argument
184 writel(val, hdmi->regs + offset); in hdmi_write()
188 * HDMI interrupt handler threaded
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dhdac_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * hdac_hdmi.c - ASoc HDA-HDMI codec driver for Intel platforms
5 * Copyright (C) 2014-2015 Intel Corp
17 #include <linux/hdmi.h>
108 unsigned char chmap[8]; /* ALSA API channel-map */
141 #define hdev_to_hdmi_priv(_hdev) dev_get_drvdata(&(_hdev)->dev)
144 hdac_hdmi_get_pcm_from_cvt(struct hdac_hdmi_priv *hdmi, in hdac_hdmi_get_pcm_from_cvt() argument
149 list_for_each_entry(pcm, &hdmi->pcm_list, head) { in hdac_hdmi_get_pcm_from_cvt()
150 if (pcm->cvt == cvt) in hdac_hdmi_get_pcm_from_cvt()
160 struct hdac_device *hdev = port->pin->hdev; in hdac_hdmi_jack_report()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gxl-s905x-libretech-cc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
12 #include "meson-gxl-s905x.dtsi"
15 compatible = "libretech,cc", "amlogic,s905x", "amlogic,meson-gxl";
16 model = "Libre Computer Board AML-S905X-CC";
24 stdout-path = "serial0:115200n8";
27 cvbs-connector {
28 compatible = "composite-video-connector";
32 remote-endpoint = <&cvbs_vdac_out>;
[all …]
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_hdmi.c3 * Copyright © 2006-2009 Intel Corporation
30 #include <linux/hdmi.h>
64 return to_i915(hdmi_to_dig_port(intel_hdmi)->base.base.dev); in intel_hdmi_to_i915()
75 drm_WARN(&dev_priv->drm, in assert_hdmi_port_disabled()
76 intel_de_read(dev_priv, intel_hdmi->hdmi_reg) & enabled_bits, in assert_hdmi_port_disabled()
77 "HDMI port enabled, expecting disabled\n"); in assert_hdmi_port_disabled()
84 drm_WARN(&dev_priv->drm, in assert_hdmi_transcoder_func_disabled()
87 "HDMI transcoder function enabled, expecting disabled\n"); in assert_hdmi_transcoder_func_disabled()
92 switch (type) { in g4x_infoframe_index()
109 switch (type) { in g4x_infoframe_enable()
[all …]
/openbmc/linux/sound/soc/qcom/
H A Dlpass.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2010-2011,2013-2015,2020 The Linux Foundation. All rights reserved.
5 * lpass.h - Definitions for the QTi LPASS
15 #include <dt-bindings/sound/qcom,lpass.h>
16 #include <dt-bindings/sound/qcom,q6afe.h>
17 #include "lpass-hdmi.h"
39 return -EINVAL; \
44 switch (dai_id) { in is_cdc_dma_port()
55 switch (dai_id) { in is_rxtx_cdc_dma_port()
97 /* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */
[all …]
/openbmc/linux/drivers/media/i2c/adv748x/
H A Dadv748x-hdmi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Analog Devices ADV748X HDMI receiver and Component Processor (CP)
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-dv-timings.h>
14 #include <media/v4l2-ioctl.h>
16 #include <uapi/linux/v4l2-dv-timings.h>
20 /* -----------------------------------------------------------------------------
21 * HDMI and CP
29 /* V4L2_DV_BT_CEA_720X480I59_94 - 0.5 MHz */
[all …]
/openbmc/u-boot/drivers/video/meson/
H A Dmeson_vclk.c1 // SPDX-License-Identifier: GPL-2.0
108 switch (div) { in meson_vid_pll_set()
168 /* Enable vid_pll bypass to HDMI pll */ in meson_vid_pll_set()
203 * TOFIX: Refactor into table to also handle HDMI frequency and paths
239 readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val, in meson_venci_cvbs_clock_config()
250 VCLK2_DIV_MASK, (55 - 1)); in meson_venci_cvbs_clock_config()
375 switch (od) { in pll_od_to_reg()
414 readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val, in meson_hdmi_pll_set_params()
432 readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val, in meson_hdmi_pll_set_params()
466 /* The GXBB PLL has a /2 pre-multiplier */ in meson_hdmi_pll_get_m()
[all …]
/openbmc/linux/sound/soc/samsung/
H A Dtm2_wm5110.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2015 - 2016 Samsung Electronics Co., Ltd.
37 struct snd_soc_component *component = priv->component; in tm2_start_sysclk()
43 priv->sysclk_rate); in tm2_start_sysclk()
45 dev_err(component->dev, "Failed to set FLL1 source: %d\n", ret); in tm2_start_sysclk()
52 priv->sysclk_rate); in tm2_start_sysclk()
54 dev_err(component->dev, "Failed to start FLL1: %d\n", ret); in tm2_start_sysclk()
60 priv->sysclk_rate, in tm2_start_sysclk()
63 dev_err(component->dev, "Failed to set SYSCLK source: %d\n", ret); in tm2_start_sysclk()
73 struct snd_soc_component *component = priv->component; in tm2_stop_sysclk()
[all …]

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