Searched +full:gpio +full:- +full:op +full:- +full:cfg (Results 1 – 25 of 47) sorted by relevance
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1 // SPDX-License-Identifier: GPL-2.06 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>23 * Derived from Das U-Boot source code24 * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)38 * - atmel_nand_: all generic structures/functions39 * - atmel_smc_nand_: all structures/functions specific to the SMC interface41 * - atmel_hsmc_nand_: all structures/functions specific to the HSMC interface43 * - atmel_nfc_: all structures/functions used to manipulate the NFC sub-block45 * - <soc>_nand_: all SoC specific structures/functions49 #include <linux/dma-mapping.h>[all …]
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */3 * cs35l45.h -- CS35L45 ALSA SoC audio driver DT bindings header12 * cirrus,asp-sdout-hiz-ctrl14 * TX_HIZ_UNUSED: TX pin high-impedance during unused slots.15 * TX_HIZ_DISABLED: TX pin high-impedance when all channels disabled.21 * Optional GPIOX Sub-nodes:22 * The cs35l45 node can have up to three "cirrus,gpio-ctrlX" ('X' = [1,2,3])23 * sub-nodes for configuring the GPIO pins.25 * - gpio-dir : GPIO pin direction. Valid only when 'gpio-ctrl'30 * - gpio-lvl : GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0.[all …]
1 // SPDX-License-Identifier: GPL-2.0-only9 #include <linux/dma-mapping.h>17 #include <linux/spi/spi-mem.h>21 #include "spi-dw.h"64 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()65 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()67 dws->regset.regs = dw_spi_dbgfs_regs; in dw_spi_debugfs_init()68 dws->regset.nregs = ARRAY_SIZE(dw_spi_dbgfs_regs); in dw_spi_debugfs_init()69 dws->regset.base = dws->regs; in dw_spi_debugfs_init()70 debugfs_create_regset32("registers", 0400, dws->debugfs, &dws->regset); in dw_spi_debugfs_init()[all …]
1 // SPDX-License-Identifier: GPL-2.016 #include <linux/mtd/nand-ecc-mxic.h>20 #include <linux/spi/spi-mem.h>74 #define OP_CMD_BYTES(x) (((x) - 1) << 13)161 #define GPIO 0xc4 macro195 ret = clk_prepare_enable(mxic->send_clk); in mxic_spi_clk_enable()199 ret = clk_prepare_enable(mxic->send_dly_clk); in mxic_spi_clk_enable()206 clk_disable_unprepare(mxic->send_clk); in mxic_spi_clk_enable()213 clk_disable_unprepare(mxic->send_clk); in mxic_spi_clk_disable()214 clk_disable_unprepare(mxic->send_dly_clk); in mxic_spi_clk_disable()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only15 #include <linux/gpio/consumer.h>17 #include <linux/platform_data/spi-mt65xx.h>20 #include <linux/spi/spi-mem.h>21 #include <linux/dma-mapping.h>114 * struct mtk_spi_compatible - device data structure117 * @enhance_timing: Enable adjusting cfg register to enhance time accuracy132 * struct mtk_spi - SPI driver instance150 * @spimem_done: SPI-MEM operation completion151 * @use_spimem: Enables SPI-MEM[all …]
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>11 - Richard Fitzgerald <rf@opensource.cirrus.com>18 - $ref: dai-common.yaml#23 - cirrus,cs35l4528 '#sound-dai-cells':31 reset-gpios:34 vdd-a-supply:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/sound/davinci-mcasp-audio.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Jayesh Choudhary <j-choudhary@ti.com>15 - ti,dm646x-mcasp-audio16 - ti,da830-mcasp-audio17 - ti,am33xx-mcasp-audio18 - ti,dra7-mcasp-audio19 - ti,omap4-mcasp-audio[all …]
1 // SPDX-License-Identifier: GPL-2.0-only4 * 1.5A Step-Up Current Regulator for Flash LEDs11 #include <linux/gpio/consumer.h>12 #include <linux/led-class-flash.h>20 #include <media/v4l2-flash-led-class.h>100 gpiod_direction_output(led->gpio_fl_en, 0); in aat1290_as2cwire_write()101 gpiod_direction_output(led->gpio_en_set, 0); in aat1290_as2cwire_write()108 gpiod_direction_output(led->gpio_en_set, 0); in aat1290_as2cwire_write()110 gpiod_direction_output(led->gpio_en_set, 1); in aat1290_as2cwire_write()118 gpiod_direction_output(led->gpio_en_set, 0); in aat1290_as2cwire_write()[all …]
... help' without arguments for list of all known commands #gpio-cells alloc space exhausted DRAM: WARNING: adjusting ...
1 // SPDX-License-Identifier: GPL-2.010 #include <linux/dma-mapping.h>12 #include <linux/gpio/consumer.h>283 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_timings_init()285 struct stm32_fmc2_timings *timings = &nand->timings; in stm32_fmc2_nfc_timings_init()289 regmap_update_bits(nfc->regmap, FMC2_PCR, in stm32_fmc2_nfc_timings_init()291 FIELD_PREP(FMC2_PCR_TCLR, timings->tclr) | in stm32_fmc2_nfc_timings_init()292 FIELD_PREP(FMC2_PCR_TAR, timings->tar)); in stm32_fmc2_nfc_timings_init()295 pmem = FIELD_PREP(FMC2_PMEM_MEMSET, timings->tset_mem); in stm32_fmc2_nfc_timings_init()296 pmem |= FIELD_PREP(FMC2_PMEM_MEMWAIT, timings->twait); in stm32_fmc2_nfc_timings_init()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only10 #include <linux/dma-mapping.h>12 #include <linux/gpio/consumer.h>18 #include <linux/mtd/nand-ecc-sw-bch.h>21 #include <linux/omap-dma.h>29 #include <linux/omap-gpmc.h>30 #include <linux/platform_data/mtd-nand-omap2.h>32 #define DRIVER_NAME "omap2-nand"172 /* NAND ready gpio */198 * omap_prefetch_enable - configures and starts prefetch transfer[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/8 #include <dt-bindings/phy/phy-cadence.h>9 #include <dt-bindings/phy/phy-ti.h>12 serdes_refclk: clock-cmnrefclk {13 #clock-cells = <0>;14 compatible = "fixed-clock";15 clock-frequency = <0>;21 compatible = "mmio-sram";23 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/7 #include <dt-bindings/phy/phy-am654-serdes.h>11 compatible = "mmio-sram";13 #address-cells = <1>;14 #size-cells = <1>;17 atf-sram@0 {21 sysfw-sram@f0000 {25 l3cache-sram@100000 {30 gic500: interrupt-controller@1800000 {[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/9 dmsc: system-controller@44083000 {10 compatible = "ti,k2g-sci";11 ti,host-id = <12>;13 mbox-names = "rx", "tx";18 reg-names = "debug_messages";21 k3_pds: power-controller {22 compatible = "ti,sci-pm-domain";23 #power-domain-cells = <2>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Linux-DVB Driver for DiBcom's second generation DiB7000P (PC).5 * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)27 MODULE_PARM_DESC(buggy_sfn_workaround, "Enable work-around for buggy SFNs (default: 0)");42 struct dib7000p_config cfg; member104 if (mutex_lock_interruptible(&state->i2c_buffer_lock) < 0) { in dib7000p_read_word()109 state->i2c_write_buffer[0] = reg >> 8; in dib7000p_read_word()110 state->i2c_write_buffer[1] = reg & 0xff; in dib7000p_read_word()112 memset(state->msg, 0, 2 * sizeof(struct i2c_msg)); in dib7000p_read_word()113 state->msg[0].addr = state->i2c_addr >> 1; in dib7000p_read_word()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Linux-DVB Driver for DiBcom's DiB8000 chip (ISDB-T).22 #define LAYER_ALL -166 struct dib8000_config cfg; member149 {.addr = i2c->addr >> 1, .flags = 0, .len = 2}, in dib8000_i2c_read16()150 {.addr = i2c->addr >> 1, .flags = I2C_M_RD, .len = 2}, in dib8000_i2c_read16()153 if (mutex_lock_interruptible(i2c->i2c_buffer_lock) < 0) { in dib8000_i2c_read16()158 msg[0].buf = i2c->i2c_write_buffer; in dib8000_i2c_read16()161 msg[1].buf = i2c->i2c_read_buffer; in dib8000_i2c_read16()163 if (i2c_transfer(i2c->adap, msg, 2) != 2) in dib8000_i2c_read16()[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later23 #include "dvb-bt8xx.h"45 struct dvb_bt8xx_card *card = dev_get_drvdata(&bt->adapter->dev); in dvb_bt8xx_task()47 dprintk("%d\n", card->bt->finished_block); in dvb_bt8xx_task()49 while (card->bt->last_block != card->bt->finished_block) { in dvb_bt8xx_task()50 (card->bt->TS_Size ? dvb_dmx_swfilter_204 : dvb_dmx_swfilter) in dvb_bt8xx_task()51 (&card->demux, in dvb_bt8xx_task()52 &card->bt->buf_cpu[card->bt->last_block * in dvb_bt8xx_task()53 card->bt->block_bytes], in dvb_bt8xx_task()54 card->bt->block_bytes); in dvb_bt8xx_task()[all …]
1 // SPDX-License-Identifier: GPL-2.0+6 * from https://github.com/xobs/novena-linux.git commit14 #include <asm/gpio.h>18 #include <asm/arch/imx-regs.h>22 #include <asm/mach-imx/iomux-v3.h>23 #include <asm/mach-imx/mxc_i2c.h>24 #include <asm/mach-imx/video.h>143 /* JEIDA, 8-bit depth 0x11, orig 0x42 */ in it6251_program_regs()159 /* set for two lane mode, normal op, no swapping, no downspread */ in it6251_program_regs()165 /* power down lanes 3-0 */ in it6251_program_regs()[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * hfcmulti.c low level driver for hfc-4s/hfc-8s/hfc-e1 based cards7 * Peter Sprenger (sprengermoving-bytes.de)9 * inspired by existing hfc-pci driver:10 * Copyright 1999 by Werner Cornelius (werner@isdn-development.de)22 * Bit 0-7 = 0x00001 = HFC-E1 (1 port)23 * or Bit 0-7 = 0x00004 = HFC-4S (4 ports)24 * or Bit 0-7 = 0x00008 = HFC-8S (8 ports)26 * Bit 9 = 0x00200 = Disable DTMF detect on all B-channels via hardware38 * example: 0x20204 one HFC-4S with dtmf detection and 128 timeslots on PCM[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later9 #include "cx23885-video.h"23 #include <media/v4l2-common.h>24 #include <media/v4l2-ioctl.h>25 #include <media/v4l2-event.h>26 #include "cx23885-ioctl.h"29 #include <media/drv-intf/cx25840.h>35 /* ------------------------------------------------------------------ */37 static unsigned int video_nr[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET };38 static unsigned int vbi_nr[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET };[all …]
1 // SPDX-License-Identifier: GPL-2.03 // cs35l45.c - CS35L45 ALSA SoC audio driver5 // Copyright 2019-2022 Cirrus Logic, Inc.9 #include <linux/gpio/consumer.h>53 if (!cs35l45->dsp.cs_dsp.running) { in cs35l45_set_cspl_mbox_cmd()54 dev_err(cs35l45->dev, "DSP not running\n"); in cs35l45_set_cspl_mbox_cmd()55 return -EPERM; in cs35l45_set_cspl_mbox_cmd()62 dev_err(cs35l45->dev, "Failed to write MBOX: %d\n", ret); in cs35l45_set_cspl_mbox_cmd()72 dev_err(cs35l45->dev, "Failed to read MBOX STS: %d\n", ret); in cs35l45_set_cspl_mbox_cmd()77 dev_dbg(cs35l45->dev, "[%u] cmd %u returned invalid sts %u", i, cmd, sts); in cs35l45_set_cspl_mbox_cmd()[all …]
1 // SPDX-License-Identifier: GPL-2.03 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)5 * Copyright (C) 2002 - 2011 Paul Mundt9 * based off of the old drivers/char/sh-sci.c by:26 #include <linux/dma-mapping.h>58 #include "sh-sci.h"60 /* Offsets into the sci_port->irqs array */74 ((port)->irqs[SCIx_ERI_IRQ] == \75 (port)->irqs[SCIx_RXI_IRQ]) || \76 ((port)->irqs[SCIx_ERI_IRQ] && \[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */2 /* Copyright(c) 2009-2012 Realtek Corporation.*/185 #define MAX_BASE_NUM_IN_PHY_REG_PG_5G 5 /* MAX_RATE_SECTION -1 */344 #define RTL_HW_TYPE(rtlpriv) (rtl_hal((struct rtl_priv *)rtlpriv)->hw_type)1036 sizeof(info->status.status_driver_data)); in rtl_tx_skb_cb_info()1038 return (struct rtlwifi_tx_info *)(info->status.status_driver_data); in rtl_tx_skb_cb_info()1398 u8 hw_rof_enable; /*Enable GPIO[9] as WL RF HW PDn source*/1675 /* dual MAC 0--Mac0 1--Mac1 */1706 u8 hw_rof_enable; /*Enable GPIO[9] as WL RF HW PDn source*/1726 * pairwise key 1-4 is for agoup key.[all …]
7 * Copyright (c) 2003-2016 Cavium, Inc.14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty219 struct octeon_device *oct = lio->oct_dev; in lio_get_link_ksettings()222 linfo = &lio->linfo; in lio_get_link_ksettings()227 switch (linfo->link.s.phy_type) { in lio_get_link_ksettings()229 ecmd->base.port = PORT_TP; in lio_get_link_ksettings()230 ecmd->base.autoneg = AUTONEG_DISABLE; in lio_get_link_ksettings()243 if (linfo->link.s.if_mode == INTERFACE_MODE_XAUI || in lio_get_link_ksettings()244 linfo->link.s.if_mode == INTERFACE_MODE_RXAUI || in lio_get_link_ksettings()245 linfo->link.s.if_mode == INTERFACE_MODE_XLAUI || in lio_get_link_ksettings()[all …]
1 // SPDX-License-Identifier: ISC25 u32 op = get ? PATCH_SEM_GET : PATCH_SEM_RELEASE; in mt76_connac_mcu_patch_sem_ctrl() local27 __le32 op; in mt76_connac_mcu_patch_sem_ctrl() member29 .op = cpu_to_le32(op), in mt76_connac_mcu_patch_sem_ctrl()106 struct mt76_dev *dev = phy->dev; in mt76_connac_mcu_set_channel_domain()110 n_max_channels = phy->sband_2g.sband.n_channels + in mt76_connac_mcu_set_channel_domain()111 phy->sband_5g.sband.n_channels + in mt76_connac_mcu_set_channel_domain()112 phy->sband_6g.sband.n_channels; in mt76_connac_mcu_set_channel_domain()117 return -ENOMEM; in mt76_connac_mcu_set_channel_domain()121 for (i = 0; i < phy->sband_2g.sband.n_channels; i++) { in mt76_connac_mcu_set_channel_domain()[all …]